net2280.c 100 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Driver for the PLX NET2280 USB device controller.
  4. * Specs and errata are available from <http://www.plxtech.com>.
  5. *
  6. * PLX Technology Inc. (formerly NetChip Technology) supported the
  7. * development of this driver.
  8. *
  9. *
  10. * CODE STATUS HIGHLIGHTS
  11. *
  12. * This driver should work well with most "gadget" drivers, including
  13. * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers
  14. * as well as Gadget Zero and Gadgetfs.
  15. *
  16. * DMA is enabled by default.
  17. *
  18. * MSI is enabled by default. The legacy IRQ is used if MSI couldn't
  19. * be enabled.
  20. *
  21. * Note that almost all the errata workarounds here are only needed for
  22. * rev1 chips. Rev1a silicon (0110) fixes almost all of them.
  23. */
  24. /*
  25. * Copyright (C) 2003 David Brownell
  26. * Copyright (C) 2003-2005 PLX Technology, Inc.
  27. * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
  28. *
  29. * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility
  30. * with 2282 chip
  31. *
  32. * Modified Ricardo Ribalda Qtechnology AS to provide compatibility
  33. * with usb 338x chip. Based on PLX driver
  34. */
  35. #include <linux/module.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/kernel.h>
  39. #include <linux/delay.h>
  40. #include <linux/ioport.h>
  41. #include <linux/slab.h>
  42. #include <linux/errno.h>
  43. #include <linux/init.h>
  44. #include <linux/timer.h>
  45. #include <linux/list.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/moduleparam.h>
  48. #include <linux/device.h>
  49. #include <linux/usb/ch9.h>
  50. #include <linux/usb/gadget.h>
  51. #include <linux/prefetch.h>
  52. #include <linux/io.h>
  53. #include <asm/byteorder.h>
  54. #include <asm/irq.h>
  55. #include <asm/unaligned.h>
  56. #define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller"
  57. #define DRIVER_VERSION "2005 Sept 27/v3.0"
  58. #define EP_DONTUSE 13 /* nonzero */
  59. #define USE_RDK_LEDS /* GPIO pins control three LEDs */
  60. static const char driver_name[] = "net2280";
  61. static const char driver_desc[] = DRIVER_DESC;
  62. static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 };
  63. static const char ep0name[] = "ep0";
  64. #define EP_INFO(_name, _caps) \
  65. { \
  66. .name = _name, \
  67. .caps = _caps, \
  68. }
  69. static const struct {
  70. const char *name;
  71. const struct usb_ep_caps caps;
  72. } ep_info_dft[] = { /* Default endpoint configuration */
  73. EP_INFO(ep0name,
  74. USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
  75. EP_INFO("ep-a",
  76. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  77. EP_INFO("ep-b",
  78. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  79. EP_INFO("ep-c",
  80. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  81. EP_INFO("ep-d",
  82. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  83. EP_INFO("ep-e",
  84. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  85. EP_INFO("ep-f",
  86. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  87. EP_INFO("ep-g",
  88. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  89. EP_INFO("ep-h",
  90. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_ALL)),
  91. }, ep_info_adv[] = { /* Endpoints for usb3380 advance mode */
  92. EP_INFO(ep0name,
  93. USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
  94. EP_INFO("ep1in",
  95. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  96. EP_INFO("ep2out",
  97. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  98. EP_INFO("ep3in",
  99. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  100. EP_INFO("ep4out",
  101. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  102. EP_INFO("ep1out",
  103. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  104. EP_INFO("ep2in",
  105. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  106. EP_INFO("ep3out",
  107. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_OUT)),
  108. EP_INFO("ep4in",
  109. USB_EP_CAPS(USB_EP_CAPS_TYPE_ALL, USB_EP_CAPS_DIR_IN)),
  110. };
  111. #undef EP_INFO
  112. /* mode 0 == ep-{a,b,c,d} 1K fifo each
  113. * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable
  114. * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable
  115. */
  116. static ushort fifo_mode;
  117. /* "modprobe net2280 fifo_mode=1" etc */
  118. module_param(fifo_mode, ushort, 0644);
  119. /* enable_suspend -- When enabled, the driver will respond to
  120. * USB suspend requests by powering down the NET2280. Otherwise,
  121. * USB suspend requests will be ignored. This is acceptable for
  122. * self-powered devices
  123. */
  124. static bool enable_suspend;
  125. /* "modprobe net2280 enable_suspend=1" etc */
  126. module_param(enable_suspend, bool, 0444);
  127. #define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out")
  128. static char *type_string(u8 bmAttributes)
  129. {
  130. switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
  131. case USB_ENDPOINT_XFER_BULK: return "bulk";
  132. case USB_ENDPOINT_XFER_ISOC: return "iso";
  133. case USB_ENDPOINT_XFER_INT: return "intr";
  134. }
  135. return "control";
  136. }
  137. #include "net2280.h"
  138. #define valid_bit cpu_to_le32(BIT(VALID_BIT))
  139. #define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE))
  140. static void ep_clear_seqnum(struct net2280_ep *ep);
  141. static void stop_activity(struct net2280 *dev,
  142. struct usb_gadget_driver *driver);
  143. static void ep0_start(struct net2280 *dev);
  144. /*-------------------------------------------------------------------------*/
  145. static inline void enable_pciirqenb(struct net2280_ep *ep)
  146. {
  147. u32 tmp = readl(&ep->dev->regs->pciirqenb0);
  148. if (ep->dev->quirks & PLX_LEGACY)
  149. tmp |= BIT(ep->num);
  150. else
  151. tmp |= BIT(ep_bit[ep->num]);
  152. writel(tmp, &ep->dev->regs->pciirqenb0);
  153. return;
  154. }
  155. static int
  156. net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
  157. {
  158. struct net2280 *dev;
  159. struct net2280_ep *ep;
  160. u32 max;
  161. u32 tmp = 0;
  162. u32 type;
  163. unsigned long flags;
  164. static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 };
  165. int ret = 0;
  166. ep = container_of(_ep, struct net2280_ep, ep);
  167. if (!_ep || !desc || ep->desc || _ep->name == ep0name ||
  168. desc->bDescriptorType != USB_DT_ENDPOINT) {
  169. pr_err("%s: failed at line=%d\n", __func__, __LINE__);
  170. return -EINVAL;
  171. }
  172. dev = ep->dev;
  173. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  174. ret = -ESHUTDOWN;
  175. goto print_err;
  176. }
  177. /* erratum 0119 workaround ties up an endpoint number */
  178. if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE) {
  179. ret = -EDOM;
  180. goto print_err;
  181. }
  182. if (dev->quirks & PLX_PCIE) {
  183. if ((desc->bEndpointAddress & 0x0f) >= 0x0c) {
  184. ret = -EDOM;
  185. goto print_err;
  186. }
  187. ep->is_in = !!usb_endpoint_dir_in(desc);
  188. if (dev->enhanced_mode && ep->is_in && ep_key[ep->num]) {
  189. ret = -EINVAL;
  190. goto print_err;
  191. }
  192. }
  193. /* sanity check ep-e/ep-f since their fifos are small */
  194. max = usb_endpoint_maxp(desc);
  195. if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY)) {
  196. ret = -ERANGE;
  197. goto print_err;
  198. }
  199. spin_lock_irqsave(&dev->lock, flags);
  200. _ep->maxpacket = max;
  201. ep->desc = desc;
  202. /* ep_reset() has already been called */
  203. ep->stopped = 0;
  204. ep->wedged = 0;
  205. ep->out_overflow = 0;
  206. /* set speed-dependent max packet; may kick in high bandwidth */
  207. set_max_speed(ep, max);
  208. /* set type, direction, address; reset fifo counters */
  209. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  210. if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) {
  211. tmp = readl(&ep->cfg->ep_cfg);
  212. /* If USB ep number doesn't match hardware ep number */
  213. if ((tmp & 0xf) != usb_endpoint_num(desc)) {
  214. ret = -EINVAL;
  215. spin_unlock_irqrestore(&dev->lock, flags);
  216. goto print_err;
  217. }
  218. if (ep->is_in)
  219. tmp &= ~USB3380_EP_CFG_MASK_IN;
  220. else
  221. tmp &= ~USB3380_EP_CFG_MASK_OUT;
  222. }
  223. type = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  224. if (type == USB_ENDPOINT_XFER_INT) {
  225. /* erratum 0105 workaround prevents hs NYET */
  226. if (dev->chiprev == 0100 &&
  227. dev->gadget.speed == USB_SPEED_HIGH &&
  228. !(desc->bEndpointAddress & USB_DIR_IN))
  229. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE),
  230. &ep->regs->ep_rsp);
  231. } else if (type == USB_ENDPOINT_XFER_BULK) {
  232. /* catch some particularly blatant driver bugs */
  233. if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) ||
  234. (dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
  235. (dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
  236. spin_unlock_irqrestore(&dev->lock, flags);
  237. ret = -ERANGE;
  238. goto print_err;
  239. }
  240. }
  241. ep->is_iso = (type == USB_ENDPOINT_XFER_ISOC);
  242. /* Enable this endpoint */
  243. if (dev->quirks & PLX_LEGACY) {
  244. tmp |= type << ENDPOINT_TYPE;
  245. tmp |= desc->bEndpointAddress;
  246. /* default full fifo lines */
  247. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  248. tmp |= BIT(ENDPOINT_ENABLE);
  249. ep->is_in = (tmp & USB_DIR_IN) != 0;
  250. } else {
  251. /* In Legacy mode, only OUT endpoints are used */
  252. if (dev->enhanced_mode && ep->is_in) {
  253. tmp |= type << IN_ENDPOINT_TYPE;
  254. tmp |= BIT(IN_ENDPOINT_ENABLE);
  255. } else {
  256. tmp |= type << OUT_ENDPOINT_TYPE;
  257. tmp |= BIT(OUT_ENDPOINT_ENABLE);
  258. tmp |= (ep->is_in << ENDPOINT_DIRECTION);
  259. }
  260. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  261. if (!dev->enhanced_mode)
  262. tmp |= usb_endpoint_num(desc);
  263. tmp |= (ep->ep.maxburst << MAX_BURST_SIZE);
  264. }
  265. /* Make sure all the registers are written before ep_rsp*/
  266. wmb();
  267. /* for OUT transfers, block the rx fifo until a read is posted */
  268. if (!ep->is_in)
  269. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  270. else if (!(dev->quirks & PLX_2280)) {
  271. /* Added for 2282, Don't use nak packets on an in endpoint,
  272. * this was ignored on 2280
  273. */
  274. writel(BIT(CLEAR_NAK_OUT_PACKETS) |
  275. BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp);
  276. }
  277. if (dev->quirks & PLX_PCIE)
  278. ep_clear_seqnum(ep);
  279. writel(tmp, &ep->cfg->ep_cfg);
  280. /* enable irqs */
  281. if (!ep->dma) { /* pio, per-packet */
  282. enable_pciirqenb(ep);
  283. tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) |
  284. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE);
  285. if (dev->quirks & PLX_2280)
  286. tmp |= readl(&ep->regs->ep_irqenb);
  287. writel(tmp, &ep->regs->ep_irqenb);
  288. } else { /* dma, per-request */
  289. tmp = BIT((8 + ep->num)); /* completion */
  290. tmp |= readl(&dev->regs->pciirqenb1);
  291. writel(tmp, &dev->regs->pciirqenb1);
  292. /* for short OUT transfers, dma completions can't
  293. * advance the queue; do it pio-style, by hand.
  294. * NOTE erratum 0112 workaround #2
  295. */
  296. if ((desc->bEndpointAddress & USB_DIR_IN) == 0) {
  297. tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE);
  298. writel(tmp, &ep->regs->ep_irqenb);
  299. enable_pciirqenb(ep);
  300. }
  301. }
  302. tmp = desc->bEndpointAddress;
  303. ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n",
  304. _ep->name, tmp & 0x0f, DIR_STRING(tmp),
  305. type_string(desc->bmAttributes),
  306. ep->dma ? "dma" : "pio", max);
  307. /* pci writes may still be posted */
  308. spin_unlock_irqrestore(&dev->lock, flags);
  309. return ret;
  310. print_err:
  311. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
  312. return ret;
  313. }
  314. static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
  315. {
  316. u32 result;
  317. do {
  318. result = readl(ptr);
  319. if (result == ~(u32)0) /* "device unplugged" */
  320. return -ENODEV;
  321. result &= mask;
  322. if (result == done)
  323. return 0;
  324. udelay(1);
  325. usec--;
  326. } while (usec > 0);
  327. return -ETIMEDOUT;
  328. }
  329. static const struct usb_ep_ops net2280_ep_ops;
  330. static void ep_reset_228x(struct net2280_regs __iomem *regs,
  331. struct net2280_ep *ep)
  332. {
  333. u32 tmp;
  334. ep->desc = NULL;
  335. INIT_LIST_HEAD(&ep->queue);
  336. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  337. ep->ep.ops = &net2280_ep_ops;
  338. /* disable the dma, irqs, endpoint... */
  339. if (ep->dma) {
  340. writel(0, &ep->dma->dmactl);
  341. writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  342. BIT(DMA_TRANSACTION_DONE_INTERRUPT) |
  343. BIT(DMA_ABORT),
  344. &ep->dma->dmastat);
  345. tmp = readl(&regs->pciirqenb0);
  346. tmp &= ~BIT(ep->num);
  347. writel(tmp, &regs->pciirqenb0);
  348. } else {
  349. tmp = readl(&regs->pciirqenb1);
  350. tmp &= ~BIT((8 + ep->num)); /* completion */
  351. writel(tmp, &regs->pciirqenb1);
  352. }
  353. writel(0, &ep->regs->ep_irqenb);
  354. /* init to our chosen defaults, notably so that we NAK OUT
  355. * packets until the driver queues a read (+note erratum 0112)
  356. */
  357. if (!ep->is_in || (ep->dev->quirks & PLX_2280)) {
  358. tmp = BIT(SET_NAK_OUT_PACKETS_MODE) |
  359. BIT(SET_NAK_OUT_PACKETS) |
  360. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  361. BIT(CLEAR_INTERRUPT_MODE);
  362. } else {
  363. /* added for 2282 */
  364. tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  365. BIT(CLEAR_NAK_OUT_PACKETS) |
  366. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  367. BIT(CLEAR_INTERRUPT_MODE);
  368. }
  369. if (ep->num != 0) {
  370. tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) |
  371. BIT(CLEAR_ENDPOINT_HALT);
  372. }
  373. writel(tmp, &ep->regs->ep_rsp);
  374. /* scrub most status bits, and flush any fifo state */
  375. if (ep->dev->quirks & PLX_2280)
  376. tmp = BIT(FIFO_OVERFLOW) |
  377. BIT(FIFO_UNDERFLOW);
  378. else
  379. tmp = 0;
  380. writel(tmp | BIT(TIMEOUT) |
  381. BIT(USB_STALL_SENT) |
  382. BIT(USB_IN_NAK_SENT) |
  383. BIT(USB_IN_ACK_RCVD) |
  384. BIT(USB_OUT_PING_NAK_SENT) |
  385. BIT(USB_OUT_ACK_SENT) |
  386. BIT(FIFO_FLUSH) |
  387. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  388. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  389. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  390. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  391. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  392. BIT(DATA_IN_TOKEN_INTERRUPT),
  393. &ep->regs->ep_stat);
  394. /* fifo size is handled separately */
  395. }
  396. static void ep_reset_338x(struct net2280_regs __iomem *regs,
  397. struct net2280_ep *ep)
  398. {
  399. u32 tmp, dmastat;
  400. ep->desc = NULL;
  401. INIT_LIST_HEAD(&ep->queue);
  402. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  403. ep->ep.ops = &net2280_ep_ops;
  404. /* disable the dma, irqs, endpoint... */
  405. if (ep->dma) {
  406. writel(0, &ep->dma->dmactl);
  407. writel(BIT(DMA_ABORT_DONE_INTERRUPT) |
  408. BIT(DMA_PAUSE_DONE_INTERRUPT) |
  409. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  410. BIT(DMA_TRANSACTION_DONE_INTERRUPT),
  411. /* | BIT(DMA_ABORT), */
  412. &ep->dma->dmastat);
  413. dmastat = readl(&ep->dma->dmastat);
  414. if (dmastat == 0x5002) {
  415. ep_warn(ep->dev, "The dmastat return = %x!!\n",
  416. dmastat);
  417. writel(0x5a, &ep->dma->dmastat);
  418. }
  419. tmp = readl(&regs->pciirqenb0);
  420. tmp &= ~BIT(ep_bit[ep->num]);
  421. writel(tmp, &regs->pciirqenb0);
  422. } else {
  423. if (ep->num < 5) {
  424. tmp = readl(&regs->pciirqenb1);
  425. tmp &= ~BIT((8 + ep->num)); /* completion */
  426. writel(tmp, &regs->pciirqenb1);
  427. }
  428. }
  429. writel(0, &ep->regs->ep_irqenb);
  430. writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  431. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  432. BIT(FIFO_OVERFLOW) |
  433. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  434. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  435. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  436. BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat);
  437. tmp = readl(&ep->cfg->ep_cfg);
  438. if (ep->is_in)
  439. tmp &= ~USB3380_EP_CFG_MASK_IN;
  440. else
  441. tmp &= ~USB3380_EP_CFG_MASK_OUT;
  442. writel(tmp, &ep->cfg->ep_cfg);
  443. }
  444. static void nuke(struct net2280_ep *);
  445. static int net2280_disable(struct usb_ep *_ep)
  446. {
  447. struct net2280_ep *ep;
  448. unsigned long flags;
  449. ep = container_of(_ep, struct net2280_ep, ep);
  450. if (!_ep || !ep->desc || _ep->name == ep0name) {
  451. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  452. return -EINVAL;
  453. }
  454. spin_lock_irqsave(&ep->dev->lock, flags);
  455. nuke(ep);
  456. if (ep->dev->quirks & PLX_PCIE)
  457. ep_reset_338x(ep->dev->regs, ep);
  458. else
  459. ep_reset_228x(ep->dev->regs, ep);
  460. ep_vdbg(ep->dev, "disabled %s %s\n",
  461. ep->dma ? "dma" : "pio", _ep->name);
  462. /* synch memory views with the device */
  463. (void)readl(&ep->cfg->ep_cfg);
  464. if (!ep->dma && ep->num >= 1 && ep->num <= 4)
  465. ep->dma = &ep->dev->dma[ep->num - 1];
  466. spin_unlock_irqrestore(&ep->dev->lock, flags);
  467. return 0;
  468. }
  469. /*-------------------------------------------------------------------------*/
  470. static struct usb_request
  471. *net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  472. {
  473. struct net2280_ep *ep;
  474. struct net2280_request *req;
  475. if (!_ep) {
  476. pr_err("%s: Invalid ep\n", __func__);
  477. return NULL;
  478. }
  479. ep = container_of(_ep, struct net2280_ep, ep);
  480. req = kzalloc(sizeof(*req), gfp_flags);
  481. if (!req)
  482. return NULL;
  483. INIT_LIST_HEAD(&req->queue);
  484. /* this dma descriptor may be swapped with the previous dummy */
  485. if (ep->dma) {
  486. struct net2280_dma *td;
  487. td = dma_pool_alloc(ep->dev->requests, gfp_flags,
  488. &req->td_dma);
  489. if (!td) {
  490. kfree(req);
  491. return NULL;
  492. }
  493. td->dmacount = 0; /* not VALID */
  494. td->dmadesc = td->dmaaddr;
  495. req->td = td;
  496. }
  497. return &req->req;
  498. }
  499. static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req)
  500. {
  501. struct net2280_ep *ep;
  502. struct net2280_request *req;
  503. ep = container_of(_ep, struct net2280_ep, ep);
  504. if (!_ep || !_req) {
  505. dev_err(&ep->dev->pdev->dev, "%s: Invalid ep=%p or req=%p\n",
  506. __func__, _ep, _req);
  507. return;
  508. }
  509. req = container_of(_req, struct net2280_request, req);
  510. WARN_ON(!list_empty(&req->queue));
  511. if (req->td)
  512. dma_pool_free(ep->dev->requests, req->td, req->td_dma);
  513. kfree(req);
  514. }
  515. /*-------------------------------------------------------------------------*/
  516. /* load a packet into the fifo we use for usb IN transfers.
  517. * works for all endpoints.
  518. *
  519. * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo
  520. * at a time, but this code is simpler because it knows it only writes
  521. * one packet. ep-a..ep-d should use dma instead.
  522. */
  523. static void write_fifo(struct net2280_ep *ep, struct usb_request *req)
  524. {
  525. struct net2280_ep_regs __iomem *regs = ep->regs;
  526. u8 *buf;
  527. u32 tmp;
  528. unsigned count, total;
  529. /* INVARIANT: fifo is currently empty. (testable) */
  530. if (req) {
  531. buf = req->buf + req->actual;
  532. prefetch(buf);
  533. total = req->length - req->actual;
  534. } else {
  535. total = 0;
  536. buf = NULL;
  537. }
  538. /* write just one packet at a time */
  539. count = ep->ep.maxpacket;
  540. if (count > total) /* min() cannot be used on a bitfield */
  541. count = total;
  542. ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n",
  543. ep->ep.name, count,
  544. (count != ep->ep.maxpacket) ? " (short)" : "",
  545. req);
  546. while (count >= 4) {
  547. /* NOTE be careful if you try to align these. fifo lines
  548. * should normally be full (4 bytes) and successive partial
  549. * lines are ok only in certain cases.
  550. */
  551. tmp = get_unaligned((u32 *)buf);
  552. cpu_to_le32s(&tmp);
  553. writel(tmp, &regs->ep_data);
  554. buf += 4;
  555. count -= 4;
  556. }
  557. /* last fifo entry is "short" unless we wrote a full packet.
  558. * also explicitly validate last word in (periodic) transfers
  559. * when maxpacket is not a multiple of 4 bytes.
  560. */
  561. if (count || total < ep->ep.maxpacket) {
  562. tmp = count ? get_unaligned((u32 *)buf) : count;
  563. cpu_to_le32s(&tmp);
  564. set_fifo_bytecount(ep, count & 0x03);
  565. writel(tmp, &regs->ep_data);
  566. }
  567. /* pci writes may still be posted */
  568. }
  569. /* work around erratum 0106: PCI and USB race over the OUT fifo.
  570. * caller guarantees chiprev 0100, out endpoint is NAKing, and
  571. * there's no real data in the fifo.
  572. *
  573. * NOTE: also used in cases where that erratum doesn't apply:
  574. * where the host wrote "too much" data to us.
  575. */
  576. static void out_flush(struct net2280_ep *ep)
  577. {
  578. u32 __iomem *statp;
  579. u32 tmp;
  580. statp = &ep->regs->ep_stat;
  581. tmp = readl(statp);
  582. if (tmp & BIT(NAK_OUT_PACKETS)) {
  583. ep_dbg(ep->dev, "%s %s %08x !NAK\n",
  584. ep->ep.name, __func__, tmp);
  585. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  586. }
  587. writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  588. BIT(DATA_PACKET_RECEIVED_INTERRUPT),
  589. statp);
  590. writel(BIT(FIFO_FLUSH), statp);
  591. /* Make sure that stap is written */
  592. mb();
  593. tmp = readl(statp);
  594. if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) &&
  595. /* high speed did bulk NYET; fifo isn't filling */
  596. ep->dev->gadget.speed == USB_SPEED_FULL) {
  597. unsigned usec;
  598. usec = 50; /* 64 byte bulk/interrupt */
  599. handshake(statp, BIT(USB_OUT_PING_NAK_SENT),
  600. BIT(USB_OUT_PING_NAK_SENT), usec);
  601. /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */
  602. }
  603. }
  604. /* unload packet(s) from the fifo we use for usb OUT transfers.
  605. * returns true iff the request completed, because of short packet
  606. * or the request buffer having filled with full packets.
  607. *
  608. * for ep-a..ep-d this will read multiple packets out when they
  609. * have been accepted.
  610. */
  611. static int read_fifo(struct net2280_ep *ep, struct net2280_request *req)
  612. {
  613. struct net2280_ep_regs __iomem *regs = ep->regs;
  614. u8 *buf = req->req.buf + req->req.actual;
  615. unsigned count, tmp, is_short;
  616. unsigned cleanup = 0, prevent = 0;
  617. /* erratum 0106 ... packets coming in during fifo reads might
  618. * be incompletely rejected. not all cases have workarounds.
  619. */
  620. if (ep->dev->chiprev == 0x0100 &&
  621. ep->dev->gadget.speed == USB_SPEED_FULL) {
  622. udelay(1);
  623. tmp = readl(&ep->regs->ep_stat);
  624. if ((tmp & BIT(NAK_OUT_PACKETS)))
  625. cleanup = 1;
  626. else if ((tmp & BIT(FIFO_FULL))) {
  627. start_out_naking(ep);
  628. prevent = 1;
  629. }
  630. /* else: hope we don't see the problem */
  631. }
  632. /* never overflow the rx buffer. the fifo reads packets until
  633. * it sees a short one; we might not be ready for them all.
  634. */
  635. prefetchw(buf);
  636. count = readl(&regs->ep_avail);
  637. if (unlikely(count == 0)) {
  638. udelay(1);
  639. tmp = readl(&ep->regs->ep_stat);
  640. count = readl(&regs->ep_avail);
  641. /* handled that data already? */
  642. if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0)
  643. return 0;
  644. }
  645. tmp = req->req.length - req->req.actual;
  646. if (count > tmp) {
  647. /* as with DMA, data overflow gets flushed */
  648. if ((tmp % ep->ep.maxpacket) != 0) {
  649. ep_err(ep->dev,
  650. "%s out fifo %d bytes, expected %d\n",
  651. ep->ep.name, count, tmp);
  652. req->req.status = -EOVERFLOW;
  653. cleanup = 1;
  654. /* NAK_OUT_PACKETS will be set, so flushing is safe;
  655. * the next read will start with the next packet
  656. */
  657. } /* else it's a ZLP, no worries */
  658. count = tmp;
  659. }
  660. req->req.actual += count;
  661. is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0);
  662. ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n",
  663. ep->ep.name, count, is_short ? " (short)" : "",
  664. cleanup ? " flush" : "", prevent ? " nak" : "",
  665. req, req->req.actual, req->req.length);
  666. while (count >= 4) {
  667. tmp = readl(&regs->ep_data);
  668. cpu_to_le32s(&tmp);
  669. put_unaligned(tmp, (u32 *)buf);
  670. buf += 4;
  671. count -= 4;
  672. }
  673. if (count) {
  674. tmp = readl(&regs->ep_data);
  675. /* LE conversion is implicit here: */
  676. do {
  677. *buf++ = (u8) tmp;
  678. tmp >>= 8;
  679. } while (--count);
  680. }
  681. if (cleanup)
  682. out_flush(ep);
  683. if (prevent) {
  684. writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  685. (void) readl(&ep->regs->ep_rsp);
  686. }
  687. return is_short || ((req->req.actual == req->req.length) &&
  688. !req->req.zero);
  689. }
  690. /* fill out dma descriptor to match a given request */
  691. static void fill_dma_desc(struct net2280_ep *ep,
  692. struct net2280_request *req, int valid)
  693. {
  694. struct net2280_dma *td = req->td;
  695. u32 dmacount = req->req.length;
  696. /* don't let DMA continue after a short OUT packet,
  697. * so overruns can't affect the next transfer.
  698. * in case of overruns on max-size packets, we can't
  699. * stop the fifo from filling but we can flush it.
  700. */
  701. if (ep->is_in)
  702. dmacount |= BIT(DMA_DIRECTION);
  703. if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) ||
  704. !(ep->dev->quirks & PLX_2280))
  705. dmacount |= BIT(END_OF_CHAIN);
  706. req->valid = valid;
  707. if (valid)
  708. dmacount |= BIT(VALID_BIT);
  709. dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE);
  710. /* td->dmadesc = previously set by caller */
  711. td->dmaaddr = cpu_to_le32 (req->req.dma);
  712. /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */
  713. wmb();
  714. td->dmacount = cpu_to_le32(dmacount);
  715. }
  716. static const u32 dmactl_default =
  717. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  718. BIT(DMA_CLEAR_COUNT_ENABLE) |
  719. /* erratum 0116 workaround part 1 (use POLLING) */
  720. (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) |
  721. BIT(DMA_VALID_BIT_POLLING_ENABLE) |
  722. BIT(DMA_VALID_BIT_ENABLE) |
  723. BIT(DMA_SCATTER_GATHER_ENABLE) |
  724. /* erratum 0116 workaround part 2 (no AUTOSTART) */
  725. BIT(DMA_ENABLE);
  726. static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma)
  727. {
  728. handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50);
  729. }
  730. static inline void stop_dma(struct net2280_dma_regs __iomem *dma)
  731. {
  732. writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
  733. spin_stop_dma(dma);
  734. }
  735. static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma)
  736. {
  737. struct net2280_dma_regs __iomem *dma = ep->dma;
  738. unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION);
  739. if (!(ep->dev->quirks & PLX_2280))
  740. tmp |= BIT(END_OF_CHAIN);
  741. writel(tmp, &dma->dmacount);
  742. writel(readl(&dma->dmastat), &dma->dmastat);
  743. writel(td_dma, &dma->dmadesc);
  744. if (ep->dev->quirks & PLX_PCIE)
  745. dmactl |= BIT(DMA_REQUEST_OUTSTANDING);
  746. writel(dmactl, &dma->dmactl);
  747. /* erratum 0116 workaround part 3: pci arbiter away from net2280 */
  748. (void) readl(&ep->dev->pci->pcimstctl);
  749. writel(BIT(DMA_START), &dma->dmastat);
  750. }
  751. static void start_dma(struct net2280_ep *ep, struct net2280_request *req)
  752. {
  753. u32 tmp;
  754. struct net2280_dma_regs __iomem *dma = ep->dma;
  755. /* FIXME can't use DMA for ZLPs */
  756. /* on this path we "know" there's no dma active (yet) */
  757. WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE));
  758. writel(0, &ep->dma->dmactl);
  759. /* previous OUT packet might have been short */
  760. if (!ep->is_in && (readl(&ep->regs->ep_stat) &
  761. BIT(NAK_OUT_PACKETS))) {
  762. writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT),
  763. &ep->regs->ep_stat);
  764. tmp = readl(&ep->regs->ep_avail);
  765. if (tmp) {
  766. writel(readl(&dma->dmastat), &dma->dmastat);
  767. /* transfer all/some fifo data */
  768. writel(req->req.dma, &dma->dmaaddr);
  769. tmp = min(tmp, req->req.length);
  770. /* dma irq, faking scatterlist status */
  771. req->td->dmacount = cpu_to_le32(req->req.length - tmp);
  772. writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp,
  773. &dma->dmacount);
  774. req->td->dmadesc = 0;
  775. req->valid = 1;
  776. writel(BIT(DMA_ENABLE), &dma->dmactl);
  777. writel(BIT(DMA_START), &dma->dmastat);
  778. return;
  779. }
  780. stop_out_naking(ep);
  781. }
  782. tmp = dmactl_default;
  783. /* force packet boundaries between dma requests, but prevent the
  784. * controller from automagically writing a last "short" packet
  785. * (zero length) unless the driver explicitly said to do that.
  786. */
  787. if (ep->is_in) {
  788. if (likely((req->req.length % ep->ep.maxpacket) ||
  789. req->req.zero)){
  790. tmp |= BIT(DMA_FIFO_VALIDATE);
  791. ep->in_fifo_validate = 1;
  792. } else
  793. ep->in_fifo_validate = 0;
  794. }
  795. /* init req->td, pointing to the current dummy */
  796. req->td->dmadesc = cpu_to_le32 (ep->td_dma);
  797. fill_dma_desc(ep, req, 1);
  798. req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN));
  799. start_queue(ep, tmp, req->td_dma);
  800. }
  801. static inline void
  802. queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid)
  803. {
  804. struct net2280_dma *end;
  805. dma_addr_t tmp;
  806. /* swap new dummy for old, link; fill and maybe activate */
  807. end = ep->dummy;
  808. ep->dummy = req->td;
  809. req->td = end;
  810. tmp = ep->td_dma;
  811. ep->td_dma = req->td_dma;
  812. req->td_dma = tmp;
  813. end->dmadesc = cpu_to_le32 (ep->td_dma);
  814. fill_dma_desc(ep, req, valid);
  815. }
  816. static void
  817. done(struct net2280_ep *ep, struct net2280_request *req, int status)
  818. {
  819. struct net2280 *dev;
  820. unsigned stopped = ep->stopped;
  821. list_del_init(&req->queue);
  822. if (req->req.status == -EINPROGRESS)
  823. req->req.status = status;
  824. else
  825. status = req->req.status;
  826. dev = ep->dev;
  827. if (ep->dma)
  828. usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in);
  829. if (status && status != -ESHUTDOWN)
  830. ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n",
  831. ep->ep.name, &req->req, status,
  832. req->req.actual, req->req.length);
  833. /* don't modify queue heads during completion callback */
  834. ep->stopped = 1;
  835. spin_unlock(&dev->lock);
  836. usb_gadget_giveback_request(&ep->ep, &req->req);
  837. spin_lock(&dev->lock);
  838. ep->stopped = stopped;
  839. }
  840. /*-------------------------------------------------------------------------*/
  841. static int
  842. net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
  843. {
  844. struct net2280_request *req;
  845. struct net2280_ep *ep;
  846. struct net2280 *dev;
  847. unsigned long flags;
  848. int ret = 0;
  849. /* we always require a cpu-view buffer, so that we can
  850. * always use pio (as fallback or whatever).
  851. */
  852. ep = container_of(_ep, struct net2280_ep, ep);
  853. if (!_ep || (!ep->desc && ep->num != 0)) {
  854. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  855. return -EINVAL;
  856. }
  857. req = container_of(_req, struct net2280_request, req);
  858. if (!_req || !_req->complete || !_req->buf ||
  859. !list_empty(&req->queue)) {
  860. ret = -EINVAL;
  861. goto print_err;
  862. }
  863. if (_req->length > (~0 & DMA_BYTE_COUNT_MASK)) {
  864. ret = -EDOM;
  865. goto print_err;
  866. }
  867. dev = ep->dev;
  868. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  869. ret = -ESHUTDOWN;
  870. goto print_err;
  871. }
  872. /* FIXME implement PIO fallback for ZLPs with DMA */
  873. if (ep->dma && _req->length == 0) {
  874. ret = -EOPNOTSUPP;
  875. goto print_err;
  876. }
  877. /* set up dma mapping in case the caller didn't */
  878. if (ep->dma) {
  879. ret = usb_gadget_map_request(&dev->gadget, _req,
  880. ep->is_in);
  881. if (ret)
  882. goto print_err;
  883. }
  884. ep_vdbg(dev, "%s queue req %p, len %d buf %p\n",
  885. _ep->name, _req, _req->length, _req->buf);
  886. spin_lock_irqsave(&dev->lock, flags);
  887. _req->status = -EINPROGRESS;
  888. _req->actual = 0;
  889. /* kickstart this i/o queue? */
  890. if (list_empty(&ep->queue) && !ep->stopped &&
  891. !((dev->quirks & PLX_PCIE) && ep->dma &&
  892. (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)))) {
  893. /* use DMA if the endpoint supports it, else pio */
  894. if (ep->dma)
  895. start_dma(ep, req);
  896. else {
  897. /* maybe there's no control data, just status ack */
  898. if (ep->num == 0 && _req->length == 0) {
  899. allow_status(ep);
  900. done(ep, req, 0);
  901. ep_vdbg(dev, "%s status ack\n", ep->ep.name);
  902. goto done;
  903. }
  904. /* PIO ... stuff the fifo, or unblock it. */
  905. if (ep->is_in)
  906. write_fifo(ep, _req);
  907. else if (list_empty(&ep->queue)) {
  908. u32 s;
  909. /* OUT FIFO might have packet(s) buffered */
  910. s = readl(&ep->regs->ep_stat);
  911. if ((s & BIT(FIFO_EMPTY)) == 0) {
  912. /* note: _req->short_not_ok is
  913. * ignored here since PIO _always_
  914. * stops queue advance here, and
  915. * _req->status doesn't change for
  916. * short reads (only _req->actual)
  917. */
  918. if (read_fifo(ep, req) &&
  919. ep->num == 0) {
  920. done(ep, req, 0);
  921. allow_status(ep);
  922. /* don't queue it */
  923. req = NULL;
  924. } else if (read_fifo(ep, req) &&
  925. ep->num != 0) {
  926. done(ep, req, 0);
  927. req = NULL;
  928. } else
  929. s = readl(&ep->regs->ep_stat);
  930. }
  931. /* don't NAK, let the fifo fill */
  932. if (req && (s & BIT(NAK_OUT_PACKETS)))
  933. writel(BIT(CLEAR_NAK_OUT_PACKETS),
  934. &ep->regs->ep_rsp);
  935. }
  936. }
  937. } else if (ep->dma) {
  938. int valid = 1;
  939. if (ep->is_in) {
  940. int expect;
  941. /* preventing magic zlps is per-engine state, not
  942. * per-transfer; irq logic must recover hiccups.
  943. */
  944. expect = likely(req->req.zero ||
  945. (req->req.length % ep->ep.maxpacket));
  946. if (expect != ep->in_fifo_validate)
  947. valid = 0;
  948. }
  949. queue_dma(ep, req, valid);
  950. } /* else the irq handler advances the queue. */
  951. ep->responded = 1;
  952. if (req)
  953. list_add_tail(&req->queue, &ep->queue);
  954. done:
  955. spin_unlock_irqrestore(&dev->lock, flags);
  956. /* pci writes may still be posted */
  957. return ret;
  958. print_err:
  959. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, ret);
  960. return ret;
  961. }
  962. static inline void
  963. dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount,
  964. int status)
  965. {
  966. req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount);
  967. done(ep, req, status);
  968. }
  969. static int scan_dma_completions(struct net2280_ep *ep)
  970. {
  971. int num_completed = 0;
  972. /* only look at descriptors that were "naturally" retired,
  973. * so fifo and list head state won't matter
  974. */
  975. while (!list_empty(&ep->queue)) {
  976. struct net2280_request *req;
  977. u32 req_dma_count;
  978. req = list_entry(ep->queue.next,
  979. struct net2280_request, queue);
  980. if (!req->valid)
  981. break;
  982. rmb();
  983. req_dma_count = le32_to_cpup(&req->td->dmacount);
  984. if ((req_dma_count & BIT(VALID_BIT)) != 0)
  985. break;
  986. /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short"
  987. * cases where DMA must be aborted; this code handles
  988. * all non-abort DMA completions.
  989. */
  990. if (unlikely(req->td->dmadesc == 0)) {
  991. /* paranoia */
  992. u32 const ep_dmacount = readl(&ep->dma->dmacount);
  993. if (ep_dmacount & DMA_BYTE_COUNT_MASK)
  994. break;
  995. /* single transfer mode */
  996. dma_done(ep, req, req_dma_count, 0);
  997. num_completed++;
  998. break;
  999. } else if (!ep->is_in &&
  1000. (req->req.length % ep->ep.maxpacket) &&
  1001. !(ep->dev->quirks & PLX_PCIE)) {
  1002. u32 const ep_stat = readl(&ep->regs->ep_stat);
  1003. /* AVOID TROUBLE HERE by not issuing short reads from
  1004. * your gadget driver. That helps avoids errata 0121,
  1005. * 0122, and 0124; not all cases trigger the warning.
  1006. */
  1007. if ((ep_stat & BIT(NAK_OUT_PACKETS)) == 0) {
  1008. ep_warn(ep->dev, "%s lost packet sync!\n",
  1009. ep->ep.name);
  1010. req->req.status = -EOVERFLOW;
  1011. } else {
  1012. u32 const ep_avail = readl(&ep->regs->ep_avail);
  1013. if (ep_avail) {
  1014. /* fifo gets flushed later */
  1015. ep->out_overflow = 1;
  1016. ep_dbg(ep->dev,
  1017. "%s dma, discard %d len %d\n",
  1018. ep->ep.name, ep_avail,
  1019. req->req.length);
  1020. req->req.status = -EOVERFLOW;
  1021. }
  1022. }
  1023. }
  1024. dma_done(ep, req, req_dma_count, 0);
  1025. num_completed++;
  1026. }
  1027. return num_completed;
  1028. }
  1029. static void restart_dma(struct net2280_ep *ep)
  1030. {
  1031. struct net2280_request *req;
  1032. if (ep->stopped)
  1033. return;
  1034. req = list_entry(ep->queue.next, struct net2280_request, queue);
  1035. start_dma(ep, req);
  1036. }
  1037. static void abort_dma(struct net2280_ep *ep)
  1038. {
  1039. /* abort the current transfer */
  1040. if (likely(!list_empty(&ep->queue))) {
  1041. /* FIXME work around errata 0121, 0122, 0124 */
  1042. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  1043. spin_stop_dma(ep->dma);
  1044. } else
  1045. stop_dma(ep->dma);
  1046. scan_dma_completions(ep);
  1047. }
  1048. /* dequeue ALL requests */
  1049. static void nuke(struct net2280_ep *ep)
  1050. {
  1051. struct net2280_request *req;
  1052. /* called with spinlock held */
  1053. ep->stopped = 1;
  1054. if (ep->dma)
  1055. abort_dma(ep);
  1056. while (!list_empty(&ep->queue)) {
  1057. req = list_entry(ep->queue.next,
  1058. struct net2280_request,
  1059. queue);
  1060. done(ep, req, -ESHUTDOWN);
  1061. }
  1062. }
  1063. /* dequeue JUST ONE request */
  1064. static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1065. {
  1066. struct net2280_ep *ep;
  1067. struct net2280_request *req;
  1068. unsigned long flags;
  1069. u32 dmactl;
  1070. int stopped;
  1071. ep = container_of(_ep, struct net2280_ep, ep);
  1072. if (!_ep || (!ep->desc && ep->num != 0) || !_req) {
  1073. pr_err("%s: Invalid ep=%p or ep->desc or req=%p\n",
  1074. __func__, _ep, _req);
  1075. return -EINVAL;
  1076. }
  1077. spin_lock_irqsave(&ep->dev->lock, flags);
  1078. stopped = ep->stopped;
  1079. /* quiesce dma while we patch the queue */
  1080. dmactl = 0;
  1081. ep->stopped = 1;
  1082. if (ep->dma) {
  1083. dmactl = readl(&ep->dma->dmactl);
  1084. /* WARNING erratum 0127 may kick in ... */
  1085. stop_dma(ep->dma);
  1086. scan_dma_completions(ep);
  1087. }
  1088. /* make sure it's still queued on this endpoint */
  1089. list_for_each_entry(req, &ep->queue, queue) {
  1090. if (&req->req == _req)
  1091. break;
  1092. }
  1093. if (&req->req != _req) {
  1094. ep->stopped = stopped;
  1095. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1096. ep_dbg(ep->dev, "%s: Request mismatch\n", __func__);
  1097. return -EINVAL;
  1098. }
  1099. /* queue head may be partially complete. */
  1100. if (ep->queue.next == &req->queue) {
  1101. if (ep->dma) {
  1102. ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name);
  1103. _req->status = -ECONNRESET;
  1104. abort_dma(ep);
  1105. if (likely(ep->queue.next == &req->queue)) {
  1106. /* NOTE: misreports single-transfer mode*/
  1107. req->td->dmacount = 0; /* invalidate */
  1108. dma_done(ep, req,
  1109. readl(&ep->dma->dmacount),
  1110. -ECONNRESET);
  1111. }
  1112. } else {
  1113. ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name);
  1114. done(ep, req, -ECONNRESET);
  1115. }
  1116. req = NULL;
  1117. }
  1118. if (req)
  1119. done(ep, req, -ECONNRESET);
  1120. ep->stopped = stopped;
  1121. if (ep->dma) {
  1122. /* turn off dma on inactive queues */
  1123. if (list_empty(&ep->queue))
  1124. stop_dma(ep->dma);
  1125. else if (!ep->stopped) {
  1126. /* resume current request, or start new one */
  1127. if (req)
  1128. writel(dmactl, &ep->dma->dmactl);
  1129. else
  1130. start_dma(ep, list_entry(ep->queue.next,
  1131. struct net2280_request, queue));
  1132. }
  1133. }
  1134. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1135. return 0;
  1136. }
  1137. /*-------------------------------------------------------------------------*/
  1138. static int net2280_fifo_status(struct usb_ep *_ep);
  1139. static int
  1140. net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged)
  1141. {
  1142. struct net2280_ep *ep;
  1143. unsigned long flags;
  1144. int retval = 0;
  1145. ep = container_of(_ep, struct net2280_ep, ep);
  1146. if (!_ep || (!ep->desc && ep->num != 0)) {
  1147. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1148. return -EINVAL;
  1149. }
  1150. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1151. retval = -ESHUTDOWN;
  1152. goto print_err;
  1153. }
  1154. if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03)
  1155. == USB_ENDPOINT_XFER_ISOC) {
  1156. retval = -EINVAL;
  1157. goto print_err;
  1158. }
  1159. spin_lock_irqsave(&ep->dev->lock, flags);
  1160. if (!list_empty(&ep->queue)) {
  1161. retval = -EAGAIN;
  1162. goto print_unlock;
  1163. } else if (ep->is_in && value && net2280_fifo_status(_ep) != 0) {
  1164. retval = -EAGAIN;
  1165. goto print_unlock;
  1166. } else {
  1167. ep_vdbg(ep->dev, "%s %s %s\n", _ep->name,
  1168. value ? "set" : "clear",
  1169. wedged ? "wedge" : "halt");
  1170. /* set/clear, then synch memory views with the device */
  1171. if (value) {
  1172. if (ep->num == 0)
  1173. ep->dev->protocol_stall = 1;
  1174. else
  1175. set_halt(ep);
  1176. if (wedged)
  1177. ep->wedged = 1;
  1178. } else {
  1179. clear_halt(ep);
  1180. if (ep->dev->quirks & PLX_PCIE &&
  1181. !list_empty(&ep->queue) && ep->td_dma)
  1182. restart_dma(ep);
  1183. ep->wedged = 0;
  1184. }
  1185. (void) readl(&ep->regs->ep_rsp);
  1186. }
  1187. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1188. return retval;
  1189. print_unlock:
  1190. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1191. print_err:
  1192. dev_err(&ep->dev->pdev->dev, "%s: error=%d\n", __func__, retval);
  1193. return retval;
  1194. }
  1195. static int net2280_set_halt(struct usb_ep *_ep, int value)
  1196. {
  1197. return net2280_set_halt_and_wedge(_ep, value, 0);
  1198. }
  1199. static int net2280_set_wedge(struct usb_ep *_ep)
  1200. {
  1201. if (!_ep || _ep->name == ep0name) {
  1202. pr_err("%s: Invalid ep=%p or ep0\n", __func__, _ep);
  1203. return -EINVAL;
  1204. }
  1205. return net2280_set_halt_and_wedge(_ep, 1, 1);
  1206. }
  1207. static int net2280_fifo_status(struct usb_ep *_ep)
  1208. {
  1209. struct net2280_ep *ep;
  1210. u32 avail;
  1211. ep = container_of(_ep, struct net2280_ep, ep);
  1212. if (!_ep || (!ep->desc && ep->num != 0)) {
  1213. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1214. return -ENODEV;
  1215. }
  1216. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1217. dev_err(&ep->dev->pdev->dev,
  1218. "%s: Invalid driver=%p or speed=%d\n",
  1219. __func__, ep->dev->driver, ep->dev->gadget.speed);
  1220. return -ESHUTDOWN;
  1221. }
  1222. avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
  1223. if (avail > ep->fifo_size) {
  1224. dev_err(&ep->dev->pdev->dev, "%s: Fifo overflow\n", __func__);
  1225. return -EOVERFLOW;
  1226. }
  1227. if (ep->is_in)
  1228. avail = ep->fifo_size - avail;
  1229. return avail;
  1230. }
  1231. static void net2280_fifo_flush(struct usb_ep *_ep)
  1232. {
  1233. struct net2280_ep *ep;
  1234. ep = container_of(_ep, struct net2280_ep, ep);
  1235. if (!_ep || (!ep->desc && ep->num != 0)) {
  1236. pr_err("%s: Invalid ep=%p or ep->desc\n", __func__, _ep);
  1237. return;
  1238. }
  1239. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN) {
  1240. dev_err(&ep->dev->pdev->dev,
  1241. "%s: Invalid driver=%p or speed=%d\n",
  1242. __func__, ep->dev->driver, ep->dev->gadget.speed);
  1243. return;
  1244. }
  1245. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  1246. (void) readl(&ep->regs->ep_rsp);
  1247. }
  1248. static const struct usb_ep_ops net2280_ep_ops = {
  1249. .enable = net2280_enable,
  1250. .disable = net2280_disable,
  1251. .alloc_request = net2280_alloc_request,
  1252. .free_request = net2280_free_request,
  1253. .queue = net2280_queue,
  1254. .dequeue = net2280_dequeue,
  1255. .set_halt = net2280_set_halt,
  1256. .set_wedge = net2280_set_wedge,
  1257. .fifo_status = net2280_fifo_status,
  1258. .fifo_flush = net2280_fifo_flush,
  1259. };
  1260. /*-------------------------------------------------------------------------*/
  1261. static int net2280_get_frame(struct usb_gadget *_gadget)
  1262. {
  1263. struct net2280 *dev;
  1264. unsigned long flags;
  1265. u16 retval;
  1266. if (!_gadget)
  1267. return -ENODEV;
  1268. dev = container_of(_gadget, struct net2280, gadget);
  1269. spin_lock_irqsave(&dev->lock, flags);
  1270. retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff;
  1271. spin_unlock_irqrestore(&dev->lock, flags);
  1272. return retval;
  1273. }
  1274. static int net2280_wakeup(struct usb_gadget *_gadget)
  1275. {
  1276. struct net2280 *dev;
  1277. u32 tmp;
  1278. unsigned long flags;
  1279. if (!_gadget)
  1280. return 0;
  1281. dev = container_of(_gadget, struct net2280, gadget);
  1282. spin_lock_irqsave(&dev->lock, flags);
  1283. tmp = readl(&dev->usb->usbctl);
  1284. if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE))
  1285. writel(BIT(GENERATE_RESUME), &dev->usb->usbstat);
  1286. spin_unlock_irqrestore(&dev->lock, flags);
  1287. /* pci writes may still be posted */
  1288. return 0;
  1289. }
  1290. static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value)
  1291. {
  1292. struct net2280 *dev;
  1293. u32 tmp;
  1294. unsigned long flags;
  1295. if (!_gadget)
  1296. return 0;
  1297. dev = container_of(_gadget, struct net2280, gadget);
  1298. spin_lock_irqsave(&dev->lock, flags);
  1299. tmp = readl(&dev->usb->usbctl);
  1300. if (value) {
  1301. tmp |= BIT(SELF_POWERED_STATUS);
  1302. _gadget->is_selfpowered = 1;
  1303. } else {
  1304. tmp &= ~BIT(SELF_POWERED_STATUS);
  1305. _gadget->is_selfpowered = 0;
  1306. }
  1307. writel(tmp, &dev->usb->usbctl);
  1308. spin_unlock_irqrestore(&dev->lock, flags);
  1309. return 0;
  1310. }
  1311. static int net2280_pullup(struct usb_gadget *_gadget, int is_on)
  1312. {
  1313. struct net2280 *dev;
  1314. u32 tmp;
  1315. unsigned long flags;
  1316. if (!_gadget)
  1317. return -ENODEV;
  1318. dev = container_of(_gadget, struct net2280, gadget);
  1319. spin_lock_irqsave(&dev->lock, flags);
  1320. tmp = readl(&dev->usb->usbctl);
  1321. dev->softconnect = (is_on != 0);
  1322. if (is_on) {
  1323. ep0_start(dev);
  1324. writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
  1325. } else {
  1326. writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
  1327. stop_activity(dev, NULL);
  1328. }
  1329. spin_unlock_irqrestore(&dev->lock, flags);
  1330. if (!is_on && dev->driver)
  1331. dev->driver->disconnect(&dev->gadget);
  1332. return 0;
  1333. }
  1334. static struct usb_ep *net2280_match_ep(struct usb_gadget *_gadget,
  1335. struct usb_endpoint_descriptor *desc,
  1336. struct usb_ss_ep_comp_descriptor *ep_comp)
  1337. {
  1338. char name[8];
  1339. struct usb_ep *ep;
  1340. if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT) {
  1341. /* ep-e, ep-f are PIO with only 64 byte fifos */
  1342. ep = gadget_find_ep_by_name(_gadget, "ep-e");
  1343. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1344. return ep;
  1345. ep = gadget_find_ep_by_name(_gadget, "ep-f");
  1346. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1347. return ep;
  1348. }
  1349. /* USB3380: Only first four endpoints have DMA channels. Allocate
  1350. * slower interrupt endpoints from PIO hw endpoints, to allow bulk/isoc
  1351. * endpoints use DMA hw endpoints.
  1352. */
  1353. if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT &&
  1354. usb_endpoint_dir_in(desc)) {
  1355. ep = gadget_find_ep_by_name(_gadget, "ep2in");
  1356. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1357. return ep;
  1358. ep = gadget_find_ep_by_name(_gadget, "ep4in");
  1359. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1360. return ep;
  1361. } else if (usb_endpoint_type(desc) == USB_ENDPOINT_XFER_INT &&
  1362. !usb_endpoint_dir_in(desc)) {
  1363. ep = gadget_find_ep_by_name(_gadget, "ep1out");
  1364. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1365. return ep;
  1366. ep = gadget_find_ep_by_name(_gadget, "ep3out");
  1367. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1368. return ep;
  1369. } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK &&
  1370. usb_endpoint_dir_in(desc)) {
  1371. ep = gadget_find_ep_by_name(_gadget, "ep1in");
  1372. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1373. return ep;
  1374. ep = gadget_find_ep_by_name(_gadget, "ep3in");
  1375. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1376. return ep;
  1377. } else if (usb_endpoint_type(desc) != USB_ENDPOINT_XFER_BULK &&
  1378. !usb_endpoint_dir_in(desc)) {
  1379. ep = gadget_find_ep_by_name(_gadget, "ep2out");
  1380. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1381. return ep;
  1382. ep = gadget_find_ep_by_name(_gadget, "ep4out");
  1383. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1384. return ep;
  1385. }
  1386. /* USB3380: use same address for usb and hardware endpoints */
  1387. snprintf(name, sizeof(name), "ep%d%s", usb_endpoint_num(desc),
  1388. usb_endpoint_dir_in(desc) ? "in" : "out");
  1389. ep = gadget_find_ep_by_name(_gadget, name);
  1390. if (ep && usb_gadget_ep_match_desc(_gadget, ep, desc, ep_comp))
  1391. return ep;
  1392. return NULL;
  1393. }
  1394. static int net2280_start(struct usb_gadget *_gadget,
  1395. struct usb_gadget_driver *driver);
  1396. static int net2280_stop(struct usb_gadget *_gadget);
  1397. static const struct usb_gadget_ops net2280_ops = {
  1398. .get_frame = net2280_get_frame,
  1399. .wakeup = net2280_wakeup,
  1400. .set_selfpowered = net2280_set_selfpowered,
  1401. .pullup = net2280_pullup,
  1402. .udc_start = net2280_start,
  1403. .udc_stop = net2280_stop,
  1404. .match_ep = net2280_match_ep,
  1405. };
  1406. /*-------------------------------------------------------------------------*/
  1407. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  1408. /* FIXME move these into procfs, and use seq_file.
  1409. * Sysfs _still_ doesn't behave for arbitrarily sized files,
  1410. * and also doesn't help products using this with 2.4 kernels.
  1411. */
  1412. /* "function" sysfs attribute */
  1413. static ssize_t function_show(struct device *_dev, struct device_attribute *attr,
  1414. char *buf)
  1415. {
  1416. struct net2280 *dev = dev_get_drvdata(_dev);
  1417. if (!dev->driver || !dev->driver->function ||
  1418. strlen(dev->driver->function) > PAGE_SIZE)
  1419. return 0;
  1420. return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
  1421. }
  1422. static DEVICE_ATTR_RO(function);
  1423. static ssize_t registers_show(struct device *_dev,
  1424. struct device_attribute *attr, char *buf)
  1425. {
  1426. struct net2280 *dev;
  1427. char *next;
  1428. unsigned size, t;
  1429. unsigned long flags;
  1430. int i;
  1431. u32 t1, t2;
  1432. const char *s;
  1433. dev = dev_get_drvdata(_dev);
  1434. next = buf;
  1435. size = PAGE_SIZE;
  1436. spin_lock_irqsave(&dev->lock, flags);
  1437. if (dev->driver)
  1438. s = dev->driver->driver.name;
  1439. else
  1440. s = "(none)";
  1441. /* Main Control Registers */
  1442. t = scnprintf(next, size, "%s version " DRIVER_VERSION
  1443. ", chiprev %04x\n\n"
  1444. "devinit %03x fifoctl %08x gadget '%s'\n"
  1445. "pci irqenb0 %02x irqenb1 %08x "
  1446. "irqstat0 %04x irqstat1 %08x\n",
  1447. driver_name, dev->chiprev,
  1448. readl(&dev->regs->devinit),
  1449. readl(&dev->regs->fifoctl),
  1450. s,
  1451. readl(&dev->regs->pciirqenb0),
  1452. readl(&dev->regs->pciirqenb1),
  1453. readl(&dev->regs->irqstat0),
  1454. readl(&dev->regs->irqstat1));
  1455. size -= t;
  1456. next += t;
  1457. /* USB Control Registers */
  1458. t1 = readl(&dev->usb->usbctl);
  1459. t2 = readl(&dev->usb->usbstat);
  1460. if (t1 & BIT(VBUS_PIN)) {
  1461. if (t2 & BIT(HIGH_SPEED))
  1462. s = "high speed";
  1463. else if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  1464. s = "powered";
  1465. else
  1466. s = "full speed";
  1467. /* full speed bit (6) not working?? */
  1468. } else
  1469. s = "not attached";
  1470. t = scnprintf(next, size,
  1471. "stdrsp %08x usbctl %08x usbstat %08x "
  1472. "addr 0x%02x (%s)\n",
  1473. readl(&dev->usb->stdrsp), t1, t2,
  1474. readl(&dev->usb->ouraddr), s);
  1475. size -= t;
  1476. next += t;
  1477. /* PCI Master Control Registers */
  1478. /* DMA Control Registers */
  1479. /* Configurable EP Control Registers */
  1480. for (i = 0; i < dev->n_ep; i++) {
  1481. struct net2280_ep *ep;
  1482. ep = &dev->ep[i];
  1483. if (i && !ep->desc)
  1484. continue;
  1485. t1 = readl(&ep->cfg->ep_cfg);
  1486. t2 = readl(&ep->regs->ep_rsp) & 0xff;
  1487. t = scnprintf(next, size,
  1488. "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s"
  1489. "irqenb %02x\n",
  1490. ep->ep.name, t1, t2,
  1491. (t2 & BIT(CLEAR_NAK_OUT_PACKETS))
  1492. ? "NAK " : "",
  1493. (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE))
  1494. ? "hide " : "",
  1495. (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR))
  1496. ? "CRC " : "",
  1497. (t2 & BIT(CLEAR_INTERRUPT_MODE))
  1498. ? "interrupt " : "",
  1499. (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE))
  1500. ? "status " : "",
  1501. (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE))
  1502. ? "NAKmode " : "",
  1503. (t2 & BIT(CLEAR_ENDPOINT_TOGGLE))
  1504. ? "DATA1 " : "DATA0 ",
  1505. (t2 & BIT(CLEAR_ENDPOINT_HALT))
  1506. ? "HALT " : "",
  1507. readl(&ep->regs->ep_irqenb));
  1508. size -= t;
  1509. next += t;
  1510. t = scnprintf(next, size,
  1511. "\tstat %08x avail %04x "
  1512. "(ep%d%s-%s)%s\n",
  1513. readl(&ep->regs->ep_stat),
  1514. readl(&ep->regs->ep_avail),
  1515. t1 & 0x0f, DIR_STRING(t1),
  1516. type_string(t1 >> 8),
  1517. ep->stopped ? "*" : "");
  1518. size -= t;
  1519. next += t;
  1520. if (!ep->dma)
  1521. continue;
  1522. t = scnprintf(next, size,
  1523. " dma\tctl %08x stat %08x count %08x\n"
  1524. "\taddr %08x desc %08x\n",
  1525. readl(&ep->dma->dmactl),
  1526. readl(&ep->dma->dmastat),
  1527. readl(&ep->dma->dmacount),
  1528. readl(&ep->dma->dmaaddr),
  1529. readl(&ep->dma->dmadesc));
  1530. size -= t;
  1531. next += t;
  1532. }
  1533. /* Indexed Registers (none yet) */
  1534. /* Statistics */
  1535. t = scnprintf(next, size, "\nirqs: ");
  1536. size -= t;
  1537. next += t;
  1538. for (i = 0; i < dev->n_ep; i++) {
  1539. struct net2280_ep *ep;
  1540. ep = &dev->ep[i];
  1541. if (i && !ep->irqs)
  1542. continue;
  1543. t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs);
  1544. size -= t;
  1545. next += t;
  1546. }
  1547. t = scnprintf(next, size, "\n");
  1548. size -= t;
  1549. next += t;
  1550. spin_unlock_irqrestore(&dev->lock, flags);
  1551. return PAGE_SIZE - size;
  1552. }
  1553. static DEVICE_ATTR_RO(registers);
  1554. static ssize_t queues_show(struct device *_dev, struct device_attribute *attr,
  1555. char *buf)
  1556. {
  1557. struct net2280 *dev;
  1558. char *next;
  1559. unsigned size;
  1560. unsigned long flags;
  1561. int i;
  1562. dev = dev_get_drvdata(_dev);
  1563. next = buf;
  1564. size = PAGE_SIZE;
  1565. spin_lock_irqsave(&dev->lock, flags);
  1566. for (i = 0; i < dev->n_ep; i++) {
  1567. struct net2280_ep *ep = &dev->ep[i];
  1568. struct net2280_request *req;
  1569. int t;
  1570. if (i != 0) {
  1571. const struct usb_endpoint_descriptor *d;
  1572. d = ep->desc;
  1573. if (!d)
  1574. continue;
  1575. t = d->bEndpointAddress;
  1576. t = scnprintf(next, size,
  1577. "\n%s (ep%d%s-%s) max %04x %s fifo %d\n",
  1578. ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK,
  1579. (t & USB_DIR_IN) ? "in" : "out",
  1580. type_string(d->bmAttributes),
  1581. usb_endpoint_maxp(d),
  1582. ep->dma ? "dma" : "pio", ep->fifo_size
  1583. );
  1584. } else /* ep0 should only have one transfer queued */
  1585. t = scnprintf(next, size, "ep0 max 64 pio %s\n",
  1586. ep->is_in ? "in" : "out");
  1587. if (t <= 0 || t > size)
  1588. goto done;
  1589. size -= t;
  1590. next += t;
  1591. if (list_empty(&ep->queue)) {
  1592. t = scnprintf(next, size, "\t(nothing queued)\n");
  1593. if (t <= 0 || t > size)
  1594. goto done;
  1595. size -= t;
  1596. next += t;
  1597. continue;
  1598. }
  1599. list_for_each_entry(req, &ep->queue, queue) {
  1600. if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc))
  1601. t = scnprintf(next, size,
  1602. "\treq %p len %d/%d "
  1603. "buf %p (dmacount %08x)\n",
  1604. &req->req, req->req.actual,
  1605. req->req.length, req->req.buf,
  1606. readl(&ep->dma->dmacount));
  1607. else
  1608. t = scnprintf(next, size,
  1609. "\treq %p len %d/%d buf %p\n",
  1610. &req->req, req->req.actual,
  1611. req->req.length, req->req.buf);
  1612. if (t <= 0 || t > size)
  1613. goto done;
  1614. size -= t;
  1615. next += t;
  1616. if (ep->dma) {
  1617. struct net2280_dma *td;
  1618. td = req->td;
  1619. t = scnprintf(next, size, "\t td %08x "
  1620. " count %08x buf %08x desc %08x\n",
  1621. (u32) req->td_dma,
  1622. le32_to_cpu(td->dmacount),
  1623. le32_to_cpu(td->dmaaddr),
  1624. le32_to_cpu(td->dmadesc));
  1625. if (t <= 0 || t > size)
  1626. goto done;
  1627. size -= t;
  1628. next += t;
  1629. }
  1630. }
  1631. }
  1632. done:
  1633. spin_unlock_irqrestore(&dev->lock, flags);
  1634. return PAGE_SIZE - size;
  1635. }
  1636. static DEVICE_ATTR_RO(queues);
  1637. #else
  1638. #define device_create_file(a, b) (0)
  1639. #define device_remove_file(a, b) do { } while (0)
  1640. #endif
  1641. /*-------------------------------------------------------------------------*/
  1642. /* another driver-specific mode might be a request type doing dma
  1643. * to/from another device fifo instead of to/from memory.
  1644. */
  1645. static void set_fifo_mode(struct net2280 *dev, int mode)
  1646. {
  1647. /* keeping high bits preserves BAR2 */
  1648. writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl);
  1649. /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */
  1650. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1651. list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list);
  1652. list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
  1653. switch (mode) {
  1654. case 0:
  1655. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1656. list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list);
  1657. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024;
  1658. break;
  1659. case 1:
  1660. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048;
  1661. break;
  1662. case 2:
  1663. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1664. dev->ep[1].fifo_size = 2048;
  1665. dev->ep[2].fifo_size = 1024;
  1666. break;
  1667. }
  1668. /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */
  1669. list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list);
  1670. list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list);
  1671. }
  1672. static void defect7374_disable_data_eps(struct net2280 *dev)
  1673. {
  1674. /*
  1675. * For Defect 7374, disable data EPs (and more):
  1676. * - This phase undoes the earlier phase of the Defect 7374 workaround,
  1677. * returing ep regs back to normal.
  1678. */
  1679. struct net2280_ep *ep;
  1680. int i;
  1681. unsigned char ep_sel;
  1682. u32 tmp_reg;
  1683. for (i = 1; i < 5; i++) {
  1684. ep = &dev->ep[i];
  1685. writel(i, &ep->cfg->ep_cfg);
  1686. }
  1687. /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */
  1688. for (i = 0; i < 6; i++)
  1689. writel(0, &dev->dep[i].dep_cfg);
  1690. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1691. /* Select an endpoint for subsequent operations: */
  1692. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1693. writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl);
  1694. if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) ||
  1695. ep_sel == 18 || ep_sel == 20)
  1696. continue;
  1697. /* Change settings on some selected endpoints */
  1698. tmp_reg = readl(&dev->plregs->pl_ep_cfg_4);
  1699. tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR);
  1700. writel(tmp_reg, &dev->plregs->pl_ep_cfg_4);
  1701. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1702. tmp_reg |= BIT(EP_INITIALIZED);
  1703. writel(tmp_reg, &dev->plregs->pl_ep_ctrl);
  1704. }
  1705. }
  1706. static void defect7374_enable_data_eps_zero(struct net2280 *dev)
  1707. {
  1708. u32 tmp = 0, tmp_reg;
  1709. u32 scratch;
  1710. int i;
  1711. unsigned char ep_sel;
  1712. scratch = get_idx_reg(dev->regs, SCRATCH);
  1713. WARN_ON((scratch & (0xf << DEFECT7374_FSM_FIELD))
  1714. == DEFECT7374_FSM_SS_CONTROL_READ);
  1715. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  1716. ep_warn(dev, "Operate Defect 7374 workaround soft this time");
  1717. ep_warn(dev, "It will operate on cold-reboot and SS connect");
  1718. /*GPEPs:*/
  1719. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
  1720. (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
  1721. ((dev->enhanced_mode) ?
  1722. BIT(OUT_ENDPOINT_ENABLE) | BIT(IN_ENDPOINT_ENABLE) :
  1723. BIT(ENDPOINT_ENABLE)));
  1724. for (i = 1; i < 5; i++)
  1725. writel(tmp, &dev->ep[i].cfg->ep_cfg);
  1726. /* CSRIN, PCIIN, STATIN, RCIN*/
  1727. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
  1728. writel(tmp, &dev->dep[1].dep_cfg);
  1729. writel(tmp, &dev->dep[3].dep_cfg);
  1730. writel(tmp, &dev->dep[4].dep_cfg);
  1731. writel(tmp, &dev->dep[5].dep_cfg);
  1732. /*Implemented for development and debug.
  1733. * Can be refined/tuned later.*/
  1734. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1735. /* Select an endpoint for subsequent operations: */
  1736. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1737. writel(((tmp_reg & ~0x1f) | ep_sel),
  1738. &dev->plregs->pl_ep_ctrl);
  1739. if (ep_sel == 1) {
  1740. tmp =
  1741. (readl(&dev->plregs->pl_ep_ctrl) |
  1742. BIT(CLEAR_ACK_ERROR_CODE) | 0);
  1743. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1744. continue;
  1745. }
  1746. if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
  1747. ep_sel == 18 || ep_sel == 20)
  1748. continue;
  1749. tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
  1750. BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
  1751. writel(tmp, &dev->plregs->pl_ep_cfg_4);
  1752. tmp = readl(&dev->plregs->pl_ep_ctrl) &
  1753. ~BIT(EP_INITIALIZED);
  1754. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1755. }
  1756. /* Set FSM to focus on the first Control Read:
  1757. * - Tip: Connection speed is known upon the first
  1758. * setup request.*/
  1759. scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
  1760. set_idx_reg(dev->regs, SCRATCH, scratch);
  1761. }
  1762. /* keeping it simple:
  1763. * - one bus driver, initted first;
  1764. * - one function driver, initted second
  1765. *
  1766. * most of the work to support multiple net2280 controllers would
  1767. * be to associate this gadget driver (yes?) with all of them, or
  1768. * perhaps to bind specific drivers to specific devices.
  1769. */
  1770. static void usb_reset_228x(struct net2280 *dev)
  1771. {
  1772. u32 tmp;
  1773. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1774. (void) readl(&dev->usb->usbctl);
  1775. net2280_led_init(dev);
  1776. /* disable automatic responses, and irqs */
  1777. writel(0, &dev->usb->stdrsp);
  1778. writel(0, &dev->regs->pciirqenb0);
  1779. writel(0, &dev->regs->pciirqenb1);
  1780. /* clear old dma and irq state */
  1781. for (tmp = 0; tmp < 4; tmp++) {
  1782. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1783. if (ep->dma)
  1784. abort_dma(ep);
  1785. }
  1786. writel(~0, &dev->regs->irqstat0),
  1787. writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1),
  1788. /* reset, and enable pci */
  1789. tmp = readl(&dev->regs->devinit) |
  1790. BIT(PCI_ENABLE) |
  1791. BIT(FIFO_SOFT_RESET) |
  1792. BIT(USB_SOFT_RESET) |
  1793. BIT(M8051_RESET);
  1794. writel(tmp, &dev->regs->devinit);
  1795. /* standard fifo and endpoint allocations */
  1796. set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0);
  1797. }
  1798. static void usb_reset_338x(struct net2280 *dev)
  1799. {
  1800. u32 tmp;
  1801. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1802. (void)readl(&dev->usb->usbctl);
  1803. net2280_led_init(dev);
  1804. if (dev->bug7734_patched) {
  1805. /* disable automatic responses, and irqs */
  1806. writel(0, &dev->usb->stdrsp);
  1807. writel(0, &dev->regs->pciirqenb0);
  1808. writel(0, &dev->regs->pciirqenb1);
  1809. }
  1810. /* clear old dma and irq state */
  1811. for (tmp = 0; tmp < 4; tmp++) {
  1812. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1813. struct net2280_dma_regs __iomem *dma;
  1814. if (ep->dma) {
  1815. abort_dma(ep);
  1816. } else {
  1817. dma = &dev->dma[tmp];
  1818. writel(BIT(DMA_ABORT), &dma->dmastat);
  1819. writel(0, &dma->dmactl);
  1820. }
  1821. }
  1822. writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
  1823. if (dev->bug7734_patched) {
  1824. /* reset, and enable pci */
  1825. tmp = readl(&dev->regs->devinit) |
  1826. BIT(PCI_ENABLE) |
  1827. BIT(FIFO_SOFT_RESET) |
  1828. BIT(USB_SOFT_RESET) |
  1829. BIT(M8051_RESET);
  1830. writel(tmp, &dev->regs->devinit);
  1831. }
  1832. /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */
  1833. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1834. for (tmp = 1; tmp < dev->n_ep; tmp++)
  1835. list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list);
  1836. }
  1837. static void usb_reset(struct net2280 *dev)
  1838. {
  1839. if (dev->quirks & PLX_LEGACY)
  1840. return usb_reset_228x(dev);
  1841. return usb_reset_338x(dev);
  1842. }
  1843. static void usb_reinit_228x(struct net2280 *dev)
  1844. {
  1845. u32 tmp;
  1846. /* basic endpoint init */
  1847. for (tmp = 0; tmp < 7; tmp++) {
  1848. struct net2280_ep *ep = &dev->ep[tmp];
  1849. ep->ep.name = ep_info_dft[tmp].name;
  1850. ep->ep.caps = ep_info_dft[tmp].caps;
  1851. ep->dev = dev;
  1852. ep->num = tmp;
  1853. if (tmp > 0 && tmp <= 4) {
  1854. ep->fifo_size = 1024;
  1855. ep->dma = &dev->dma[tmp - 1];
  1856. } else
  1857. ep->fifo_size = 64;
  1858. ep->regs = &dev->epregs[tmp];
  1859. ep->cfg = &dev->epregs[tmp];
  1860. ep_reset_228x(dev->regs, ep);
  1861. }
  1862. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
  1863. usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64);
  1864. usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64);
  1865. dev->gadget.ep0 = &dev->ep[0].ep;
  1866. dev->ep[0].stopped = 0;
  1867. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1868. /* we want to prevent lowlevel/insecure access from the USB host,
  1869. * but erratum 0119 means this enable bit is ignored
  1870. */
  1871. for (tmp = 0; tmp < 5; tmp++)
  1872. writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg);
  1873. }
  1874. static void usb_reinit_338x(struct net2280 *dev)
  1875. {
  1876. int i;
  1877. u32 tmp, val;
  1878. static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 };
  1879. static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00,
  1880. 0x00, 0xC0, 0x00, 0xC0 };
  1881. /* basic endpoint init */
  1882. for (i = 0; i < dev->n_ep; i++) {
  1883. struct net2280_ep *ep = &dev->ep[i];
  1884. ep->ep.name = dev->enhanced_mode ? ep_info_adv[i].name :
  1885. ep_info_dft[i].name;
  1886. ep->ep.caps = dev->enhanced_mode ? ep_info_adv[i].caps :
  1887. ep_info_dft[i].caps;
  1888. ep->dev = dev;
  1889. ep->num = i;
  1890. if (i > 0 && i <= 4)
  1891. ep->dma = &dev->dma[i - 1];
  1892. if (dev->enhanced_mode) {
  1893. ep->cfg = &dev->epregs[ne[i]];
  1894. /*
  1895. * Set USB endpoint number, hardware allows same number
  1896. * in both directions.
  1897. */
  1898. if (i > 0 && i < 5)
  1899. writel(ne[i], &ep->cfg->ep_cfg);
  1900. ep->regs = (struct net2280_ep_regs __iomem *)
  1901. (((void __iomem *)&dev->epregs[ne[i]]) +
  1902. ep_reg_addr[i]);
  1903. } else {
  1904. ep->cfg = &dev->epregs[i];
  1905. ep->regs = &dev->epregs[i];
  1906. }
  1907. ep->fifo_size = (i != 0) ? 2048 : 512;
  1908. ep_reset_338x(dev->regs, ep);
  1909. }
  1910. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512);
  1911. dev->gadget.ep0 = &dev->ep[0].ep;
  1912. dev->ep[0].stopped = 0;
  1913. /* Link layer set up */
  1914. if (dev->bug7734_patched) {
  1915. tmp = readl(&dev->usb_ext->usbctl2) &
  1916. ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE));
  1917. writel(tmp, &dev->usb_ext->usbctl2);
  1918. }
  1919. /* Hardware Defect and Workaround */
  1920. val = readl(&dev->ll_lfps_regs->ll_lfps_5);
  1921. val &= ~(0xf << TIMER_LFPS_6US);
  1922. val |= 0x5 << TIMER_LFPS_6US;
  1923. writel(val, &dev->ll_lfps_regs->ll_lfps_5);
  1924. val = readl(&dev->ll_lfps_regs->ll_lfps_6);
  1925. val &= ~(0xffff << TIMER_LFPS_80US);
  1926. val |= 0x0100 << TIMER_LFPS_80US;
  1927. writel(val, &dev->ll_lfps_regs->ll_lfps_6);
  1928. /*
  1929. * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB
  1930. * Hot Reset Exit Handshake may Fail in Specific Case using
  1931. * Default Register Settings. Workaround for Enumeration test.
  1932. */
  1933. val = readl(&dev->ll_tsn_regs->ll_tsn_counters_2);
  1934. val &= ~(0x1f << HOT_TX_NORESET_TS2);
  1935. val |= 0x10 << HOT_TX_NORESET_TS2;
  1936. writel(val, &dev->ll_tsn_regs->ll_tsn_counters_2);
  1937. val = readl(&dev->ll_tsn_regs->ll_tsn_counters_3);
  1938. val &= ~(0x1f << HOT_RX_RESET_TS2);
  1939. val |= 0x3 << HOT_RX_RESET_TS2;
  1940. writel(val, &dev->ll_tsn_regs->ll_tsn_counters_3);
  1941. /*
  1942. * Set Recovery Idle to Recover bit:
  1943. * - On SS connections, setting Recovery Idle to Recover Fmw improves
  1944. * link robustness with various hosts and hubs.
  1945. * - It is safe to set for all connection speeds; all chip revisions.
  1946. * - R-M-W to leave other bits undisturbed.
  1947. * - Reference PLX TT-7372
  1948. */
  1949. val = readl(&dev->ll_chicken_reg->ll_tsn_chicken_bit);
  1950. val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW);
  1951. writel(val, &dev->ll_chicken_reg->ll_tsn_chicken_bit);
  1952. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1953. /* disable dedicated endpoints */
  1954. writel(0x0D, &dev->dep[0].dep_cfg);
  1955. writel(0x0D, &dev->dep[1].dep_cfg);
  1956. writel(0x0E, &dev->dep[2].dep_cfg);
  1957. writel(0x0E, &dev->dep[3].dep_cfg);
  1958. writel(0x0F, &dev->dep[4].dep_cfg);
  1959. writel(0x0C, &dev->dep[5].dep_cfg);
  1960. }
  1961. static void usb_reinit(struct net2280 *dev)
  1962. {
  1963. if (dev->quirks & PLX_LEGACY)
  1964. return usb_reinit_228x(dev);
  1965. return usb_reinit_338x(dev);
  1966. }
  1967. static void ep0_start_228x(struct net2280 *dev)
  1968. {
  1969. writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  1970. BIT(CLEAR_NAK_OUT_PACKETS) |
  1971. BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
  1972. &dev->epregs[0].ep_rsp);
  1973. /*
  1974. * hardware optionally handles a bunch of standard requests
  1975. * that the API hides from drivers anyway. have it do so.
  1976. * endpoint status/features are handled in software, to
  1977. * help pass tests for some dubious behavior.
  1978. */
  1979. writel(BIT(SET_TEST_MODE) |
  1980. BIT(SET_ADDRESS) |
  1981. BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) |
  1982. BIT(GET_DEVICE_STATUS) |
  1983. BIT(GET_INTERFACE_STATUS),
  1984. &dev->usb->stdrsp);
  1985. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  1986. BIT(SELF_POWERED_USB_DEVICE) |
  1987. BIT(REMOTE_WAKEUP_SUPPORT) |
  1988. (dev->softconnect << USB_DETECT_ENABLE) |
  1989. BIT(SELF_POWERED_STATUS),
  1990. &dev->usb->usbctl);
  1991. /* enable irqs so we can see ep0 and general operation */
  1992. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  1993. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  1994. &dev->regs->pciirqenb0);
  1995. writel(BIT(PCI_INTERRUPT_ENABLE) |
  1996. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  1997. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  1998. BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) |
  1999. BIT(VBUS_INTERRUPT_ENABLE) |
  2000. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  2001. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE),
  2002. &dev->regs->pciirqenb1);
  2003. /* don't leave any writes posted */
  2004. (void) readl(&dev->usb->usbctl);
  2005. }
  2006. static void ep0_start_338x(struct net2280 *dev)
  2007. {
  2008. if (dev->bug7734_patched)
  2009. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  2010. BIT(SET_EP_HIDE_STATUS_PHASE),
  2011. &dev->epregs[0].ep_rsp);
  2012. /*
  2013. * hardware optionally handles a bunch of standard requests
  2014. * that the API hides from drivers anyway. have it do so.
  2015. * endpoint status/features are handled in software, to
  2016. * help pass tests for some dubious behavior.
  2017. */
  2018. writel(BIT(SET_ISOCHRONOUS_DELAY) |
  2019. BIT(SET_SEL) |
  2020. BIT(SET_TEST_MODE) |
  2021. BIT(SET_ADDRESS) |
  2022. BIT(GET_INTERFACE_STATUS) |
  2023. BIT(GET_DEVICE_STATUS),
  2024. &dev->usb->stdrsp);
  2025. dev->wakeup_enable = 1;
  2026. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  2027. (dev->softconnect << USB_DETECT_ENABLE) |
  2028. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2029. &dev->usb->usbctl);
  2030. /* enable irqs so we can see ep0 and general operation */
  2031. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  2032. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  2033. &dev->regs->pciirqenb0);
  2034. writel(BIT(PCI_INTERRUPT_ENABLE) |
  2035. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  2036. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) |
  2037. BIT(VBUS_INTERRUPT_ENABLE),
  2038. &dev->regs->pciirqenb1);
  2039. /* don't leave any writes posted */
  2040. (void)readl(&dev->usb->usbctl);
  2041. }
  2042. static void ep0_start(struct net2280 *dev)
  2043. {
  2044. if (dev->quirks & PLX_LEGACY)
  2045. return ep0_start_228x(dev);
  2046. return ep0_start_338x(dev);
  2047. }
  2048. /* when a driver is successfully registered, it will receive
  2049. * control requests including set_configuration(), which enables
  2050. * non-control requests. then usb traffic follows until a
  2051. * disconnect is reported. then a host may connect again, or
  2052. * the driver might get unbound.
  2053. */
  2054. static int net2280_start(struct usb_gadget *_gadget,
  2055. struct usb_gadget_driver *driver)
  2056. {
  2057. struct net2280 *dev;
  2058. int retval;
  2059. unsigned i;
  2060. /* insist on high speed support from the driver, since
  2061. * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE)
  2062. * "must not be used in normal operation"
  2063. */
  2064. if (!driver || driver->max_speed < USB_SPEED_HIGH ||
  2065. !driver->setup)
  2066. return -EINVAL;
  2067. dev = container_of(_gadget, struct net2280, gadget);
  2068. for (i = 0; i < dev->n_ep; i++)
  2069. dev->ep[i].irqs = 0;
  2070. /* hook up the driver ... */
  2071. driver->driver.bus = NULL;
  2072. dev->driver = driver;
  2073. retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
  2074. if (retval)
  2075. goto err_unbind;
  2076. retval = device_create_file(&dev->pdev->dev, &dev_attr_queues);
  2077. if (retval)
  2078. goto err_func;
  2079. /* enable host detection and ep0; and we're ready
  2080. * for set_configuration as well as eventual disconnect.
  2081. */
  2082. net2280_led_active(dev, 1);
  2083. if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched)
  2084. defect7374_enable_data_eps_zero(dev);
  2085. ep0_start(dev);
  2086. /* pci writes may still be posted */
  2087. return 0;
  2088. err_func:
  2089. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2090. err_unbind:
  2091. dev->driver = NULL;
  2092. return retval;
  2093. }
  2094. static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver)
  2095. {
  2096. int i;
  2097. /* don't disconnect if it's not connected */
  2098. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  2099. driver = NULL;
  2100. /* stop hardware; prevent new request submissions;
  2101. * and kill any outstanding requests.
  2102. */
  2103. usb_reset(dev);
  2104. for (i = 0; i < dev->n_ep; i++)
  2105. nuke(&dev->ep[i]);
  2106. /* report disconnect; the driver is already quiesced */
  2107. if (driver) {
  2108. spin_unlock(&dev->lock);
  2109. driver->disconnect(&dev->gadget);
  2110. spin_lock(&dev->lock);
  2111. }
  2112. usb_reinit(dev);
  2113. }
  2114. static int net2280_stop(struct usb_gadget *_gadget)
  2115. {
  2116. struct net2280 *dev;
  2117. unsigned long flags;
  2118. dev = container_of(_gadget, struct net2280, gadget);
  2119. spin_lock_irqsave(&dev->lock, flags);
  2120. stop_activity(dev, NULL);
  2121. spin_unlock_irqrestore(&dev->lock, flags);
  2122. net2280_led_active(dev, 0);
  2123. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2124. device_remove_file(&dev->pdev->dev, &dev_attr_queues);
  2125. dev->driver = NULL;
  2126. return 0;
  2127. }
  2128. /*-------------------------------------------------------------------------*/
  2129. /* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq.
  2130. * also works for dma-capable endpoints, in pio mode or just
  2131. * to manually advance the queue after short OUT transfers.
  2132. */
  2133. static void handle_ep_small(struct net2280_ep *ep)
  2134. {
  2135. struct net2280_request *req;
  2136. u32 t;
  2137. /* 0 error, 1 mid-data, 2 done */
  2138. int mode = 1;
  2139. if (!list_empty(&ep->queue))
  2140. req = list_entry(ep->queue.next,
  2141. struct net2280_request, queue);
  2142. else
  2143. req = NULL;
  2144. /* ack all, and handle what we care about */
  2145. t = readl(&ep->regs->ep_stat);
  2146. ep->irqs++;
  2147. ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n",
  2148. ep->ep.name, t, req ? &req->req : NULL);
  2149. if (!ep->is_in || (ep->dev->quirks & PLX_2280))
  2150. writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat);
  2151. else
  2152. /* Added for 2282 */
  2153. writel(t, &ep->regs->ep_stat);
  2154. /* for ep0, monitor token irqs to catch data stage length errors
  2155. * and to synchronize on status.
  2156. *
  2157. * also, to defer reporting of protocol stalls ... here's where
  2158. * data or status first appears, handling stalls here should never
  2159. * cause trouble on the host side..
  2160. *
  2161. * control requests could be slightly faster without token synch for
  2162. * status, but status can jam up that way.
  2163. */
  2164. if (unlikely(ep->num == 0)) {
  2165. if (ep->is_in) {
  2166. /* status; stop NAKing */
  2167. if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) {
  2168. if (ep->dev->protocol_stall) {
  2169. ep->stopped = 1;
  2170. set_halt(ep);
  2171. }
  2172. if (!req)
  2173. allow_status(ep);
  2174. mode = 2;
  2175. /* reply to extra IN data tokens with a zlp */
  2176. } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2177. if (ep->dev->protocol_stall) {
  2178. ep->stopped = 1;
  2179. set_halt(ep);
  2180. mode = 2;
  2181. } else if (ep->responded &&
  2182. !req && !ep->stopped)
  2183. write_fifo(ep, NULL);
  2184. }
  2185. } else {
  2186. /* status; stop NAKing */
  2187. if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2188. if (ep->dev->protocol_stall) {
  2189. ep->stopped = 1;
  2190. set_halt(ep);
  2191. }
  2192. mode = 2;
  2193. /* an extra OUT token is an error */
  2194. } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) &&
  2195. req &&
  2196. req->req.actual == req->req.length) ||
  2197. (ep->responded && !req)) {
  2198. ep->dev->protocol_stall = 1;
  2199. set_halt(ep);
  2200. ep->stopped = 1;
  2201. if (req)
  2202. done(ep, req, -EOVERFLOW);
  2203. req = NULL;
  2204. }
  2205. }
  2206. }
  2207. if (unlikely(!req))
  2208. return;
  2209. /* manual DMA queue advance after short OUT */
  2210. if (likely(ep->dma)) {
  2211. if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) {
  2212. struct net2280_request *stuck_req = NULL;
  2213. int stopped = ep->stopped;
  2214. int num_completed;
  2215. int stuck = 0;
  2216. u32 count;
  2217. /* TRANSFERRED works around OUT_DONE erratum 0112.
  2218. * we expect (N <= maxpacket) bytes; host wrote M.
  2219. * iff (M < N) we won't ever see a DMA interrupt.
  2220. */
  2221. ep->stopped = 1;
  2222. for (count = 0; ; t = readl(&ep->regs->ep_stat)) {
  2223. /* any preceding dma transfers must finish.
  2224. * dma handles (M >= N), may empty the queue
  2225. */
  2226. num_completed = scan_dma_completions(ep);
  2227. if (unlikely(list_empty(&ep->queue) ||
  2228. ep->out_overflow)) {
  2229. req = NULL;
  2230. break;
  2231. }
  2232. req = list_entry(ep->queue.next,
  2233. struct net2280_request, queue);
  2234. /* here either (M < N), a "real" short rx;
  2235. * or (M == N) and the queue didn't empty
  2236. */
  2237. if (likely(t & BIT(FIFO_EMPTY))) {
  2238. count = readl(&ep->dma->dmacount);
  2239. count &= DMA_BYTE_COUNT_MASK;
  2240. if (readl(&ep->dma->dmadesc)
  2241. != req->td_dma)
  2242. req = NULL;
  2243. break;
  2244. }
  2245. /* Escape loop if no dma transfers completed
  2246. * after few retries.
  2247. */
  2248. if (num_completed == 0) {
  2249. if (stuck_req == req &&
  2250. readl(&ep->dma->dmadesc) !=
  2251. req->td_dma && stuck++ > 5) {
  2252. count = readl(
  2253. &ep->dma->dmacount);
  2254. count &= DMA_BYTE_COUNT_MASK;
  2255. req = NULL;
  2256. ep_dbg(ep->dev, "%s escape stuck %d, count %u\n",
  2257. ep->ep.name, stuck,
  2258. count);
  2259. break;
  2260. } else if (stuck_req != req) {
  2261. stuck_req = req;
  2262. stuck = 0;
  2263. }
  2264. } else {
  2265. stuck_req = NULL;
  2266. stuck = 0;
  2267. }
  2268. udelay(1);
  2269. }
  2270. /* stop DMA, leave ep NAKing */
  2271. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  2272. spin_stop_dma(ep->dma);
  2273. if (likely(req)) {
  2274. req->td->dmacount = 0;
  2275. t = readl(&ep->regs->ep_avail);
  2276. dma_done(ep, req, count,
  2277. (ep->out_overflow || t)
  2278. ? -EOVERFLOW : 0);
  2279. }
  2280. /* also flush to prevent erratum 0106 trouble */
  2281. if (unlikely(ep->out_overflow ||
  2282. (ep->dev->chiprev == 0x0100 &&
  2283. ep->dev->gadget.speed
  2284. == USB_SPEED_FULL))) {
  2285. out_flush(ep);
  2286. ep->out_overflow = 0;
  2287. }
  2288. /* (re)start dma if needed, stop NAKing */
  2289. ep->stopped = stopped;
  2290. if (!list_empty(&ep->queue))
  2291. restart_dma(ep);
  2292. } else
  2293. ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n",
  2294. ep->ep.name, t);
  2295. return;
  2296. /* data packet(s) received (in the fifo, OUT) */
  2297. } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) {
  2298. if (read_fifo(ep, req) && ep->num != 0)
  2299. mode = 2;
  2300. /* data packet(s) transmitted (IN) */
  2301. } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) {
  2302. unsigned len;
  2303. len = req->req.length - req->req.actual;
  2304. if (len > ep->ep.maxpacket)
  2305. len = ep->ep.maxpacket;
  2306. req->req.actual += len;
  2307. /* if we wrote it all, we're usually done */
  2308. /* send zlps until the status stage */
  2309. if ((req->req.actual == req->req.length) &&
  2310. (!req->req.zero || len != ep->ep.maxpacket) && ep->num)
  2311. mode = 2;
  2312. /* there was nothing to do ... */
  2313. } else if (mode == 1)
  2314. return;
  2315. /* done */
  2316. if (mode == 2) {
  2317. /* stream endpoints often resubmit/unlink in completion */
  2318. done(ep, req, 0);
  2319. /* maybe advance queue to next request */
  2320. if (ep->num == 0) {
  2321. /* NOTE: net2280 could let gadget driver start the
  2322. * status stage later. since not all controllers let
  2323. * them control that, the api doesn't (yet) allow it.
  2324. */
  2325. if (!ep->stopped)
  2326. allow_status(ep);
  2327. req = NULL;
  2328. } else {
  2329. if (!list_empty(&ep->queue) && !ep->stopped)
  2330. req = list_entry(ep->queue.next,
  2331. struct net2280_request, queue);
  2332. else
  2333. req = NULL;
  2334. if (req && !ep->is_in)
  2335. stop_out_naking(ep);
  2336. }
  2337. }
  2338. /* is there a buffer for the next packet?
  2339. * for best streaming performance, make sure there is one.
  2340. */
  2341. if (req && !ep->stopped) {
  2342. /* load IN fifo with next packet (may be zlp) */
  2343. if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT))
  2344. write_fifo(ep, &req->req);
  2345. }
  2346. }
  2347. static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex)
  2348. {
  2349. struct net2280_ep *ep;
  2350. if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
  2351. return &dev->ep[0];
  2352. list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
  2353. u8 bEndpointAddress;
  2354. if (!ep->desc)
  2355. continue;
  2356. bEndpointAddress = ep->desc->bEndpointAddress;
  2357. if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
  2358. continue;
  2359. if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f))
  2360. return ep;
  2361. }
  2362. return NULL;
  2363. }
  2364. static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
  2365. {
  2366. u32 scratch, fsmvalue;
  2367. u32 ack_wait_timeout, state;
  2368. /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */
  2369. scratch = get_idx_reg(dev->regs, SCRATCH);
  2370. fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
  2371. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  2372. if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) &&
  2373. (r.bRequestType & USB_DIR_IN)))
  2374. return;
  2375. /* This is the first Control Read for this connection: */
  2376. if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) {
  2377. /*
  2378. * Connection is NOT SS:
  2379. * - Connection must be FS or HS.
  2380. * - This FSM state should allow workaround software to
  2381. * run after the next USB connection.
  2382. */
  2383. scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ;
  2384. dev->bug7734_patched = 1;
  2385. goto restore_data_eps;
  2386. }
  2387. /* Connection is SS: */
  2388. for (ack_wait_timeout = 0;
  2389. ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS;
  2390. ack_wait_timeout++) {
  2391. state = readl(&dev->plregs->pl_ep_status_1)
  2392. & (0xff << STATE);
  2393. if ((state >= (ACK_GOOD_NORMAL << STATE)) &&
  2394. (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) {
  2395. scratch |= DEFECT7374_FSM_SS_CONTROL_READ;
  2396. dev->bug7734_patched = 1;
  2397. break;
  2398. }
  2399. /*
  2400. * We have not yet received host's Data Phase ACK
  2401. * - Wait and try again.
  2402. */
  2403. udelay(DEFECT_7374_PROCESSOR_WAIT_TIME);
  2404. continue;
  2405. }
  2406. if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) {
  2407. ep_err(dev, "FAIL: Defect 7374 workaround waited but failed "
  2408. "to detect SS host's data phase ACK.");
  2409. ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16"
  2410. "got 0x%2.2x.\n", state >> STATE);
  2411. } else {
  2412. ep_warn(dev, "INFO: Defect 7374 workaround waited about\n"
  2413. "%duSec for Control Read Data Phase ACK\n",
  2414. DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout);
  2415. }
  2416. restore_data_eps:
  2417. /*
  2418. * Restore data EPs to their pre-workaround settings (disabled,
  2419. * initialized, and other details).
  2420. */
  2421. defect7374_disable_data_eps(dev);
  2422. set_idx_reg(dev->regs, SCRATCH, scratch);
  2423. return;
  2424. }
  2425. static void ep_clear_seqnum(struct net2280_ep *ep)
  2426. {
  2427. struct net2280 *dev = ep->dev;
  2428. u32 val;
  2429. static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 };
  2430. val = readl(&dev->plregs->pl_ep_ctrl) & ~0x1f;
  2431. val |= ep_pl[ep->num];
  2432. writel(val, &dev->plregs->pl_ep_ctrl);
  2433. val |= BIT(SEQUENCE_NUMBER_RESET);
  2434. writel(val, &dev->plregs->pl_ep_ctrl);
  2435. return;
  2436. }
  2437. static void handle_stat0_irqs_superspeed(struct net2280 *dev,
  2438. struct net2280_ep *ep, struct usb_ctrlrequest r)
  2439. {
  2440. int tmp = 0;
  2441. #define w_value le16_to_cpu(r.wValue)
  2442. #define w_index le16_to_cpu(r.wIndex)
  2443. #define w_length le16_to_cpu(r.wLength)
  2444. switch (r.bRequest) {
  2445. struct net2280_ep *e;
  2446. u16 status;
  2447. case USB_REQ_SET_CONFIGURATION:
  2448. dev->addressed_state = !w_value;
  2449. goto usb3_delegate;
  2450. case USB_REQ_GET_STATUS:
  2451. switch (r.bRequestType) {
  2452. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2453. status = dev->wakeup_enable ? 0x02 : 0x00;
  2454. if (dev->gadget.is_selfpowered)
  2455. status |= BIT(0);
  2456. status |= (dev->u1_enable << 2 | dev->u2_enable << 3 |
  2457. dev->ltm_enable << 4);
  2458. writel(0, &dev->epregs[0].ep_irqenb);
  2459. set_fifo_bytecount(ep, sizeof(status));
  2460. writel((__force u32) status, &dev->epregs[0].ep_data);
  2461. allow_status_338x(ep);
  2462. break;
  2463. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2464. e = get_ep_by_addr(dev, w_index);
  2465. if (!e)
  2466. goto do_stall3;
  2467. status = readl(&e->regs->ep_rsp) &
  2468. BIT(CLEAR_ENDPOINT_HALT);
  2469. writel(0, &dev->epregs[0].ep_irqenb);
  2470. set_fifo_bytecount(ep, sizeof(status));
  2471. writel((__force u32) status, &dev->epregs[0].ep_data);
  2472. allow_status_338x(ep);
  2473. break;
  2474. default:
  2475. goto usb3_delegate;
  2476. }
  2477. break;
  2478. case USB_REQ_CLEAR_FEATURE:
  2479. switch (r.bRequestType) {
  2480. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2481. if (!dev->addressed_state) {
  2482. switch (w_value) {
  2483. case USB_DEVICE_U1_ENABLE:
  2484. dev->u1_enable = 0;
  2485. writel(readl(&dev->usb_ext->usbctl2) &
  2486. ~BIT(U1_ENABLE),
  2487. &dev->usb_ext->usbctl2);
  2488. allow_status_338x(ep);
  2489. goto next_endpoints3;
  2490. case USB_DEVICE_U2_ENABLE:
  2491. dev->u2_enable = 0;
  2492. writel(readl(&dev->usb_ext->usbctl2) &
  2493. ~BIT(U2_ENABLE),
  2494. &dev->usb_ext->usbctl2);
  2495. allow_status_338x(ep);
  2496. goto next_endpoints3;
  2497. case USB_DEVICE_LTM_ENABLE:
  2498. dev->ltm_enable = 0;
  2499. writel(readl(&dev->usb_ext->usbctl2) &
  2500. ~BIT(LTM_ENABLE),
  2501. &dev->usb_ext->usbctl2);
  2502. allow_status_338x(ep);
  2503. goto next_endpoints3;
  2504. default:
  2505. break;
  2506. }
  2507. }
  2508. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2509. dev->wakeup_enable = 0;
  2510. writel(readl(&dev->usb->usbctl) &
  2511. ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2512. &dev->usb->usbctl);
  2513. allow_status_338x(ep);
  2514. break;
  2515. }
  2516. goto usb3_delegate;
  2517. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2518. e = get_ep_by_addr(dev, w_index);
  2519. if (!e)
  2520. goto do_stall3;
  2521. if (w_value != USB_ENDPOINT_HALT)
  2522. goto do_stall3;
  2523. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2524. /*
  2525. * Workaround for SS SeqNum not cleared via
  2526. * Endpoint Halt (Clear) bit. select endpoint
  2527. */
  2528. ep_clear_seqnum(e);
  2529. clear_halt(e);
  2530. if (!list_empty(&e->queue) && e->td_dma)
  2531. restart_dma(e);
  2532. allow_status(ep);
  2533. ep->stopped = 1;
  2534. break;
  2535. default:
  2536. goto usb3_delegate;
  2537. }
  2538. break;
  2539. case USB_REQ_SET_FEATURE:
  2540. switch (r.bRequestType) {
  2541. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2542. if (!dev->addressed_state) {
  2543. switch (w_value) {
  2544. case USB_DEVICE_U1_ENABLE:
  2545. dev->u1_enable = 1;
  2546. writel(readl(&dev->usb_ext->usbctl2) |
  2547. BIT(U1_ENABLE),
  2548. &dev->usb_ext->usbctl2);
  2549. allow_status_338x(ep);
  2550. goto next_endpoints3;
  2551. case USB_DEVICE_U2_ENABLE:
  2552. dev->u2_enable = 1;
  2553. writel(readl(&dev->usb_ext->usbctl2) |
  2554. BIT(U2_ENABLE),
  2555. &dev->usb_ext->usbctl2);
  2556. allow_status_338x(ep);
  2557. goto next_endpoints3;
  2558. case USB_DEVICE_LTM_ENABLE:
  2559. dev->ltm_enable = 1;
  2560. writel(readl(&dev->usb_ext->usbctl2) |
  2561. BIT(LTM_ENABLE),
  2562. &dev->usb_ext->usbctl2);
  2563. allow_status_338x(ep);
  2564. goto next_endpoints3;
  2565. default:
  2566. break;
  2567. }
  2568. }
  2569. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2570. dev->wakeup_enable = 1;
  2571. writel(readl(&dev->usb->usbctl) |
  2572. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2573. &dev->usb->usbctl);
  2574. allow_status_338x(ep);
  2575. break;
  2576. }
  2577. goto usb3_delegate;
  2578. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2579. e = get_ep_by_addr(dev, w_index);
  2580. if (!e || (w_value != USB_ENDPOINT_HALT))
  2581. goto do_stall3;
  2582. ep->stopped = 1;
  2583. if (ep->num == 0)
  2584. ep->dev->protocol_stall = 1;
  2585. else {
  2586. if (ep->dma)
  2587. abort_dma(ep);
  2588. set_halt(ep);
  2589. }
  2590. allow_status_338x(ep);
  2591. break;
  2592. default:
  2593. goto usb3_delegate;
  2594. }
  2595. break;
  2596. default:
  2597. usb3_delegate:
  2598. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n",
  2599. r.bRequestType, r.bRequest,
  2600. w_value, w_index, w_length,
  2601. readl(&ep->cfg->ep_cfg));
  2602. ep->responded = 0;
  2603. spin_unlock(&dev->lock);
  2604. tmp = dev->driver->setup(&dev->gadget, &r);
  2605. spin_lock(&dev->lock);
  2606. }
  2607. do_stall3:
  2608. if (tmp < 0) {
  2609. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2610. r.bRequestType, r.bRequest, tmp);
  2611. dev->protocol_stall = 1;
  2612. /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */
  2613. set_halt(ep);
  2614. }
  2615. next_endpoints3:
  2616. #undef w_value
  2617. #undef w_index
  2618. #undef w_length
  2619. return;
  2620. }
  2621. static void usb338x_handle_ep_intr(struct net2280 *dev, u32 stat0)
  2622. {
  2623. u32 index;
  2624. u32 bit;
  2625. for (index = 0; index < ARRAY_SIZE(ep_bit); index++) {
  2626. bit = BIT(ep_bit[index]);
  2627. if (!stat0)
  2628. break;
  2629. if (!(stat0 & bit))
  2630. continue;
  2631. stat0 &= ~bit;
  2632. handle_ep_small(&dev->ep[index]);
  2633. }
  2634. }
  2635. static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
  2636. {
  2637. struct net2280_ep *ep;
  2638. u32 num, scratch;
  2639. /* most of these don't need individual acks */
  2640. stat &= ~BIT(INTA_ASSERTED);
  2641. if (!stat)
  2642. return;
  2643. /* ep_dbg(dev, "irqstat0 %04x\n", stat); */
  2644. /* starting a control request? */
  2645. if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) {
  2646. union {
  2647. u32 raw[2];
  2648. struct usb_ctrlrequest r;
  2649. } u;
  2650. int tmp;
  2651. struct net2280_request *req;
  2652. if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
  2653. u32 val = readl(&dev->usb->usbstat);
  2654. if (val & BIT(SUPER_SPEED)) {
  2655. dev->gadget.speed = USB_SPEED_SUPER;
  2656. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2657. EP0_SS_MAX_PACKET_SIZE);
  2658. } else if (val & BIT(HIGH_SPEED)) {
  2659. dev->gadget.speed = USB_SPEED_HIGH;
  2660. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2661. EP0_HS_MAX_PACKET_SIZE);
  2662. } else {
  2663. dev->gadget.speed = USB_SPEED_FULL;
  2664. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2665. EP0_HS_MAX_PACKET_SIZE);
  2666. }
  2667. net2280_led_speed(dev, dev->gadget.speed);
  2668. ep_dbg(dev, "%s\n",
  2669. usb_speed_string(dev->gadget.speed));
  2670. }
  2671. ep = &dev->ep[0];
  2672. ep->irqs++;
  2673. /* make sure any leftover request state is cleared */
  2674. stat &= ~BIT(ENDPOINT_0_INTERRUPT);
  2675. while (!list_empty(&ep->queue)) {
  2676. req = list_entry(ep->queue.next,
  2677. struct net2280_request, queue);
  2678. done(ep, req, (req->req.actual == req->req.length)
  2679. ? 0 : -EPROTO);
  2680. }
  2681. ep->stopped = 0;
  2682. dev->protocol_stall = 0;
  2683. if (!(dev->quirks & PLX_PCIE)) {
  2684. if (ep->dev->quirks & PLX_2280)
  2685. tmp = BIT(FIFO_OVERFLOW) |
  2686. BIT(FIFO_UNDERFLOW);
  2687. else
  2688. tmp = 0;
  2689. writel(tmp | BIT(TIMEOUT) |
  2690. BIT(USB_STALL_SENT) |
  2691. BIT(USB_IN_NAK_SENT) |
  2692. BIT(USB_IN_ACK_RCVD) |
  2693. BIT(USB_OUT_PING_NAK_SENT) |
  2694. BIT(USB_OUT_ACK_SENT) |
  2695. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  2696. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  2697. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2698. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2699. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2700. BIT(DATA_IN_TOKEN_INTERRUPT),
  2701. &ep->regs->ep_stat);
  2702. }
  2703. u.raw[0] = readl(&dev->usb->setup0123);
  2704. u.raw[1] = readl(&dev->usb->setup4567);
  2705. cpu_to_le32s(&u.raw[0]);
  2706. cpu_to_le32s(&u.raw[1]);
  2707. if ((dev->quirks & PLX_PCIE) && !dev->bug7734_patched)
  2708. defect7374_workaround(dev, u.r);
  2709. tmp = 0;
  2710. #define w_value le16_to_cpu(u.r.wValue)
  2711. #define w_index le16_to_cpu(u.r.wIndex)
  2712. #define w_length le16_to_cpu(u.r.wLength)
  2713. /* ack the irq */
  2714. writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0);
  2715. stat ^= BIT(SETUP_PACKET_INTERRUPT);
  2716. /* watch control traffic at the token level, and force
  2717. * synchronization before letting the status stage happen.
  2718. * FIXME ignore tokens we'll NAK, until driver responds.
  2719. * that'll mean a lot less irqs for some drivers.
  2720. */
  2721. ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0;
  2722. if (ep->is_in) {
  2723. scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2724. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2725. BIT(DATA_IN_TOKEN_INTERRUPT);
  2726. stop_out_naking(ep);
  2727. } else
  2728. scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2729. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2730. BIT(DATA_IN_TOKEN_INTERRUPT);
  2731. writel(scratch, &dev->epregs[0].ep_irqenb);
  2732. /* we made the hardware handle most lowlevel requests;
  2733. * everything else goes uplevel to the gadget code.
  2734. */
  2735. ep->responded = 1;
  2736. if (dev->gadget.speed == USB_SPEED_SUPER) {
  2737. handle_stat0_irqs_superspeed(dev, ep, u.r);
  2738. goto next_endpoints;
  2739. }
  2740. switch (u.r.bRequest) {
  2741. case USB_REQ_GET_STATUS: {
  2742. struct net2280_ep *e;
  2743. __le32 status;
  2744. /* hw handles device and interface status */
  2745. if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT))
  2746. goto delegate;
  2747. e = get_ep_by_addr(dev, w_index);
  2748. if (!e || w_length > 2)
  2749. goto do_stall;
  2750. if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT))
  2751. status = cpu_to_le32(1);
  2752. else
  2753. status = cpu_to_le32(0);
  2754. /* don't bother with a request object! */
  2755. writel(0, &dev->epregs[0].ep_irqenb);
  2756. set_fifo_bytecount(ep, w_length);
  2757. writel((__force u32)status, &dev->epregs[0].ep_data);
  2758. allow_status(ep);
  2759. ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status);
  2760. goto next_endpoints;
  2761. }
  2762. break;
  2763. case USB_REQ_CLEAR_FEATURE: {
  2764. struct net2280_ep *e;
  2765. /* hw handles device features */
  2766. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2767. goto delegate;
  2768. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2769. goto do_stall;
  2770. e = get_ep_by_addr(dev, w_index);
  2771. if (!e)
  2772. goto do_stall;
  2773. if (e->wedged) {
  2774. ep_vdbg(dev, "%s wedged, halt not cleared\n",
  2775. ep->ep.name);
  2776. } else {
  2777. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2778. clear_halt(e);
  2779. if ((ep->dev->quirks & PLX_PCIE) &&
  2780. !list_empty(&e->queue) && e->td_dma)
  2781. restart_dma(e);
  2782. }
  2783. allow_status(ep);
  2784. goto next_endpoints;
  2785. }
  2786. break;
  2787. case USB_REQ_SET_FEATURE: {
  2788. struct net2280_ep *e;
  2789. /* hw handles device features */
  2790. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2791. goto delegate;
  2792. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2793. goto do_stall;
  2794. e = get_ep_by_addr(dev, w_index);
  2795. if (!e)
  2796. goto do_stall;
  2797. if (e->ep.name == ep0name)
  2798. goto do_stall;
  2799. set_halt(e);
  2800. if ((dev->quirks & PLX_PCIE) && e->dma)
  2801. abort_dma(e);
  2802. allow_status(ep);
  2803. ep_vdbg(dev, "%s set halt\n", ep->ep.name);
  2804. goto next_endpoints;
  2805. }
  2806. break;
  2807. default:
  2808. delegate:
  2809. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x "
  2810. "ep_cfg %08x\n",
  2811. u.r.bRequestType, u.r.bRequest,
  2812. w_value, w_index, w_length,
  2813. readl(&ep->cfg->ep_cfg));
  2814. ep->responded = 0;
  2815. spin_unlock(&dev->lock);
  2816. tmp = dev->driver->setup(&dev->gadget, &u.r);
  2817. spin_lock(&dev->lock);
  2818. }
  2819. /* stall ep0 on error */
  2820. if (tmp < 0) {
  2821. do_stall:
  2822. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2823. u.r.bRequestType, u.r.bRequest, tmp);
  2824. dev->protocol_stall = 1;
  2825. }
  2826. /* some in/out token irq should follow; maybe stall then.
  2827. * driver must queue a request (even zlp) or halt ep0
  2828. * before the host times out.
  2829. */
  2830. }
  2831. #undef w_value
  2832. #undef w_index
  2833. #undef w_length
  2834. next_endpoints:
  2835. if ((dev->quirks & PLX_PCIE) && dev->enhanced_mode) {
  2836. u32 mask = (BIT(ENDPOINT_0_INTERRUPT) |
  2837. USB3380_IRQSTAT0_EP_INTR_MASK_IN |
  2838. USB3380_IRQSTAT0_EP_INTR_MASK_OUT);
  2839. if (stat & mask) {
  2840. usb338x_handle_ep_intr(dev, stat & mask);
  2841. stat &= ~mask;
  2842. }
  2843. } else {
  2844. /* endpoint data irq ? */
  2845. scratch = stat & 0x7f;
  2846. stat &= ~0x7f;
  2847. for (num = 0; scratch; num++) {
  2848. u32 t;
  2849. /* do this endpoint's FIFO and queue need tending? */
  2850. t = BIT(num);
  2851. if ((scratch & t) == 0)
  2852. continue;
  2853. scratch ^= t;
  2854. ep = &dev->ep[num];
  2855. handle_ep_small(ep);
  2856. }
  2857. }
  2858. if (stat)
  2859. ep_dbg(dev, "unhandled irqstat0 %08x\n", stat);
  2860. }
  2861. #define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \
  2862. BIT(DMA_C_INTERRUPT) | \
  2863. BIT(DMA_B_INTERRUPT) | \
  2864. BIT(DMA_A_INTERRUPT))
  2865. #define PCI_ERROR_INTERRUPTS ( \
  2866. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \
  2867. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \
  2868. BIT(PCI_RETRY_ABORT_INTERRUPT))
  2869. static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
  2870. __releases(dev->lock)
  2871. __acquires(dev->lock)
  2872. {
  2873. struct net2280_ep *ep;
  2874. u32 tmp, num, mask, scratch;
  2875. /* after disconnect there's nothing else to do! */
  2876. tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT);
  2877. mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED);
  2878. /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set.
  2879. * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and
  2880. * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT
  2881. * only indicates a change in the reset state).
  2882. */
  2883. if (stat & tmp) {
  2884. bool reset = false;
  2885. bool disconnect = false;
  2886. /*
  2887. * Ignore disconnects and resets if the speed hasn't been set.
  2888. * VBUS can bounce and there's always an initial reset.
  2889. */
  2890. writel(tmp, &dev->regs->irqstat1);
  2891. if (dev->gadget.speed != USB_SPEED_UNKNOWN) {
  2892. if ((stat & BIT(VBUS_INTERRUPT)) &&
  2893. (readl(&dev->usb->usbctl) &
  2894. BIT(VBUS_PIN)) == 0) {
  2895. disconnect = true;
  2896. ep_dbg(dev, "disconnect %s\n",
  2897. dev->driver->driver.name);
  2898. } else if ((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) &&
  2899. (readl(&dev->usb->usbstat) & mask)
  2900. == 0) {
  2901. reset = true;
  2902. ep_dbg(dev, "reset %s\n",
  2903. dev->driver->driver.name);
  2904. }
  2905. if (disconnect || reset) {
  2906. stop_activity(dev, dev->driver);
  2907. ep0_start(dev);
  2908. spin_unlock(&dev->lock);
  2909. if (reset)
  2910. usb_gadget_udc_reset
  2911. (&dev->gadget, dev->driver);
  2912. else
  2913. (dev->driver->disconnect)
  2914. (&dev->gadget);
  2915. spin_lock(&dev->lock);
  2916. return;
  2917. }
  2918. }
  2919. stat &= ~tmp;
  2920. /* vBUS can bounce ... one of many reasons to ignore the
  2921. * notion of hotplug events on bus connect/disconnect!
  2922. */
  2923. if (!stat)
  2924. return;
  2925. }
  2926. /* NOTE: chip stays in PCI D0 state for now, but it could
  2927. * enter D1 to save more power
  2928. */
  2929. tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT);
  2930. if (stat & tmp) {
  2931. writel(tmp, &dev->regs->irqstat1);
  2932. spin_unlock(&dev->lock);
  2933. if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) {
  2934. if (dev->driver->suspend)
  2935. dev->driver->suspend(&dev->gadget);
  2936. if (!enable_suspend)
  2937. stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT);
  2938. } else {
  2939. if (dev->driver->resume)
  2940. dev->driver->resume(&dev->gadget);
  2941. /* at high speed, note erratum 0133 */
  2942. }
  2943. spin_lock(&dev->lock);
  2944. stat &= ~tmp;
  2945. }
  2946. /* clear any other status/irqs */
  2947. if (stat)
  2948. writel(stat, &dev->regs->irqstat1);
  2949. /* some status we can just ignore */
  2950. if (dev->quirks & PLX_2280)
  2951. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2952. BIT(SUSPEND_REQUEST_INTERRUPT) |
  2953. BIT(RESUME_INTERRUPT) |
  2954. BIT(SOF_INTERRUPT));
  2955. else
  2956. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2957. BIT(RESUME_INTERRUPT) |
  2958. BIT(SOF_DOWN_INTERRUPT) |
  2959. BIT(SOF_INTERRUPT));
  2960. if (!stat)
  2961. return;
  2962. /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/
  2963. /* DMA status, for ep-{a,b,c,d} */
  2964. scratch = stat & DMA_INTERRUPTS;
  2965. stat &= ~DMA_INTERRUPTS;
  2966. scratch >>= 9;
  2967. for (num = 0; scratch; num++) {
  2968. struct net2280_dma_regs __iomem *dma;
  2969. tmp = BIT(num);
  2970. if ((tmp & scratch) == 0)
  2971. continue;
  2972. scratch ^= tmp;
  2973. ep = &dev->ep[num + 1];
  2974. dma = ep->dma;
  2975. if (!dma)
  2976. continue;
  2977. /* clear ep's dma status */
  2978. tmp = readl(&dma->dmastat);
  2979. writel(tmp, &dma->dmastat);
  2980. /* dma sync*/
  2981. if (dev->quirks & PLX_PCIE) {
  2982. u32 r_dmacount = readl(&dma->dmacount);
  2983. if (!ep->is_in && (r_dmacount & 0x00FFFFFF) &&
  2984. (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT)))
  2985. continue;
  2986. }
  2987. if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) {
  2988. ep_dbg(ep->dev, "%s no xact done? %08x\n",
  2989. ep->ep.name, tmp);
  2990. continue;
  2991. }
  2992. stop_dma(ep->dma);
  2993. /* OUT transfers terminate when the data from the
  2994. * host is in our memory. Process whatever's done.
  2995. * On this path, we know transfer's last packet wasn't
  2996. * less than req->length. NAK_OUT_PACKETS may be set,
  2997. * or the FIFO may already be holding new packets.
  2998. *
  2999. * IN transfers can linger in the FIFO for a very
  3000. * long time ... we ignore that for now, accounting
  3001. * precisely (like PIO does) needs per-packet irqs
  3002. */
  3003. scan_dma_completions(ep);
  3004. /* disable dma on inactive queues; else maybe restart */
  3005. if (!list_empty(&ep->queue)) {
  3006. tmp = readl(&dma->dmactl);
  3007. restart_dma(ep);
  3008. }
  3009. ep->irqs++;
  3010. }
  3011. /* NOTE: there are other PCI errors we might usefully notice.
  3012. * if they appear very often, here's where to try recovering.
  3013. */
  3014. if (stat & PCI_ERROR_INTERRUPTS) {
  3015. ep_err(dev, "pci dma error; stat %08x\n", stat);
  3016. stat &= ~PCI_ERROR_INTERRUPTS;
  3017. /* these are fatal errors, but "maybe" they won't
  3018. * happen again ...
  3019. */
  3020. stop_activity(dev, dev->driver);
  3021. ep0_start(dev);
  3022. stat = 0;
  3023. }
  3024. if (stat)
  3025. ep_dbg(dev, "unhandled irqstat1 %08x\n", stat);
  3026. }
  3027. static irqreturn_t net2280_irq(int irq, void *_dev)
  3028. {
  3029. struct net2280 *dev = _dev;
  3030. /* shared interrupt, not ours */
  3031. if ((dev->quirks & PLX_LEGACY) &&
  3032. (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED))))
  3033. return IRQ_NONE;
  3034. spin_lock(&dev->lock);
  3035. /* handle disconnect, dma, and more */
  3036. handle_stat1_irqs(dev, readl(&dev->regs->irqstat1));
  3037. /* control requests and PIO */
  3038. handle_stat0_irqs(dev, readl(&dev->regs->irqstat0));
  3039. if (dev->quirks & PLX_PCIE) {
  3040. /* re-enable interrupt to trigger any possible new interrupt */
  3041. u32 pciirqenb1 = readl(&dev->regs->pciirqenb1);
  3042. writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1);
  3043. writel(pciirqenb1, &dev->regs->pciirqenb1);
  3044. }
  3045. spin_unlock(&dev->lock);
  3046. return IRQ_HANDLED;
  3047. }
  3048. /*-------------------------------------------------------------------------*/
  3049. static void gadget_release(struct device *_dev)
  3050. {
  3051. struct net2280 *dev = dev_get_drvdata(_dev);
  3052. kfree(dev);
  3053. }
  3054. /* tear down the binding between this driver and the pci device */
  3055. static void net2280_remove(struct pci_dev *pdev)
  3056. {
  3057. struct net2280 *dev = pci_get_drvdata(pdev);
  3058. usb_del_gadget_udc(&dev->gadget);
  3059. BUG_ON(dev->driver);
  3060. /* then clean up the resources we allocated during probe() */
  3061. if (dev->requests) {
  3062. int i;
  3063. for (i = 1; i < 5; i++) {
  3064. if (!dev->ep[i].dummy)
  3065. continue;
  3066. dma_pool_free(dev->requests, dev->ep[i].dummy,
  3067. dev->ep[i].td_dma);
  3068. }
  3069. dma_pool_destroy(dev->requests);
  3070. }
  3071. if (dev->got_irq)
  3072. free_irq(pdev->irq, dev);
  3073. if (dev->quirks & PLX_PCIE)
  3074. pci_disable_msi(pdev);
  3075. if (dev->regs) {
  3076. net2280_led_shutdown(dev);
  3077. iounmap(dev->regs);
  3078. }
  3079. if (dev->region)
  3080. release_mem_region(pci_resource_start(pdev, 0),
  3081. pci_resource_len(pdev, 0));
  3082. if (dev->enabled)
  3083. pci_disable_device(pdev);
  3084. device_remove_file(&pdev->dev, &dev_attr_registers);
  3085. ep_info(dev, "unbind\n");
  3086. }
  3087. /* wrap this driver around the specified device, but
  3088. * don't respond over USB until a gadget driver binds to us.
  3089. */
  3090. static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  3091. {
  3092. struct net2280 *dev;
  3093. unsigned long resource, len;
  3094. void __iomem *base = NULL;
  3095. int retval, i;
  3096. /* alloc, and start init */
  3097. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  3098. if (dev == NULL) {
  3099. retval = -ENOMEM;
  3100. goto done;
  3101. }
  3102. pci_set_drvdata(pdev, dev);
  3103. spin_lock_init(&dev->lock);
  3104. dev->quirks = id->driver_data;
  3105. dev->pdev = pdev;
  3106. dev->gadget.ops = &net2280_ops;
  3107. dev->gadget.max_speed = (dev->quirks & PLX_SUPERSPEED) ?
  3108. USB_SPEED_SUPER : USB_SPEED_HIGH;
  3109. /* the "gadget" abstracts/virtualizes the controller */
  3110. dev->gadget.name = driver_name;
  3111. /* now all the pci goodies ... */
  3112. if (pci_enable_device(pdev) < 0) {
  3113. retval = -ENODEV;
  3114. goto done;
  3115. }
  3116. dev->enabled = 1;
  3117. /* BAR 0 holds all the registers
  3118. * BAR 1 is 8051 memory; unused here (note erratum 0103)
  3119. * BAR 2 is fifo memory; unused here
  3120. */
  3121. resource = pci_resource_start(pdev, 0);
  3122. len = pci_resource_len(pdev, 0);
  3123. if (!request_mem_region(resource, len, driver_name)) {
  3124. ep_dbg(dev, "controller already in use\n");
  3125. retval = -EBUSY;
  3126. goto done;
  3127. }
  3128. dev->region = 1;
  3129. /* FIXME provide firmware download interface to put
  3130. * 8051 code into the chip, e.g. to turn on PCI PM.
  3131. */
  3132. base = ioremap_nocache(resource, len);
  3133. if (base == NULL) {
  3134. ep_dbg(dev, "can't map memory\n");
  3135. retval = -EFAULT;
  3136. goto done;
  3137. }
  3138. dev->regs = (struct net2280_regs __iomem *) base;
  3139. dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080);
  3140. dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100);
  3141. dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180);
  3142. dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200);
  3143. dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300);
  3144. if (dev->quirks & PLX_PCIE) {
  3145. u32 fsmvalue;
  3146. u32 usbstat;
  3147. dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *)
  3148. (base + 0x00b4);
  3149. dev->llregs = (struct usb338x_ll_regs __iomem *)
  3150. (base + 0x0700);
  3151. dev->ll_lfps_regs = (struct usb338x_ll_lfps_regs __iomem *)
  3152. (base + 0x0748);
  3153. dev->ll_tsn_regs = (struct usb338x_ll_tsn_regs __iomem *)
  3154. (base + 0x077c);
  3155. dev->ll_chicken_reg = (struct usb338x_ll_chi_regs __iomem *)
  3156. (base + 0x079c);
  3157. dev->plregs = (struct usb338x_pl_regs __iomem *)
  3158. (base + 0x0800);
  3159. usbstat = readl(&dev->usb->usbstat);
  3160. dev->enhanced_mode = !!(usbstat & BIT(11));
  3161. dev->n_ep = (dev->enhanced_mode) ? 9 : 5;
  3162. /* put into initial config, link up all endpoints */
  3163. fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
  3164. (0xf << DEFECT7374_FSM_FIELD);
  3165. /* See if firmware needs to set up for workaround: */
  3166. if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
  3167. dev->bug7734_patched = 1;
  3168. writel(0, &dev->usb->usbctl);
  3169. } else
  3170. dev->bug7734_patched = 0;
  3171. } else {
  3172. dev->enhanced_mode = 0;
  3173. dev->n_ep = 7;
  3174. /* put into initial config, link up all endpoints */
  3175. writel(0, &dev->usb->usbctl);
  3176. }
  3177. usb_reset(dev);
  3178. usb_reinit(dev);
  3179. /* irq setup after old hardware is cleaned up */
  3180. if (!pdev->irq) {
  3181. ep_err(dev, "No IRQ. Check PCI setup!\n");
  3182. retval = -ENODEV;
  3183. goto done;
  3184. }
  3185. if (dev->quirks & PLX_PCIE)
  3186. if (pci_enable_msi(pdev))
  3187. ep_err(dev, "Failed to enable MSI mode\n");
  3188. if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED,
  3189. driver_name, dev)) {
  3190. ep_err(dev, "request interrupt %d failed\n", pdev->irq);
  3191. retval = -EBUSY;
  3192. goto done;
  3193. }
  3194. dev->got_irq = 1;
  3195. /* DMA setup */
  3196. /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */
  3197. dev->requests = dma_pool_create("requests", &pdev->dev,
  3198. sizeof(struct net2280_dma),
  3199. 0 /* no alignment requirements */,
  3200. 0 /* or page-crossing issues */);
  3201. if (!dev->requests) {
  3202. ep_dbg(dev, "can't get request pool\n");
  3203. retval = -ENOMEM;
  3204. goto done;
  3205. }
  3206. for (i = 1; i < 5; i++) {
  3207. struct net2280_dma *td;
  3208. td = dma_pool_alloc(dev->requests, GFP_KERNEL,
  3209. &dev->ep[i].td_dma);
  3210. if (!td) {
  3211. ep_dbg(dev, "can't get dummy %d\n", i);
  3212. retval = -ENOMEM;
  3213. goto done;
  3214. }
  3215. td->dmacount = 0; /* not VALID */
  3216. td->dmadesc = td->dmaaddr;
  3217. dev->ep[i].dummy = td;
  3218. }
  3219. /* enable lower-overhead pci memory bursts during DMA */
  3220. if (dev->quirks & PLX_LEGACY)
  3221. writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) |
  3222. /*
  3223. * 256 write retries may not be enough...
  3224. BIT(PCI_RETRY_ABORT_ENABLE) |
  3225. */
  3226. BIT(DMA_READ_MULTIPLE_ENABLE) |
  3227. BIT(DMA_READ_LINE_ENABLE),
  3228. &dev->pci->pcimstctl);
  3229. /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */
  3230. pci_set_master(pdev);
  3231. pci_try_set_mwi(pdev);
  3232. /* ... also flushes any posted pci writes */
  3233. dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff;
  3234. /* done */
  3235. ep_info(dev, "%s\n", driver_desc);
  3236. ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n",
  3237. pdev->irq, base, dev->chiprev);
  3238. ep_info(dev, "version: " DRIVER_VERSION "; %s\n",
  3239. dev->enhanced_mode ? "enhanced mode" : "legacy mode");
  3240. retval = device_create_file(&pdev->dev, &dev_attr_registers);
  3241. if (retval)
  3242. goto done;
  3243. retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget,
  3244. gadget_release);
  3245. if (retval)
  3246. goto done;
  3247. return 0;
  3248. done:
  3249. if (dev) {
  3250. net2280_remove(pdev);
  3251. kfree(dev);
  3252. }
  3253. return retval;
  3254. }
  3255. /* make sure the board is quiescent; otherwise it will continue
  3256. * generating IRQs across the upcoming reboot.
  3257. */
  3258. static void net2280_shutdown(struct pci_dev *pdev)
  3259. {
  3260. struct net2280 *dev = pci_get_drvdata(pdev);
  3261. /* disable IRQs */
  3262. writel(0, &dev->regs->pciirqenb0);
  3263. writel(0, &dev->regs->pciirqenb1);
  3264. /* disable the pullup so the host will think we're gone */
  3265. writel(0, &dev->usb->usbctl);
  3266. }
  3267. /*-------------------------------------------------------------------------*/
  3268. static const struct pci_device_id pci_ids[] = { {
  3269. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3270. .class_mask = ~0,
  3271. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3272. .device = 0x2280,
  3273. .subvendor = PCI_ANY_ID,
  3274. .subdevice = PCI_ANY_ID,
  3275. .driver_data = PLX_LEGACY | PLX_2280,
  3276. }, {
  3277. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3278. .class_mask = ~0,
  3279. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3280. .device = 0x2282,
  3281. .subvendor = PCI_ANY_ID,
  3282. .subdevice = PCI_ANY_ID,
  3283. .driver_data = PLX_LEGACY,
  3284. },
  3285. {
  3286. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3287. .class_mask = ~0,
  3288. .vendor = PCI_VENDOR_ID_PLX,
  3289. .device = 0x2380,
  3290. .subvendor = PCI_ANY_ID,
  3291. .subdevice = PCI_ANY_ID,
  3292. .driver_data = PLX_PCIE,
  3293. },
  3294. {
  3295. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3296. .class_mask = ~0,
  3297. .vendor = PCI_VENDOR_ID_PLX,
  3298. .device = 0x3380,
  3299. .subvendor = PCI_ANY_ID,
  3300. .subdevice = PCI_ANY_ID,
  3301. .driver_data = PLX_PCIE | PLX_SUPERSPEED,
  3302. },
  3303. {
  3304. .class = PCI_CLASS_SERIAL_USB_DEVICE,
  3305. .class_mask = ~0,
  3306. .vendor = PCI_VENDOR_ID_PLX,
  3307. .device = 0x3382,
  3308. .subvendor = PCI_ANY_ID,
  3309. .subdevice = PCI_ANY_ID,
  3310. .driver_data = PLX_PCIE | PLX_SUPERSPEED,
  3311. },
  3312. { /* end: all zeroes */ }
  3313. };
  3314. MODULE_DEVICE_TABLE(pci, pci_ids);
  3315. /* pci driver glue; this is a "new style" PCI driver module */
  3316. static struct pci_driver net2280_pci_driver = {
  3317. .name = (char *) driver_name,
  3318. .id_table = pci_ids,
  3319. .probe = net2280_probe,
  3320. .remove = net2280_remove,
  3321. .shutdown = net2280_shutdown,
  3322. /* FIXME add power management support */
  3323. };
  3324. module_pci_driver(net2280_pci_driver);
  3325. MODULE_DESCRIPTION(DRIVER_DESC);
  3326. MODULE_AUTHOR("David Brownell");
  3327. MODULE_LICENSE("GPL");