mpc5200_psc_ac97.c 9.0 KB

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  1. /*
  2. * linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip.
  3. *
  4. * Copyright (C) 2009 Jon Smirl, Digispeaker
  5. * Author: Jon Smirl <jonsmirl@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/delay.h>
  15. #include <linux/time.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/soc.h>
  19. #include <asm/time.h>
  20. #include <asm/delay.h>
  21. #include <asm/mpc52xx.h>
  22. #include <asm/mpc52xx_psc.h>
  23. #include "mpc5200_dma.h"
  24. #define DRV_NAME "mpc5200-psc-ac97"
  25. /* ALSA only supports a single AC97 device so static is recommend here */
  26. static struct psc_dma *psc_dma;
  27. static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  28. {
  29. int status;
  30. unsigned int val;
  31. mutex_lock(&psc_dma->mutex);
  32. /* Wait for command send status zero = ready */
  33. status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
  34. MPC52xx_PSC_SR_CMDSEND), 100, 0);
  35. if (status == 0) {
  36. pr_err("timeout on ac97 bus (rdy)\n");
  37. mutex_unlock(&psc_dma->mutex);
  38. return -ENODEV;
  39. }
  40. /* Force clear the data valid bit */
  41. in_be32(&psc_dma->psc_regs->ac97_data);
  42. /* Send the read */
  43. out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
  44. /* Wait for the answer */
  45. status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
  46. MPC52xx_PSC_SR_DATA_VAL), 100, 0);
  47. if (status == 0) {
  48. pr_err("timeout on ac97 read (val) %x\n",
  49. in_be16(&psc_dma->psc_regs->sr_csr.status));
  50. mutex_unlock(&psc_dma->mutex);
  51. return -ENODEV;
  52. }
  53. /* Get the data */
  54. val = in_be32(&psc_dma->psc_regs->ac97_data);
  55. if (((val >> 24) & 0x7f) != reg) {
  56. pr_err("reg echo error on ac97 read\n");
  57. mutex_unlock(&psc_dma->mutex);
  58. return -ENODEV;
  59. }
  60. val = (val >> 8) & 0xffff;
  61. mutex_unlock(&psc_dma->mutex);
  62. return (unsigned short) val;
  63. }
  64. static void psc_ac97_write(struct snd_ac97 *ac97,
  65. unsigned short reg, unsigned short val)
  66. {
  67. int status;
  68. mutex_lock(&psc_dma->mutex);
  69. /* Wait for command status zero = ready */
  70. status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
  71. MPC52xx_PSC_SR_CMDSEND), 100, 0);
  72. if (status == 0) {
  73. pr_err("timeout on ac97 bus (write)\n");
  74. goto out;
  75. }
  76. /* Write data */
  77. out_be32(&psc_dma->psc_regs->ac97_cmd,
  78. ((reg & 0x7f) << 24) | (val << 8));
  79. out:
  80. mutex_unlock(&psc_dma->mutex);
  81. }
  82. static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
  83. {
  84. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  85. mutex_lock(&psc_dma->mutex);
  86. out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
  87. udelay(3);
  88. out_be32(&regs->sicr, psc_dma->sicr);
  89. mutex_unlock(&psc_dma->mutex);
  90. }
  91. static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
  92. {
  93. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  94. mutex_lock(&psc_dma->mutex);
  95. dev_dbg(psc_dma->dev, "cold reset\n");
  96. mpc5200_psc_ac97_gpio_reset(psc_dma->id);
  97. /* Notify the PSC that a reset has occurred */
  98. out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB);
  99. /* Re-enable RX and TX */
  100. out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
  101. mutex_unlock(&psc_dma->mutex);
  102. usleep_range(1000, 2000);
  103. psc_ac97_warm_reset(ac97);
  104. }
  105. static struct snd_ac97_bus_ops psc_ac97_ops = {
  106. .read = psc_ac97_read,
  107. .write = psc_ac97_write,
  108. .reset = psc_ac97_cold_reset,
  109. .warm_reset = psc_ac97_warm_reset,
  110. };
  111. static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream,
  112. struct snd_pcm_hw_params *params,
  113. struct snd_soc_dai *cpu_dai)
  114. {
  115. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
  116. struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
  117. dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
  118. " periods=%i buffer_size=%i buffer_bytes=%i channels=%i"
  119. " rate=%i format=%i\n",
  120. __func__, substream, params_period_size(params),
  121. params_period_bytes(params), params_periods(params),
  122. params_buffer_size(params), params_buffer_bytes(params),
  123. params_channels(params), params_rate(params),
  124. params_format(params));
  125. /* Determine the set of enable bits to turn on */
  126. s->ac97_slot_bits = (params_channels(params) == 1) ? 0x100 : 0x300;
  127. if (substream->pstr->stream != SNDRV_PCM_STREAM_CAPTURE)
  128. s->ac97_slot_bits <<= 16;
  129. return 0;
  130. }
  131. static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream,
  132. struct snd_pcm_hw_params *params,
  133. struct snd_soc_dai *cpu_dai)
  134. {
  135. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
  136. dev_dbg(psc_dma->dev, "%s(substream=%p)\n", __func__, substream);
  137. if (params_channels(params) == 1)
  138. out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
  139. else
  140. out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
  141. return 0;
  142. }
  143. static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
  144. struct snd_soc_dai *dai)
  145. {
  146. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(dai);
  147. struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
  148. switch (cmd) {
  149. case SNDRV_PCM_TRIGGER_START:
  150. dev_dbg(psc_dma->dev, "AC97 START: stream=%i\n",
  151. substream->pstr->stream);
  152. /* Set the slot enable bits */
  153. psc_dma->slots |= s->ac97_slot_bits;
  154. out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
  155. break;
  156. case SNDRV_PCM_TRIGGER_STOP:
  157. dev_dbg(psc_dma->dev, "AC97 STOP: stream=%i\n",
  158. substream->pstr->stream);
  159. /* Clear the slot enable bits */
  160. psc_dma->slots &= ~(s->ac97_slot_bits);
  161. out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
  162. break;
  163. }
  164. return 0;
  165. }
  166. static int psc_ac97_probe(struct snd_soc_dai *cpu_dai)
  167. {
  168. struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
  169. struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
  170. /* Go */
  171. out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
  172. return 0;
  173. }
  174. /* ---------------------------------------------------------------------
  175. * ALSA SoC Bindings
  176. *
  177. * - Digital Audio Interface (DAI) template
  178. * - create/destroy dai hooks
  179. */
  180. /**
  181. * psc_ac97_dai_template: template CPU Digital Audio Interface
  182. */
  183. static const struct snd_soc_dai_ops psc_ac97_analog_ops = {
  184. .hw_params = psc_ac97_hw_analog_params,
  185. .trigger = psc_ac97_trigger,
  186. };
  187. static const struct snd_soc_dai_ops psc_ac97_digital_ops = {
  188. .hw_params = psc_ac97_hw_digital_params,
  189. };
  190. static struct snd_soc_dai_driver psc_ac97_dai[] = {
  191. {
  192. .name = "mpc5200-psc-ac97.0",
  193. .bus_control = true,
  194. .probe = psc_ac97_probe,
  195. .playback = {
  196. .stream_name = "AC97 Playback",
  197. .channels_min = 1,
  198. .channels_max = 6,
  199. .rates = SNDRV_PCM_RATE_8000_48000,
  200. .formats = SNDRV_PCM_FMTBIT_S32_BE,
  201. },
  202. .capture = {
  203. .stream_name = "AC97 Capture",
  204. .channels_min = 1,
  205. .channels_max = 2,
  206. .rates = SNDRV_PCM_RATE_8000_48000,
  207. .formats = SNDRV_PCM_FMTBIT_S32_BE,
  208. },
  209. .ops = &psc_ac97_analog_ops,
  210. },
  211. {
  212. .name = "mpc5200-psc-ac97.1",
  213. .bus_control = true,
  214. .playback = {
  215. .stream_name = "AC97 SPDIF",
  216. .channels_min = 1,
  217. .channels_max = 2,
  218. .rates = SNDRV_PCM_RATE_32000 | \
  219. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
  220. .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE,
  221. },
  222. .ops = &psc_ac97_digital_ops,
  223. } };
  224. static const struct snd_soc_component_driver psc_ac97_component = {
  225. .name = DRV_NAME,
  226. };
  227. /* ---------------------------------------------------------------------
  228. * OF platform bus binding code:
  229. * - Probe/remove operations
  230. * - OF device match table
  231. */
  232. static int psc_ac97_of_probe(struct platform_device *op)
  233. {
  234. int rc;
  235. struct mpc52xx_psc __iomem *regs;
  236. rc = mpc5200_audio_dma_create(op);
  237. if (rc != 0)
  238. return rc;
  239. rc = snd_soc_set_ac97_ops(&psc_ac97_ops);
  240. if (rc != 0) {
  241. dev_err(&op->dev, "Failed to set AC'97 ops: %d\n", rc);
  242. return rc;
  243. }
  244. rc = snd_soc_register_component(&op->dev, &psc_ac97_component,
  245. psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai));
  246. if (rc != 0) {
  247. dev_err(&op->dev, "Failed to register DAI\n");
  248. return rc;
  249. }
  250. psc_dma = dev_get_drvdata(&op->dev);
  251. regs = psc_dma->psc_regs;
  252. psc_dma->imr = 0;
  253. out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
  254. /* Configure the serial interface mode to AC97 */
  255. psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
  256. out_be32(&regs->sicr, psc_dma->sicr);
  257. /* No slots active */
  258. out_be32(&regs->ac97_slots, 0x00000000);
  259. return 0;
  260. }
  261. static int psc_ac97_of_remove(struct platform_device *op)
  262. {
  263. mpc5200_audio_dma_destroy(op);
  264. snd_soc_unregister_component(&op->dev);
  265. snd_soc_set_ac97_ops(NULL);
  266. return 0;
  267. }
  268. /* Match table for of_platform binding */
  269. static const struct of_device_id psc_ac97_match[] = {
  270. { .compatible = "fsl,mpc5200-psc-ac97", },
  271. { .compatible = "fsl,mpc5200b-psc-ac97", },
  272. {}
  273. };
  274. MODULE_DEVICE_TABLE(of, psc_ac97_match);
  275. static struct platform_driver psc_ac97_driver = {
  276. .probe = psc_ac97_of_probe,
  277. .remove = psc_ac97_of_remove,
  278. .driver = {
  279. .name = "mpc5200-psc-ac97",
  280. .of_match_table = psc_ac97_match,
  281. },
  282. };
  283. module_platform_driver(psc_ac97_driver);
  284. MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
  285. MODULE_DESCRIPTION("mpc5200 AC97 module");
  286. MODULE_LICENSE("GPL");