cht_bsw_max98090_ti.c 14 KB

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  1. /*
  2. * cht-bsw-max98090.c - ASoc Machine driver for Intel Cherryview-based
  3. * platforms Cherrytrail and Braswell, with max98090 & TI codec.
  4. *
  5. * Copyright (C) 2015 Intel Corp
  6. * Author: Fang, Yang A <yang.a.fang@intel.com>
  7. * This file is modified from cht_bsw_rt5645.c
  8. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; version 2 of the License.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  20. */
  21. #include <linux/dmi.h>
  22. #include <linux/module.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/slab.h>
  25. #include <linux/acpi.h>
  26. #include <linux/clk.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/soc.h>
  30. #include <sound/jack.h>
  31. #include "../../codecs/max98090.h"
  32. #include "../atom/sst-atom-controls.h"
  33. #include "../../codecs/ts3a227e.h"
  34. #define CHT_PLAT_CLK_3_HZ 19200000
  35. #define CHT_CODEC_DAI "HiFi"
  36. #define QUIRK_PMC_PLT_CLK_0 0x01
  37. struct cht_mc_private {
  38. struct clk *mclk;
  39. struct snd_soc_jack jack;
  40. bool ts3a227e_present;
  41. int quirks;
  42. };
  43. static int platform_clock_control(struct snd_soc_dapm_widget *w,
  44. struct snd_kcontrol *k, int event)
  45. {
  46. struct snd_soc_dapm_context *dapm = w->dapm;
  47. struct snd_soc_card *card = dapm->card;
  48. struct snd_soc_dai *codec_dai;
  49. struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
  50. int ret;
  51. /* See the comment in snd_cht_mc_probe() */
  52. if (ctx->quirks & QUIRK_PMC_PLT_CLK_0)
  53. return 0;
  54. codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
  55. if (!codec_dai) {
  56. dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
  57. return -EIO;
  58. }
  59. if (SND_SOC_DAPM_EVENT_ON(event)) {
  60. ret = clk_prepare_enable(ctx->mclk);
  61. if (ret < 0) {
  62. dev_err(card->dev,
  63. "could not configure MCLK state");
  64. return ret;
  65. }
  66. } else {
  67. clk_disable_unprepare(ctx->mclk);
  68. }
  69. return 0;
  70. }
  71. static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
  72. SND_SOC_DAPM_HP("Headphone", NULL),
  73. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  74. SND_SOC_DAPM_MIC("Int Mic", NULL),
  75. SND_SOC_DAPM_SPK("Ext Spk", NULL),
  76. SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
  77. platform_clock_control, SND_SOC_DAPM_PRE_PMU |
  78. SND_SOC_DAPM_POST_PMD),
  79. };
  80. static const struct snd_soc_dapm_route cht_audio_map[] = {
  81. {"IN34", NULL, "Headset Mic"},
  82. {"Headset Mic", NULL, "MICBIAS"},
  83. {"DMICL", NULL, "Int Mic"},
  84. {"Headphone", NULL, "HPL"},
  85. {"Headphone", NULL, "HPR"},
  86. {"Ext Spk", NULL, "SPKL"},
  87. {"Ext Spk", NULL, "SPKR"},
  88. {"HiFi Playback", NULL, "ssp2 Tx"},
  89. {"ssp2 Tx", NULL, "codec_out0"},
  90. {"ssp2 Tx", NULL, "codec_out1"},
  91. {"codec_in0", NULL, "ssp2 Rx" },
  92. {"codec_in1", NULL, "ssp2 Rx" },
  93. {"ssp2 Rx", NULL, "HiFi Capture"},
  94. {"Headphone", NULL, "Platform Clock"},
  95. {"Headset Mic", NULL, "Platform Clock"},
  96. {"Int Mic", NULL, "Platform Clock"},
  97. {"Ext Spk", NULL, "Platform Clock"},
  98. };
  99. static const struct snd_kcontrol_new cht_mc_controls[] = {
  100. SOC_DAPM_PIN_SWITCH("Headphone"),
  101. SOC_DAPM_PIN_SWITCH("Headset Mic"),
  102. SOC_DAPM_PIN_SWITCH("Int Mic"),
  103. SOC_DAPM_PIN_SWITCH("Ext Spk"),
  104. };
  105. static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
  106. struct snd_pcm_hw_params *params)
  107. {
  108. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  109. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  110. int ret;
  111. ret = snd_soc_dai_set_sysclk(codec_dai, M98090_REG_SYSTEM_CLOCK,
  112. CHT_PLAT_CLK_3_HZ, SND_SOC_CLOCK_IN);
  113. if (ret < 0) {
  114. dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
  115. return ret;
  116. }
  117. return 0;
  118. }
  119. static int cht_ti_jack_event(struct notifier_block *nb,
  120. unsigned long event, void *data)
  121. {
  122. struct snd_soc_jack *jack = (struct snd_soc_jack *)data;
  123. struct snd_soc_dapm_context *dapm = &jack->card->dapm;
  124. if (event & SND_JACK_MICROPHONE) {
  125. snd_soc_dapm_force_enable_pin(dapm, "SHDN");
  126. snd_soc_dapm_force_enable_pin(dapm, "MICBIAS");
  127. snd_soc_dapm_sync(dapm);
  128. } else {
  129. snd_soc_dapm_disable_pin(dapm, "MICBIAS");
  130. snd_soc_dapm_disable_pin(dapm, "SHDN");
  131. snd_soc_dapm_sync(dapm);
  132. }
  133. return 0;
  134. }
  135. static struct notifier_block cht_jack_nb = {
  136. .notifier_call = cht_ti_jack_event,
  137. };
  138. static struct snd_soc_jack_pin hs_jack_pins[] = {
  139. {
  140. .pin = "Headphone",
  141. .mask = SND_JACK_HEADPHONE,
  142. },
  143. {
  144. .pin = "Headset Mic",
  145. .mask = SND_JACK_MICROPHONE,
  146. },
  147. };
  148. static struct snd_soc_jack_gpio hs_jack_gpios[] = {
  149. {
  150. .name = "hp",
  151. .report = SND_JACK_HEADPHONE | SND_JACK_LINEOUT,
  152. .debounce_time = 200,
  153. },
  154. {
  155. .name = "mic",
  156. .invert = 1,
  157. .report = SND_JACK_MICROPHONE,
  158. .debounce_time = 200,
  159. },
  160. };
  161. static const struct acpi_gpio_params hp_gpios = { 0, 0, false };
  162. static const struct acpi_gpio_params mic_gpios = { 1, 0, false };
  163. static const struct acpi_gpio_mapping acpi_max98090_gpios[] = {
  164. { "hp-gpios", &hp_gpios, 1 },
  165. { "mic-gpios", &mic_gpios, 1 },
  166. {},
  167. };
  168. static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
  169. {
  170. int ret;
  171. int jack_type;
  172. struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
  173. struct snd_soc_jack *jack = &ctx->jack;
  174. if (ctx->ts3a227e_present) {
  175. /*
  176. * The jack has already been created in the
  177. * cht_max98090_headset_init() function.
  178. */
  179. snd_soc_jack_notifier_register(jack, &cht_jack_nb);
  180. return 0;
  181. }
  182. jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE;
  183. ret = snd_soc_card_jack_new(runtime->card, "Headset Jack",
  184. jack_type, jack,
  185. hs_jack_pins, ARRAY_SIZE(hs_jack_pins));
  186. if (ret) {
  187. dev_err(runtime->dev, "Headset Jack creation failed %d\n", ret);
  188. return ret;
  189. }
  190. ret = snd_soc_jack_add_gpiods(runtime->card->dev->parent, jack,
  191. ARRAY_SIZE(hs_jack_gpios),
  192. hs_jack_gpios);
  193. if (ret) {
  194. /*
  195. * flag error but don't bail if jack detect is broken
  196. * due to platform issues or bad BIOS/configuration
  197. */
  198. dev_err(runtime->dev,
  199. "jack detection gpios not added, error %d\n", ret);
  200. }
  201. /* See the comment in snd_cht_mc_probe() */
  202. if (ctx->quirks & QUIRK_PMC_PLT_CLK_0)
  203. return 0;
  204. /*
  205. * The firmware might enable the clock at
  206. * boot (this information may or may not
  207. * be reflected in the enable clock register).
  208. * To change the rate we must disable the clock
  209. * first to cover these cases. Due to common
  210. * clock framework restrictions that do not allow
  211. * to disable a clock that has not been enabled,
  212. * we need to enable the clock first.
  213. */
  214. ret = clk_prepare_enable(ctx->mclk);
  215. if (!ret)
  216. clk_disable_unprepare(ctx->mclk);
  217. ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
  218. if (ret)
  219. dev_err(runtime->dev, "unable to set MCLK rate\n");
  220. return ret;
  221. }
  222. static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
  223. struct snd_pcm_hw_params *params)
  224. {
  225. struct snd_interval *rate = hw_param_interval(params,
  226. SNDRV_PCM_HW_PARAM_RATE);
  227. struct snd_interval *channels = hw_param_interval(params,
  228. SNDRV_PCM_HW_PARAM_CHANNELS);
  229. int ret = 0;
  230. unsigned int fmt = 0;
  231. ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16);
  232. if (ret < 0) {
  233. dev_err(rtd->dev, "can't set cpu_dai slot fmt: %d\n", ret);
  234. return ret;
  235. }
  236. fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
  237. | SND_SOC_DAIFMT_CBS_CFS;
  238. ret = snd_soc_dai_set_fmt(rtd->cpu_dai, fmt);
  239. if (ret < 0) {
  240. dev_err(rtd->dev, "can't set cpu_dai set fmt: %d\n", ret);
  241. return ret;
  242. }
  243. /* The DSP will covert the FE rate to 48k, stereo, 24bits */
  244. rate->min = rate->max = 48000;
  245. channels->min = channels->max = 2;
  246. /* set SSP2 to 16-bit */
  247. params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
  248. return 0;
  249. }
  250. static int cht_aif1_startup(struct snd_pcm_substream *substream)
  251. {
  252. return snd_pcm_hw_constraint_single(substream->runtime,
  253. SNDRV_PCM_HW_PARAM_RATE, 48000);
  254. }
  255. static int cht_max98090_headset_init(struct snd_soc_component *component)
  256. {
  257. struct snd_soc_card *card = component->card;
  258. struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
  259. struct snd_soc_jack *jack = &ctx->jack;
  260. int jack_type;
  261. int ret;
  262. /*
  263. * TI supports 4 butons headset detection
  264. * KEY_MEDIA
  265. * KEY_VOICECOMMAND
  266. * KEY_VOLUMEUP
  267. * KEY_VOLUMEDOWN
  268. */
  269. jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE |
  270. SND_JACK_BTN_0 | SND_JACK_BTN_1 |
  271. SND_JACK_BTN_2 | SND_JACK_BTN_3;
  272. ret = snd_soc_card_jack_new(card, "Headset Jack", jack_type,
  273. jack, NULL, 0);
  274. if (ret) {
  275. dev_err(card->dev, "Headset Jack creation failed %d\n", ret);
  276. return ret;
  277. }
  278. return ts3a227e_enable_jack_detect(component, jack);
  279. }
  280. static const struct snd_soc_ops cht_aif1_ops = {
  281. .startup = cht_aif1_startup,
  282. };
  283. static const struct snd_soc_ops cht_be_ssp2_ops = {
  284. .hw_params = cht_aif1_hw_params,
  285. };
  286. static struct snd_soc_aux_dev cht_max98090_headset_dev = {
  287. .name = "Headset Chip",
  288. .init = cht_max98090_headset_init,
  289. .codec_name = "i2c-104C227E:00",
  290. };
  291. static struct snd_soc_dai_link cht_dailink[] = {
  292. [MERR_DPCM_AUDIO] = {
  293. .name = "Audio Port",
  294. .stream_name = "Audio",
  295. .cpu_dai_name = "media-cpu-dai",
  296. .codec_dai_name = "snd-soc-dummy-dai",
  297. .codec_name = "snd-soc-dummy",
  298. .platform_name = "sst-mfld-platform",
  299. .nonatomic = true,
  300. .dynamic = 1,
  301. .dpcm_playback = 1,
  302. .dpcm_capture = 1,
  303. .ops = &cht_aif1_ops,
  304. },
  305. [MERR_DPCM_DEEP_BUFFER] = {
  306. .name = "Deep-Buffer Audio Port",
  307. .stream_name = "Deep-Buffer Audio",
  308. .cpu_dai_name = "deepbuffer-cpu-dai",
  309. .codec_dai_name = "snd-soc-dummy-dai",
  310. .codec_name = "snd-soc-dummy",
  311. .platform_name = "sst-mfld-platform",
  312. .nonatomic = true,
  313. .dynamic = 1,
  314. .dpcm_playback = 1,
  315. .ops = &cht_aif1_ops,
  316. },
  317. /* back ends */
  318. {
  319. .name = "SSP2-Codec",
  320. .id = 0,
  321. .cpu_dai_name = "ssp2-port",
  322. .platform_name = "sst-mfld-platform",
  323. .no_pcm = 1,
  324. .codec_dai_name = "HiFi",
  325. .codec_name = "i2c-193C9890:00",
  326. .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
  327. | SND_SOC_DAIFMT_CBS_CFS,
  328. .init = cht_codec_init,
  329. .be_hw_params_fixup = cht_codec_fixup,
  330. .dpcm_playback = 1,
  331. .dpcm_capture = 1,
  332. .ops = &cht_be_ssp2_ops,
  333. },
  334. };
  335. /* SoC card */
  336. static struct snd_soc_card snd_soc_card_cht = {
  337. .name = "chtmax98090",
  338. .owner = THIS_MODULE,
  339. .dai_link = cht_dailink,
  340. .num_links = ARRAY_SIZE(cht_dailink),
  341. .aux_dev = &cht_max98090_headset_dev,
  342. .num_aux_devs = 1,
  343. .dapm_widgets = cht_dapm_widgets,
  344. .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
  345. .dapm_routes = cht_audio_map,
  346. .num_dapm_routes = ARRAY_SIZE(cht_audio_map),
  347. .controls = cht_mc_controls,
  348. .num_controls = ARRAY_SIZE(cht_mc_controls),
  349. };
  350. static const struct dmi_system_id cht_max98090_quirk_table[] = {
  351. {
  352. /* Clapper model Chromebook */
  353. .matches = {
  354. DMI_MATCH(DMI_PRODUCT_NAME, "Clapper"),
  355. },
  356. .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
  357. },
  358. {
  359. /* Gnawty model Chromebook (Acer Chromebook CB3-111) */
  360. .matches = {
  361. DMI_MATCH(DMI_PRODUCT_NAME, "Gnawty"),
  362. },
  363. .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
  364. },
  365. {
  366. /* Swanky model Chromebook (Toshiba Chromebook 2) */
  367. .matches = {
  368. DMI_MATCH(DMI_PRODUCT_NAME, "Swanky"),
  369. },
  370. .driver_data = (void *)QUIRK_PMC_PLT_CLK_0,
  371. },
  372. {}
  373. };
  374. static int snd_cht_mc_probe(struct platform_device *pdev)
  375. {
  376. const struct dmi_system_id *dmi_id;
  377. struct device *dev = &pdev->dev;
  378. int ret_val = 0;
  379. struct cht_mc_private *drv;
  380. const char *mclk_name;
  381. drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
  382. if (!drv)
  383. return -ENOMEM;
  384. dmi_id = dmi_first_match(cht_max98090_quirk_table);
  385. if (dmi_id)
  386. drv->quirks = (unsigned long)dmi_id->driver_data;
  387. drv->ts3a227e_present = acpi_dev_found("104C227E");
  388. if (!drv->ts3a227e_present) {
  389. /* no need probe TI jack detection chip */
  390. snd_soc_card_cht.aux_dev = NULL;
  391. snd_soc_card_cht.num_aux_devs = 0;
  392. ret_val = devm_acpi_dev_add_driver_gpios(dev->parent,
  393. acpi_max98090_gpios);
  394. if (ret_val)
  395. dev_dbg(dev, "Unable to add GPIO mapping table\n");
  396. }
  397. /* register the soc card */
  398. snd_soc_card_cht.dev = &pdev->dev;
  399. snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
  400. if (drv->quirks & QUIRK_PMC_PLT_CLK_0)
  401. mclk_name = "pmc_plt_clk_0";
  402. else
  403. mclk_name = "pmc_plt_clk_3";
  404. drv->mclk = devm_clk_get(&pdev->dev, mclk_name);
  405. if (IS_ERR(drv->mclk)) {
  406. dev_err(&pdev->dev,
  407. "Failed to get MCLK from %s: %ld\n",
  408. mclk_name, PTR_ERR(drv->mclk));
  409. return PTR_ERR(drv->mclk);
  410. }
  411. /*
  412. * Boards which have the MAX98090's clk connected to clk_0 do not seem
  413. * to like it if we muck with the clock. If we disable the clock when
  414. * it is unused we get "max98090 i2c-193C9890:00: PLL unlocked" errors
  415. * and the PLL never seems to lock again.
  416. * So for these boards we enable it here once and leave it at that.
  417. */
  418. if (drv->quirks & QUIRK_PMC_PLT_CLK_0) {
  419. ret_val = clk_prepare_enable(drv->mclk);
  420. if (ret_val < 0) {
  421. dev_err(&pdev->dev, "MCLK enable error: %d\n", ret_val);
  422. return ret_val;
  423. }
  424. }
  425. ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
  426. if (ret_val) {
  427. dev_err(&pdev->dev,
  428. "snd_soc_register_card failed %d\n", ret_val);
  429. return ret_val;
  430. }
  431. platform_set_drvdata(pdev, &snd_soc_card_cht);
  432. return ret_val;
  433. }
  434. static int snd_cht_mc_remove(struct platform_device *pdev)
  435. {
  436. struct snd_soc_card *card = platform_get_drvdata(pdev);
  437. struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
  438. if (ctx->quirks & QUIRK_PMC_PLT_CLK_0)
  439. clk_disable_unprepare(ctx->mclk);
  440. return 0;
  441. }
  442. static struct platform_driver snd_cht_mc_driver = {
  443. .driver = {
  444. .name = "cht-bsw-max98090",
  445. },
  446. .probe = snd_cht_mc_probe,
  447. .remove = snd_cht_mc_remove,
  448. };
  449. module_platform_driver(snd_cht_mc_driver)
  450. MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver");
  451. MODULE_AUTHOR("Fang, Yang A <yang.a.fang@intel.com>");
  452. MODULE_LICENSE("GPL v2");
  453. MODULE_ALIAS("platform:cht-bsw-max98090");