northstar2.c 1.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2016 Broadcom Ltd.
  4. */
  5. #include <common.h>
  6. #include <asm/system.h>
  7. #include <asm/armv8/mmu.h>
  8. static struct mm_region ns2_mem_map[] = {
  9. {
  10. .virt = 0x0UL,
  11. .phys = 0x0UL,
  12. .size = 0x80000000UL,
  13. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  14. PTE_BLOCK_NON_SHARE |
  15. PTE_BLOCK_PXN | PTE_BLOCK_UXN
  16. }, {
  17. .virt = 0x80000000UL,
  18. .phys = 0x80000000UL,
  19. .size = 0xff80000000UL,
  20. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  21. PTE_BLOCK_INNER_SHARE
  22. }, {
  23. /* List terminator */
  24. 0,
  25. }
  26. };
  27. struct mm_region *mem_map = ns2_mem_map;
  28. DECLARE_GLOBAL_DATA_PTR;
  29. int board_init(void)
  30. {
  31. return 0;
  32. }
  33. int dram_init(void)
  34. {
  35. gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  36. PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE);
  37. return 0;
  38. }
  39. int dram_init_banksize(void)
  40. {
  41. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  42. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  43. gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE;
  44. gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  45. return 0;
  46. }
  47. void reset_cpu(ulong addr)
  48. {
  49. psci_system_reset();
  50. }