db1300.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * DBAu1300 init and platform device setup.
  4. *
  5. * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
  6. */
  7. #include <linux/clk.h>
  8. #include <linux/dma-mapping.h>
  9. #include <linux/gpio.h>
  10. #include <linux/gpio_keys.h>
  11. #include <linux/init.h>
  12. #include <linux/input.h> /* KEY_* codes */
  13. #include <linux/i2c.h>
  14. #include <linux/io.h>
  15. #include <linux/leds.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/ata_platform.h>
  18. #include <linux/mmc/host.h>
  19. #include <linux/module.h>
  20. #include <linux/mtd/mtd.h>
  21. #include <linux/mtd/rawnand.h>
  22. #include <linux/mtd/partitions.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/smsc911x.h>
  25. #include <linux/wm97xx.h>
  26. #include <asm/mach-au1x00/au1000.h>
  27. #include <asm/mach-au1x00/gpio-au1300.h>
  28. #include <asm/mach-au1x00/au1100_mmc.h>
  29. #include <asm/mach-au1x00/au1200fb.h>
  30. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  31. #include <asm/mach-au1x00/au1xxx_psc.h>
  32. #include <asm/mach-db1x00/bcsr.h>
  33. #include <asm/mach-au1x00/prom.h>
  34. #include "platform.h"
  35. /* FPGA (external mux) interrupt sources */
  36. #define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1)
  37. #define DB1300_IDE_INT (DB1300_FIRST_INT + 0)
  38. #define DB1300_ETH_INT (DB1300_FIRST_INT + 1)
  39. #define DB1300_CF_INT (DB1300_FIRST_INT + 2)
  40. #define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4)
  41. #define DB1300_HDMI_INT (DB1300_FIRST_INT + 5)
  42. #define DB1300_DC_INT (DB1300_FIRST_INT + 6)
  43. #define DB1300_FLASH_INT (DB1300_FIRST_INT + 7)
  44. #define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8)
  45. #define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9)
  46. #define DB1300_AC97_INT (DB1300_FIRST_INT + 10)
  47. #define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11)
  48. #define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12)
  49. #define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13)
  50. #define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14)
  51. #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
  52. #define DB1300_LAST_INT (DB1300_FIRST_INT + 15)
  53. /* SMSC9210 CS */
  54. #define DB1300_ETH_PHYS_ADDR 0x19000000
  55. #define DB1300_ETH_PHYS_END 0x197fffff
  56. /* ATA CS */
  57. #define DB1300_IDE_PHYS_ADDR 0x18800000
  58. #define DB1300_IDE_REG_SHIFT 5
  59. #define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT)
  60. /* NAND CS */
  61. #define DB1300_NAND_PHYS_ADDR 0x20000000
  62. #define DB1300_NAND_PHYS_END 0x20000fff
  63. static struct i2c_board_info db1300_i2c_devs[] __initdata = {
  64. { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */
  65. { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
  66. };
  67. /* multifunction pins to assign to GPIO controller */
  68. static int db1300_gpio_pins[] __initdata = {
  69. AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1,
  70. AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX,
  71. AU1300_PIN_EXTCLK1,
  72. -1, /* terminator */
  73. };
  74. /* multifunction pins to assign to device functions */
  75. static int db1300_dev_pins[] __initdata = {
  76. /* wake-from-str pins 0-3 */
  77. AU1300_PIN_WAKE0,
  78. /* external clock sources for PSC0 */
  79. AU1300_PIN_EXTCLK0,
  80. /* 8bit MMC interface on SD0: 6-9 */
  81. AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6,
  82. AU1300_PIN_SD0DAT7,
  83. /* UART1 pins: 11-18 */
  84. AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR,
  85. AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR,
  86. AU1300_PIN_U1RX, AU1300_PIN_U1TX,
  87. /* UART0 pins: 19-24 */
  88. AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR,
  89. AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR,
  90. /* UART2: 25-26 */
  91. AU1300_PIN_U2RX, AU1300_PIN_U2TX,
  92. /* UART3: 27-28 */
  93. AU1300_PIN_U3RX, AU1300_PIN_U3TX,
  94. /* LCD controller PWMs, ext pixclock: 30-31 */
  95. AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN,
  96. /* SD1 interface: 32-37 */
  97. AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2,
  98. AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK,
  99. /* SD2 interface: 38-43 */
  100. AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2,
  101. AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK,
  102. /* PSC0/1 clocks: 44-45 */
  103. AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK,
  104. /* PSCs: 46-49/50-53/54-57/58-61 */
  105. AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0,
  106. AU1300_PIN_PSC0D1,
  107. AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0,
  108. AU1300_PIN_PSC1D1,
  109. AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0,
  110. AU1300_PIN_PSC2D1,
  111. AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0,
  112. AU1300_PIN_PSC3D1,
  113. /* PCMCIA interface: 62-70 */
  114. AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16,
  115. AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT,
  116. AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW,
  117. /* camera interface H/V sync inputs: 71-72 */
  118. AU1300_PIN_CIMLS, AU1300_PIN_CIMFS,
  119. /* PSC2/3 clocks: 73-74 */
  120. AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK,
  121. -1, /* terminator */
  122. };
  123. static void __init db1300_gpio_config(void)
  124. {
  125. int *i;
  126. i = &db1300_dev_pins[0];
  127. while (*i != -1)
  128. au1300_pinfunc_to_dev(*i++);
  129. i = &db1300_gpio_pins[0];
  130. while (*i != -1)
  131. au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */
  132. au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
  133. }
  134. /**********************************************************************/
  135. static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
  136. unsigned int ctrl)
  137. {
  138. struct nand_chip *this = mtd_to_nand(mtd);
  139. unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
  140. ioaddr &= 0xffffff00;
  141. if (ctrl & NAND_CLE) {
  142. ioaddr += MEM_STNAND_CMD;
  143. } else if (ctrl & NAND_ALE) {
  144. ioaddr += MEM_STNAND_ADDR;
  145. } else {
  146. /* assume we want to r/w real data by default */
  147. ioaddr += MEM_STNAND_DATA;
  148. }
  149. this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
  150. if (cmd != NAND_CMD_NONE) {
  151. __raw_writeb(cmd, this->IO_ADDR_W);
  152. wmb();
  153. }
  154. }
  155. static int au1300_nand_device_ready(struct mtd_info *mtd)
  156. {
  157. return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
  158. }
  159. static struct mtd_partition db1300_nand_parts[] = {
  160. {
  161. .name = "NAND FS 0",
  162. .offset = 0,
  163. .size = 8 * 1024 * 1024,
  164. },
  165. {
  166. .name = "NAND FS 1",
  167. .offset = MTDPART_OFS_APPEND,
  168. .size = MTDPART_SIZ_FULL
  169. },
  170. };
  171. struct platform_nand_data db1300_nand_platdata = {
  172. .chip = {
  173. .nr_chips = 1,
  174. .chip_offset = 0,
  175. .nr_partitions = ARRAY_SIZE(db1300_nand_parts),
  176. .partitions = db1300_nand_parts,
  177. .chip_delay = 20,
  178. },
  179. .ctrl = {
  180. .dev_ready = au1300_nand_device_ready,
  181. .cmd_ctrl = au1300_nand_cmd_ctrl,
  182. },
  183. };
  184. static struct resource db1300_nand_res[] = {
  185. [0] = {
  186. .start = DB1300_NAND_PHYS_ADDR,
  187. .end = DB1300_NAND_PHYS_ADDR + 0xff,
  188. .flags = IORESOURCE_MEM,
  189. },
  190. };
  191. static struct platform_device db1300_nand_dev = {
  192. .name = "gen_nand",
  193. .num_resources = ARRAY_SIZE(db1300_nand_res),
  194. .resource = db1300_nand_res,
  195. .id = -1,
  196. .dev = {
  197. .platform_data = &db1300_nand_platdata,
  198. }
  199. };
  200. /**********************************************************************/
  201. static struct resource db1300_eth_res[] = {
  202. [0] = {
  203. .start = DB1300_ETH_PHYS_ADDR,
  204. .end = DB1300_ETH_PHYS_END,
  205. .flags = IORESOURCE_MEM,
  206. },
  207. [1] = {
  208. .start = DB1300_ETH_INT,
  209. .end = DB1300_ETH_INT,
  210. .flags = IORESOURCE_IRQ,
  211. },
  212. };
  213. static struct smsc911x_platform_config db1300_eth_config = {
  214. .phy_interface = PHY_INTERFACE_MODE_MII,
  215. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  216. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  217. .flags = SMSC911X_USE_32BIT,
  218. };
  219. static struct platform_device db1300_eth_dev = {
  220. .name = "smsc911x",
  221. .id = -1,
  222. .num_resources = ARRAY_SIZE(db1300_eth_res),
  223. .resource = db1300_eth_res,
  224. .dev = {
  225. .platform_data = &db1300_eth_config,
  226. },
  227. };
  228. /**********************************************************************/
  229. static struct resource au1300_psc1_res[] = {
  230. [0] = {
  231. .start = AU1300_PSC1_PHYS_ADDR,
  232. .end = AU1300_PSC1_PHYS_ADDR + 0x0fff,
  233. .flags = IORESOURCE_MEM,
  234. },
  235. [1] = {
  236. .start = AU1300_PSC1_INT,
  237. .end = AU1300_PSC1_INT,
  238. .flags = IORESOURCE_IRQ,
  239. },
  240. [2] = {
  241. .start = AU1300_DSCR_CMD0_PSC1_TX,
  242. .end = AU1300_DSCR_CMD0_PSC1_TX,
  243. .flags = IORESOURCE_DMA,
  244. },
  245. [3] = {
  246. .start = AU1300_DSCR_CMD0_PSC1_RX,
  247. .end = AU1300_DSCR_CMD0_PSC1_RX,
  248. .flags = IORESOURCE_DMA,
  249. },
  250. };
  251. static struct platform_device db1300_ac97_dev = {
  252. .name = "au1xpsc_ac97",
  253. .id = 1, /* PSC ID. match with AC97 codec ID! */
  254. .num_resources = ARRAY_SIZE(au1300_psc1_res),
  255. .resource = au1300_psc1_res,
  256. };
  257. /**********************************************************************/
  258. static struct resource au1300_psc2_res[] = {
  259. [0] = {
  260. .start = AU1300_PSC2_PHYS_ADDR,
  261. .end = AU1300_PSC2_PHYS_ADDR + 0x0fff,
  262. .flags = IORESOURCE_MEM,
  263. },
  264. [1] = {
  265. .start = AU1300_PSC2_INT,
  266. .end = AU1300_PSC2_INT,
  267. .flags = IORESOURCE_IRQ,
  268. },
  269. [2] = {
  270. .start = AU1300_DSCR_CMD0_PSC2_TX,
  271. .end = AU1300_DSCR_CMD0_PSC2_TX,
  272. .flags = IORESOURCE_DMA,
  273. },
  274. [3] = {
  275. .start = AU1300_DSCR_CMD0_PSC2_RX,
  276. .end = AU1300_DSCR_CMD0_PSC2_RX,
  277. .flags = IORESOURCE_DMA,
  278. },
  279. };
  280. static struct platform_device db1300_i2s_dev = {
  281. .name = "au1xpsc_i2s",
  282. .id = 2, /* PSC ID */
  283. .num_resources = ARRAY_SIZE(au1300_psc2_res),
  284. .resource = au1300_psc2_res,
  285. };
  286. /**********************************************************************/
  287. static struct resource au1300_psc3_res[] = {
  288. [0] = {
  289. .start = AU1300_PSC3_PHYS_ADDR,
  290. .end = AU1300_PSC3_PHYS_ADDR + 0x0fff,
  291. .flags = IORESOURCE_MEM,
  292. },
  293. [1] = {
  294. .start = AU1300_PSC3_INT,
  295. .end = AU1300_PSC3_INT,
  296. .flags = IORESOURCE_IRQ,
  297. },
  298. [2] = {
  299. .start = AU1300_DSCR_CMD0_PSC3_TX,
  300. .end = AU1300_DSCR_CMD0_PSC3_TX,
  301. .flags = IORESOURCE_DMA,
  302. },
  303. [3] = {
  304. .start = AU1300_DSCR_CMD0_PSC3_RX,
  305. .end = AU1300_DSCR_CMD0_PSC3_RX,
  306. .flags = IORESOURCE_DMA,
  307. },
  308. };
  309. static struct platform_device db1300_i2c_dev = {
  310. .name = "au1xpsc_smbus",
  311. .id = 0, /* bus number */
  312. .num_resources = ARRAY_SIZE(au1300_psc3_res),
  313. .resource = au1300_psc3_res,
  314. };
  315. /**********************************************************************/
  316. /* proper key assignments when facing the LCD panel. For key assignments
  317. * according to the schematics swap up with down and left with right.
  318. * I chose to use it to emulate the arrow keys of a keyboard.
  319. */
  320. static struct gpio_keys_button db1300_5waysw_arrowkeys[] = {
  321. {
  322. .code = KEY_DOWN,
  323. .gpio = AU1300_PIN_LCDPWM0,
  324. .type = EV_KEY,
  325. .debounce_interval = 1,
  326. .active_low = 1,
  327. .desc = "5waysw-down",
  328. },
  329. {
  330. .code = KEY_UP,
  331. .gpio = AU1300_PIN_PSC2SYNC1,
  332. .type = EV_KEY,
  333. .debounce_interval = 1,
  334. .active_low = 1,
  335. .desc = "5waysw-up",
  336. },
  337. {
  338. .code = KEY_RIGHT,
  339. .gpio = AU1300_PIN_WAKE3,
  340. .type = EV_KEY,
  341. .debounce_interval = 1,
  342. .active_low = 1,
  343. .desc = "5waysw-right",
  344. },
  345. {
  346. .code = KEY_LEFT,
  347. .gpio = AU1300_PIN_WAKE2,
  348. .type = EV_KEY,
  349. .debounce_interval = 1,
  350. .active_low = 1,
  351. .desc = "5waysw-left",
  352. },
  353. {
  354. .code = KEY_ENTER,
  355. .gpio = AU1300_PIN_WAKE1,
  356. .type = EV_KEY,
  357. .debounce_interval = 1,
  358. .active_low = 1,
  359. .desc = "5waysw-push",
  360. },
  361. };
  362. static struct gpio_keys_platform_data db1300_5waysw_data = {
  363. .buttons = db1300_5waysw_arrowkeys,
  364. .nbuttons = ARRAY_SIZE(db1300_5waysw_arrowkeys),
  365. .rep = 1,
  366. .name = "db1300-5wayswitch",
  367. };
  368. static struct platform_device db1300_5waysw_dev = {
  369. .name = "gpio-keys",
  370. .dev = {
  371. .platform_data = &db1300_5waysw_data,
  372. },
  373. };
  374. /**********************************************************************/
  375. static struct pata_platform_info db1300_ide_info = {
  376. .ioport_shift = DB1300_IDE_REG_SHIFT,
  377. };
  378. #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT)
  379. static struct resource db1300_ide_res[] = {
  380. [0] = {
  381. .start = DB1300_IDE_PHYS_ADDR,
  382. .end = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1,
  383. .flags = IORESOURCE_MEM,
  384. },
  385. [1] = {
  386. .start = DB1300_IDE_PHYS_ADDR + IDE_ALT_START,
  387. .end = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1,
  388. .flags = IORESOURCE_MEM,
  389. },
  390. [2] = {
  391. .start = DB1300_IDE_INT,
  392. .end = DB1300_IDE_INT,
  393. .flags = IORESOURCE_IRQ,
  394. },
  395. };
  396. static struct platform_device db1300_ide_dev = {
  397. .dev = {
  398. .platform_data = &db1300_ide_info,
  399. },
  400. .name = "pata_platform",
  401. .resource = db1300_ide_res,
  402. .num_resources = ARRAY_SIZE(db1300_ide_res),
  403. };
  404. /**********************************************************************/
  405. static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
  406. {
  407. disable_irq_nosync(irq);
  408. return IRQ_WAKE_THREAD;
  409. }
  410. static irqreturn_t db1300_mmc_cdfn(int irq, void *ptr)
  411. {
  412. void (*mmc_cd)(struct mmc_host *, unsigned long);
  413. /* link against CONFIG_MMC=m. We can only be called once MMC core has
  414. * initialized the controller, so symbol_get() should always succeed.
  415. */
  416. mmc_cd = symbol_get(mmc_detect_change);
  417. mmc_cd(ptr, msecs_to_jiffies(200));
  418. symbol_put(mmc_detect_change);
  419. msleep(100); /* debounce */
  420. if (irq == DB1300_SD1_INSERT_INT)
  421. enable_irq(DB1300_SD1_EJECT_INT);
  422. else
  423. enable_irq(DB1300_SD1_INSERT_INT);
  424. return IRQ_HANDLED;
  425. }
  426. static int db1300_mmc_card_readonly(void *mmc_host)
  427. {
  428. /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
  429. return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP;
  430. }
  431. static int db1300_mmc_card_inserted(void *mmc_host)
  432. {
  433. return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */
  434. }
  435. static int db1300_mmc_cd_setup(void *mmc_host, int en)
  436. {
  437. int ret;
  438. if (en) {
  439. ret = request_threaded_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd,
  440. db1300_mmc_cdfn, 0, "sd_insert", mmc_host);
  441. if (ret)
  442. goto out;
  443. ret = request_threaded_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd,
  444. db1300_mmc_cdfn, 0, "sd_eject", mmc_host);
  445. if (ret) {
  446. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  447. goto out;
  448. }
  449. if (db1300_mmc_card_inserted(mmc_host))
  450. enable_irq(DB1300_SD1_EJECT_INT);
  451. else
  452. enable_irq(DB1300_SD1_INSERT_INT);
  453. } else {
  454. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  455. free_irq(DB1300_SD1_EJECT_INT, mmc_host);
  456. }
  457. ret = 0;
  458. out:
  459. return ret;
  460. }
  461. static void db1300_mmcled_set(struct led_classdev *led,
  462. enum led_brightness brightness)
  463. {
  464. if (brightness != LED_OFF)
  465. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
  466. else
  467. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
  468. }
  469. static struct led_classdev db1300_mmc_led = {
  470. .brightness_set = db1300_mmcled_set,
  471. };
  472. struct au1xmmc_platform_data db1300_sd1_platdata = {
  473. .cd_setup = db1300_mmc_cd_setup,
  474. .card_inserted = db1300_mmc_card_inserted,
  475. .card_readonly = db1300_mmc_card_readonly,
  476. .led = &db1300_mmc_led,
  477. };
  478. static struct resource au1300_sd1_res[] = {
  479. [0] = {
  480. .start = AU1300_SD1_PHYS_ADDR,
  481. .end = AU1300_SD1_PHYS_ADDR,
  482. .flags = IORESOURCE_MEM,
  483. },
  484. [1] = {
  485. .start = AU1300_SD1_INT,
  486. .end = AU1300_SD1_INT,
  487. .flags = IORESOURCE_IRQ,
  488. },
  489. [2] = {
  490. .start = AU1300_DSCR_CMD0_SDMS_TX1,
  491. .end = AU1300_DSCR_CMD0_SDMS_TX1,
  492. .flags = IORESOURCE_DMA,
  493. },
  494. [3] = {
  495. .start = AU1300_DSCR_CMD0_SDMS_RX1,
  496. .end = AU1300_DSCR_CMD0_SDMS_RX1,
  497. .flags = IORESOURCE_DMA,
  498. },
  499. };
  500. static struct platform_device db1300_sd1_dev = {
  501. .dev = {
  502. .platform_data = &db1300_sd1_platdata,
  503. },
  504. .name = "au1xxx-mmc",
  505. .id = 1,
  506. .resource = au1300_sd1_res,
  507. .num_resources = ARRAY_SIZE(au1300_sd1_res),
  508. };
  509. /**********************************************************************/
  510. static int db1300_movinand_inserted(void *mmc_host)
  511. {
  512. return 0; /* disable for now, it doesn't work yet */
  513. }
  514. static int db1300_movinand_readonly(void *mmc_host)
  515. {
  516. return 0;
  517. }
  518. static void db1300_movinand_led_set(struct led_classdev *led,
  519. enum led_brightness brightness)
  520. {
  521. if (brightness != LED_OFF)
  522. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
  523. else
  524. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
  525. }
  526. static struct led_classdev db1300_movinand_led = {
  527. .brightness_set = db1300_movinand_led_set,
  528. };
  529. struct au1xmmc_platform_data db1300_sd0_platdata = {
  530. .card_inserted = db1300_movinand_inserted,
  531. .card_readonly = db1300_movinand_readonly,
  532. .led = &db1300_movinand_led,
  533. .mask_host_caps = MMC_CAP_NEEDS_POLL,
  534. };
  535. static struct resource au1300_sd0_res[] = {
  536. [0] = {
  537. .start = AU1100_SD0_PHYS_ADDR,
  538. .end = AU1100_SD0_PHYS_ADDR,
  539. .flags = IORESOURCE_MEM,
  540. },
  541. [1] = {
  542. .start = AU1300_SD0_INT,
  543. .end = AU1300_SD0_INT,
  544. .flags = IORESOURCE_IRQ,
  545. },
  546. [2] = {
  547. .start = AU1300_DSCR_CMD0_SDMS_TX0,
  548. .end = AU1300_DSCR_CMD0_SDMS_TX0,
  549. .flags = IORESOURCE_DMA,
  550. },
  551. [3] = {
  552. .start = AU1300_DSCR_CMD0_SDMS_RX0,
  553. .end = AU1300_DSCR_CMD0_SDMS_RX0,
  554. .flags = IORESOURCE_DMA,
  555. },
  556. };
  557. static struct platform_device db1300_sd0_dev = {
  558. .dev = {
  559. .platform_data = &db1300_sd0_platdata,
  560. },
  561. .name = "au1xxx-mmc",
  562. .id = 0,
  563. .resource = au1300_sd0_res,
  564. .num_resources = ARRAY_SIZE(au1300_sd0_res),
  565. };
  566. /**********************************************************************/
  567. static struct platform_device db1300_wm9715_dev = {
  568. .name = "wm9712-codec",
  569. .id = 1, /* ID of PSC for AC97 audio, see asoc glue! */
  570. };
  571. static struct platform_device db1300_ac97dma_dev = {
  572. .name = "au1xpsc-pcm",
  573. .id = 1, /* PSC ID */
  574. };
  575. static struct platform_device db1300_i2sdma_dev = {
  576. .name = "au1xpsc-pcm",
  577. .id = 2, /* PSC ID */
  578. };
  579. static struct platform_device db1300_sndac97_dev = {
  580. .name = "db1300-ac97",
  581. };
  582. static struct platform_device db1300_sndi2s_dev = {
  583. .name = "db1300-i2s",
  584. };
  585. /**********************************************************************/
  586. static int db1300fb_panel_index(void)
  587. {
  588. return 9; /* DB1300_800x480 */
  589. }
  590. static int db1300fb_panel_init(void)
  591. {
  592. /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  593. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD,
  594. BCSR_BOARD_LCDBL);
  595. return 0;
  596. }
  597. static int db1300fb_panel_shutdown(void)
  598. {
  599. /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  600. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL,
  601. BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD);
  602. return 0;
  603. }
  604. static struct au1200fb_platdata db1300fb_pd = {
  605. .panel_index = db1300fb_panel_index,
  606. .panel_init = db1300fb_panel_init,
  607. .panel_shutdown = db1300fb_panel_shutdown,
  608. };
  609. static struct resource au1300_lcd_res[] = {
  610. [0] = {
  611. .start = AU1200_LCD_PHYS_ADDR,
  612. .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
  613. .flags = IORESOURCE_MEM,
  614. },
  615. [1] = {
  616. .start = AU1300_LCD_INT,
  617. .end = AU1300_LCD_INT,
  618. .flags = IORESOURCE_IRQ,
  619. }
  620. };
  621. static u64 au1300_lcd_dmamask = DMA_BIT_MASK(32);
  622. static struct platform_device db1300_lcd_dev = {
  623. .name = "au1200-lcd",
  624. .id = 0,
  625. .dev = {
  626. .dma_mask = &au1300_lcd_dmamask,
  627. .coherent_dma_mask = DMA_BIT_MASK(32),
  628. .platform_data = &db1300fb_pd,
  629. },
  630. .num_resources = ARRAY_SIZE(au1300_lcd_res),
  631. .resource = au1300_lcd_res,
  632. };
  633. /**********************************************************************/
  634. static void db1300_wm97xx_irqen(struct wm97xx *wm, int enable)
  635. {
  636. if (enable)
  637. enable_irq(DB1300_AC97_PEN_INT);
  638. else
  639. disable_irq_nosync(DB1300_AC97_PEN_INT);
  640. }
  641. static struct wm97xx_mach_ops db1300_wm97xx_ops = {
  642. .irq_enable = db1300_wm97xx_irqen,
  643. .irq_gpio = WM97XX_GPIO_3,
  644. };
  645. static int db1300_wm97xx_probe(struct platform_device *pdev)
  646. {
  647. struct wm97xx *wm = platform_get_drvdata(pdev);
  648. /* external pendown indicator */
  649. wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN,
  650. WM97XX_GPIO_POL_LOW, WM97XX_GPIO_STICKY,
  651. WM97XX_GPIO_WAKE);
  652. /* internal "virtual" pendown gpio */
  653. wm97xx_config_gpio(wm, WM97XX_GPIO_3, WM97XX_GPIO_OUT,
  654. WM97XX_GPIO_POL_LOW, WM97XX_GPIO_NOTSTICKY,
  655. WM97XX_GPIO_NOWAKE);
  656. wm->pen_irq = DB1300_AC97_PEN_INT;
  657. return wm97xx_register_mach_ops(wm, &db1300_wm97xx_ops);
  658. }
  659. static struct platform_driver db1300_wm97xx_driver = {
  660. .driver.name = "wm97xx-touch",
  661. .driver.owner = THIS_MODULE,
  662. .probe = db1300_wm97xx_probe,
  663. };
  664. /**********************************************************************/
  665. static struct platform_device *db1300_dev[] __initdata = {
  666. &db1300_eth_dev,
  667. &db1300_i2c_dev,
  668. &db1300_5waysw_dev,
  669. &db1300_nand_dev,
  670. &db1300_ide_dev,
  671. &db1300_sd0_dev,
  672. &db1300_sd1_dev,
  673. &db1300_lcd_dev,
  674. &db1300_ac97_dev,
  675. &db1300_i2s_dev,
  676. &db1300_wm9715_dev,
  677. &db1300_ac97dma_dev,
  678. &db1300_i2sdma_dev,
  679. &db1300_sndac97_dev,
  680. &db1300_sndi2s_dev,
  681. };
  682. int __init db1300_dev_setup(void)
  683. {
  684. int swapped, cpldirq;
  685. struct clk *c;
  686. /* setup CPLD IRQ muxer */
  687. cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1);
  688. irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH);
  689. bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq);
  690. /* insert/eject IRQs: one always triggers so don't enable them
  691. * when doing request_irq() on them. DB1200 has this bug too.
  692. */
  693. irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN);
  694. irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN);
  695. irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN);
  696. irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN);
  697. /*
  698. * setup board
  699. */
  700. prom_get_ethernet_addr(&db1300_eth_config.mac[0]);
  701. i2c_register_board_info(0, db1300_i2c_devs,
  702. ARRAY_SIZE(db1300_i2c_devs));
  703. if (platform_driver_register(&db1300_wm97xx_driver))
  704. pr_warn("DB1300: failed to init touch pen irq support!\n");
  705. /* Audio PSC clock is supplied by codecs (PSC1, 2) */
  706. __raw_writel(PSC_SEL_CLK_SERCLK,
  707. (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
  708. wmb();
  709. __raw_writel(PSC_SEL_CLK_SERCLK,
  710. (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
  711. wmb();
  712. /* I2C driver wants 50MHz, get as close as possible */
  713. c = clk_get(NULL, "psc3_intclk");
  714. if (!IS_ERR(c)) {
  715. clk_set_rate(c, 50000000);
  716. clk_prepare_enable(c);
  717. clk_put(c);
  718. }
  719. __raw_writel(PSC_SEL_CLK_INTCLK,
  720. (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
  721. wmb();
  722. /* enable power to USB ports */
  723. bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR);
  724. /* although it is socket #0, it uses the CPLD bits which previous boards
  725. * have used for socket #1.
  726. */
  727. db1x_register_pcmcia_socket(
  728. AU1000_PCMCIA_ATTR_PHYS_ADDR,
  729. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1,
  730. AU1000_PCMCIA_MEM_PHYS_ADDR,
  731. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x00400000 - 1,
  732. AU1000_PCMCIA_IO_PHYS_ADDR,
  733. AU1000_PCMCIA_IO_PHYS_ADDR + 0x00010000 - 1,
  734. DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1);
  735. swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
  736. db1x_register_norflash(64 << 20, 2, swapped);
  737. return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
  738. }
  739. int __init db1300_board_setup(void)
  740. {
  741. unsigned short whoami;
  742. bcsr_init(DB1300_BCSR_PHYS_ADDR,
  743. DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS);
  744. whoami = bcsr_read(BCSR_WHOAMI);
  745. if (BCSR_WHOAMI_BOARD(whoami) != BCSR_WHOAMI_DB1300)
  746. return -ENODEV;
  747. db1300_gpio_config();
  748. printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t"
  749. "BoardID %d CPLD Rev %d DaughtercardID %d\n",
  750. BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami),
  751. BCSR_WHOAMI_DCID(whoami));
  752. /* enable UARTs, YAMON only enables #2 */
  753. alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
  754. alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
  755. alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);
  756. return 0;
  757. }