omap2430.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2005-2007 by Texas Instruments
  4. * Some code has been taken from tusb6010.c
  5. * Copyrights for that are attributable to:
  6. * Copyright (C) 2006 Nokia Corporation
  7. * Tony Lindgren <tony@atomide.com>
  8. *
  9. * This file is part of the Inventra Controller Driver for Linux.
  10. */
  11. #ifndef __UBOOT__
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/init.h>
  16. #include <linux/list.h>
  17. #include <linux/io.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/pm_runtime.h>
  21. #include <linux/err.h>
  22. #include <linux/usb/musb-omap.h>
  23. #else
  24. #include <common.h>
  25. #include <asm/omap_common.h>
  26. #include <asm/omap_musb.h>
  27. #include <twl4030.h>
  28. #include <twl6030.h>
  29. #include "linux-compat.h"
  30. #endif
  31. #include "musb_core.h"
  32. #include "omap2430.h"
  33. #ifndef __UBOOT__
  34. struct omap2430_glue {
  35. struct device *dev;
  36. struct platform_device *musb;
  37. enum omap_musb_vbus_id_status status;
  38. struct work_struct omap_musb_mailbox_work;
  39. };
  40. #define glue_to_musb(g) platform_get_drvdata(g->musb)
  41. struct omap2430_glue *_glue;
  42. static struct timer_list musb_idle_timer;
  43. static void musb_do_idle(unsigned long _musb)
  44. {
  45. struct musb *musb = (void *)_musb;
  46. unsigned long flags;
  47. u8 power;
  48. u8 devctl;
  49. spin_lock_irqsave(&musb->lock, flags);
  50. switch (musb->xceiv->state) {
  51. case OTG_STATE_A_WAIT_BCON:
  52. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  53. if (devctl & MUSB_DEVCTL_BDEVICE) {
  54. musb->xceiv->state = OTG_STATE_B_IDLE;
  55. MUSB_DEV_MODE(musb);
  56. } else {
  57. musb->xceiv->state = OTG_STATE_A_IDLE;
  58. MUSB_HST_MODE(musb);
  59. }
  60. break;
  61. case OTG_STATE_A_SUSPEND:
  62. /* finish RESUME signaling? */
  63. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  64. power = musb_readb(musb->mregs, MUSB_POWER);
  65. power &= ~MUSB_POWER_RESUME;
  66. dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
  67. musb_writeb(musb->mregs, MUSB_POWER, power);
  68. musb->is_active = 1;
  69. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  70. | MUSB_PORT_STAT_RESUME);
  71. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  72. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  73. /* NOTE: it might really be A_WAIT_BCON ... */
  74. musb->xceiv->state = OTG_STATE_A_HOST;
  75. }
  76. break;
  77. case OTG_STATE_A_HOST:
  78. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  79. if (devctl & MUSB_DEVCTL_BDEVICE)
  80. musb->xceiv->state = OTG_STATE_B_IDLE;
  81. else
  82. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  83. default:
  84. break;
  85. }
  86. spin_unlock_irqrestore(&musb->lock, flags);
  87. }
  88. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  89. {
  90. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  91. static unsigned long last_timer;
  92. if (timeout == 0)
  93. timeout = default_timeout;
  94. /* Never idle if active, or when VBUS timeout is not set as host */
  95. if (musb->is_active || ((musb->a_wait_bcon == 0)
  96. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  97. dev_dbg(musb->controller, "%s active, deleting timer\n",
  98. otg_state_string(musb->xceiv->state));
  99. del_timer(&musb_idle_timer);
  100. last_timer = jiffies;
  101. return;
  102. }
  103. if (time_after(last_timer, timeout)) {
  104. if (!timer_pending(&musb_idle_timer))
  105. last_timer = timeout;
  106. else {
  107. dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
  108. return;
  109. }
  110. }
  111. last_timer = timeout;
  112. dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
  113. otg_state_string(musb->xceiv->state),
  114. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  115. mod_timer(&musb_idle_timer, timeout);
  116. }
  117. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  118. {
  119. struct usb_otg *otg = musb->xceiv->otg;
  120. u8 devctl;
  121. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  122. int ret = 1;
  123. /* HDRC controls CPEN, but beware current surges during device
  124. * connect. They can trigger transient overcurrent conditions
  125. * that must be ignored.
  126. */
  127. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  128. if (is_on) {
  129. if (musb->xceiv->state == OTG_STATE_A_IDLE) {
  130. /* start the session */
  131. devctl |= MUSB_DEVCTL_SESSION;
  132. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  133. /*
  134. * Wait for the musb to set as A device to enable the
  135. * VBUS
  136. */
  137. while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
  138. cpu_relax();
  139. if (time_after(jiffies, timeout)) {
  140. dev_err(musb->controller,
  141. "configured as A device timeout");
  142. ret = -EINVAL;
  143. break;
  144. }
  145. }
  146. if (ret && otg->set_vbus)
  147. otg_set_vbus(otg, 1);
  148. } else {
  149. musb->is_active = 1;
  150. otg->default_a = 1;
  151. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  152. devctl |= MUSB_DEVCTL_SESSION;
  153. MUSB_HST_MODE(musb);
  154. }
  155. } else {
  156. musb->is_active = 0;
  157. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  158. * jumping right to B_IDLE...
  159. */
  160. otg->default_a = 0;
  161. musb->xceiv->state = OTG_STATE_B_IDLE;
  162. devctl &= ~MUSB_DEVCTL_SESSION;
  163. MUSB_DEV_MODE(musb);
  164. }
  165. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  166. dev_dbg(musb->controller, "VBUS %s, devctl %02x "
  167. /* otg %3x conf %08x prcm %08x */ "\n",
  168. otg_state_string(musb->xceiv->state),
  169. musb_readb(musb->mregs, MUSB_DEVCTL));
  170. }
  171. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  172. {
  173. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  174. devctl |= MUSB_DEVCTL_SESSION;
  175. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  176. return 0;
  177. }
  178. #endif
  179. static inline void omap2430_low_level_exit(struct musb *musb)
  180. {
  181. u32 l;
  182. /* in any role */
  183. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  184. l |= ENABLEFORCE; /* enable MSTANDBY */
  185. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  186. }
  187. static inline void omap2430_low_level_init(struct musb *musb)
  188. {
  189. u32 l;
  190. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  191. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  192. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  193. }
  194. #ifndef __UBOOT__
  195. void omap_musb_mailbox(enum omap_musb_vbus_id_status status)
  196. {
  197. struct omap2430_glue *glue = _glue;
  198. struct musb *musb = glue_to_musb(glue);
  199. glue->status = status;
  200. if (!musb) {
  201. dev_err(glue->dev, "musb core is not yet ready\n");
  202. return;
  203. }
  204. schedule_work(&glue->omap_musb_mailbox_work);
  205. }
  206. EXPORT_SYMBOL_GPL(omap_musb_mailbox);
  207. static void omap_musb_set_mailbox(struct omap2430_glue *glue)
  208. {
  209. struct musb *musb = glue_to_musb(glue);
  210. struct device *dev = musb->controller;
  211. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  212. struct omap_musb_board_data *data = pdata->board_data;
  213. struct usb_otg *otg = musb->xceiv->otg;
  214. switch (glue->status) {
  215. case OMAP_MUSB_ID_GROUND:
  216. dev_dbg(dev, "ID GND\n");
  217. otg->default_a = true;
  218. musb->xceiv->state = OTG_STATE_A_IDLE;
  219. musb->xceiv->last_event = USB_EVENT_ID;
  220. if (!is_otg_enabled(musb) || musb->gadget_driver) {
  221. pm_runtime_get_sync(dev);
  222. usb_phy_init(musb->xceiv);
  223. omap2430_musb_set_vbus(musb, 1);
  224. }
  225. break;
  226. case OMAP_MUSB_VBUS_VALID:
  227. dev_dbg(dev, "VBUS Connect\n");
  228. otg->default_a = false;
  229. musb->xceiv->state = OTG_STATE_B_IDLE;
  230. musb->xceiv->last_event = USB_EVENT_VBUS;
  231. if (musb->gadget_driver)
  232. pm_runtime_get_sync(dev);
  233. usb_phy_init(musb->xceiv);
  234. break;
  235. case OMAP_MUSB_ID_FLOAT:
  236. case OMAP_MUSB_VBUS_OFF:
  237. dev_dbg(dev, "VBUS Disconnect\n");
  238. musb->xceiv->last_event = USB_EVENT_NONE;
  239. if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
  240. if (musb->gadget_driver) {
  241. pm_runtime_mark_last_busy(dev);
  242. pm_runtime_put_autosuspend(dev);
  243. }
  244. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  245. if (musb->xceiv->otg->set_vbus)
  246. otg_set_vbus(musb->xceiv->otg, 0);
  247. }
  248. usb_phy_shutdown(musb->xceiv);
  249. break;
  250. default:
  251. dev_dbg(dev, "ID float\n");
  252. }
  253. }
  254. static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
  255. {
  256. struct omap2430_glue *glue = container_of(mailbox_work,
  257. struct omap2430_glue, omap_musb_mailbox_work);
  258. omap_musb_set_mailbox(glue);
  259. }
  260. #endif
  261. static int omap2430_musb_init(struct musb *musb)
  262. {
  263. u32 l;
  264. int status = 0;
  265. unsigned long int start;
  266. #ifndef __UBOOT__
  267. struct device *dev = musb->controller;
  268. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  269. struct musb_hdrc_platform_data *plat = dev->platform_data;
  270. struct omap_musb_board_data *data = plat->board_data;
  271. #else
  272. struct omap_musb_board_data *data =
  273. (struct omap_musb_board_data *)musb->controller;
  274. #endif
  275. /* Reset the controller */
  276. musb_writel(musb->mregs, OTG_SYSCONFIG, SOFTRST);
  277. start = get_timer(0);
  278. while (1) {
  279. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  280. if ((l & SOFTRST) == 0)
  281. break;
  282. if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
  283. dev_err(musb->controller, "MUSB reset is taking too long\n");
  284. return -ENODEV;
  285. }
  286. }
  287. #ifndef __UBOOT__
  288. /* We require some kind of external transceiver, hooked
  289. * up through ULPI. TWL4030-family PMICs include one,
  290. * which needs a driver, drivers aren't always needed.
  291. */
  292. musb->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
  293. if (IS_ERR_OR_NULL(musb->xceiv)) {
  294. pr_err("HS USB OTG: no transceiver configured\n");
  295. return -ENODEV;
  296. }
  297. status = pm_runtime_get_sync(dev);
  298. if (status < 0) {
  299. dev_err(dev, "pm_runtime_get_sync FAILED %d\n", status);
  300. goto err1;
  301. }
  302. #endif
  303. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  304. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  305. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  306. l &= ~ULPI_12PIN; /* Disable ULPI */
  307. l |= UTMI_8BIT; /* Enable UTMI */
  308. } else {
  309. l |= ULPI_12PIN;
  310. }
  311. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  312. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  313. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  314. musb_readl(musb->mregs, OTG_REVISION),
  315. musb_readl(musb->mregs, OTG_SYSCONFIG),
  316. musb_readl(musb->mregs, OTG_SYSSTATUS),
  317. musb_readl(musb->mregs, OTG_INTERFSEL),
  318. musb_readl(musb->mregs, OTG_SIMENABLE));
  319. #ifndef __UBOOT__
  320. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  321. if (glue->status != OMAP_MUSB_UNKNOWN)
  322. omap_musb_set_mailbox(glue);
  323. pm_runtime_put_noidle(musb->controller);
  324. #endif
  325. return 0;
  326. err1:
  327. return status;
  328. }
  329. #ifndef __UBOOT__
  330. static void omap2430_musb_enable(struct musb *musb)
  331. #else
  332. static int omap2430_musb_enable(struct musb *musb)
  333. #endif
  334. {
  335. #ifndef __UBOOT__
  336. u8 devctl;
  337. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  338. struct device *dev = musb->controller;
  339. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  340. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  341. struct omap_musb_board_data *data = pdata->board_data;
  342. switch (glue->status) {
  343. case OMAP_MUSB_ID_GROUND:
  344. usb_phy_init(musb->xceiv);
  345. if (data->interface_type != MUSB_INTERFACE_UTMI)
  346. break;
  347. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  348. /* start the session */
  349. devctl |= MUSB_DEVCTL_SESSION;
  350. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  351. while (musb_readb(musb->mregs, MUSB_DEVCTL) &
  352. MUSB_DEVCTL_BDEVICE) {
  353. cpu_relax();
  354. if (time_after(jiffies, timeout)) {
  355. dev_err(dev, "configured as A device timeout");
  356. break;
  357. }
  358. }
  359. break;
  360. case OMAP_MUSB_VBUS_VALID:
  361. usb_phy_init(musb->xceiv);
  362. break;
  363. default:
  364. break;
  365. }
  366. #else
  367. #ifdef CONFIG_TWL4030_USB
  368. if (twl4030_usb_ulpi_init()) {
  369. serial_printf("ERROR: %s Could not initialize PHY\n",
  370. __PRETTY_FUNCTION__);
  371. }
  372. #endif
  373. #ifdef CONFIG_TWL6030_POWER
  374. twl6030_usb_device_settings();
  375. #endif
  376. #ifdef CONFIG_OMAP44XX
  377. u32 *usbotghs_control = (u32 *)((*ctrl)->control_usbotghs_ctrl);
  378. *usbotghs_control = USBOTGHS_CONTROL_AVALID |
  379. USBOTGHS_CONTROL_VBUSVALID | USBOTGHS_CONTROL_IDDIG;
  380. #endif
  381. return 0;
  382. #endif
  383. }
  384. static void omap2430_musb_disable(struct musb *musb)
  385. {
  386. #ifndef __UBOOT__
  387. struct device *dev = musb->controller;
  388. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  389. if (glue->status != OMAP_MUSB_UNKNOWN)
  390. usb_phy_shutdown(musb->xceiv);
  391. #endif
  392. }
  393. static int omap2430_musb_exit(struct musb *musb)
  394. {
  395. del_timer_sync(&musb_idle_timer);
  396. omap2430_low_level_exit(musb);
  397. return 0;
  398. }
  399. #ifndef __UBOOT__
  400. static const struct musb_platform_ops omap2430_ops = {
  401. #else
  402. const struct musb_platform_ops omap2430_ops = {
  403. #endif
  404. .init = omap2430_musb_init,
  405. .exit = omap2430_musb_exit,
  406. #ifndef __UBOOT__
  407. .set_mode = omap2430_musb_set_mode,
  408. .try_idle = omap2430_musb_try_idle,
  409. .set_vbus = omap2430_musb_set_vbus,
  410. #endif
  411. .enable = omap2430_musb_enable,
  412. .disable = omap2430_musb_disable,
  413. };
  414. #ifndef __UBOOT__
  415. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  416. static int __devinit omap2430_probe(struct platform_device *pdev)
  417. {
  418. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  419. struct platform_device *musb;
  420. struct omap2430_glue *glue;
  421. int ret = -ENOMEM;
  422. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  423. if (!glue) {
  424. dev_err(&pdev->dev, "failed to allocate glue context\n");
  425. goto err0;
  426. }
  427. musb = platform_device_alloc("musb-hdrc", -1);
  428. if (!musb) {
  429. dev_err(&pdev->dev, "failed to allocate musb device\n");
  430. goto err0;
  431. }
  432. musb->dev.parent = &pdev->dev;
  433. musb->dev.dma_mask = &omap2430_dmamask;
  434. musb->dev.coherent_dma_mask = omap2430_dmamask;
  435. glue->dev = &pdev->dev;
  436. glue->musb = musb;
  437. glue->status = OMAP_MUSB_UNKNOWN;
  438. pdata->platform_ops = &omap2430_ops;
  439. platform_set_drvdata(pdev, glue);
  440. /*
  441. * REVISIT if we ever have two instances of the wrapper, we will be
  442. * in big trouble
  443. */
  444. _glue = glue;
  445. INIT_WORK(&glue->omap_musb_mailbox_work, omap_musb_mailbox_work);
  446. ret = platform_device_add_resources(musb, pdev->resource,
  447. pdev->num_resources);
  448. if (ret) {
  449. dev_err(&pdev->dev, "failed to add resources\n");
  450. goto err1;
  451. }
  452. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  453. if (ret) {
  454. dev_err(&pdev->dev, "failed to add platform_data\n");
  455. goto err1;
  456. }
  457. pm_runtime_enable(&pdev->dev);
  458. ret = platform_device_add(musb);
  459. if (ret) {
  460. dev_err(&pdev->dev, "failed to register musb device\n");
  461. goto err1;
  462. }
  463. return 0;
  464. err1:
  465. platform_device_put(musb);
  466. err0:
  467. return ret;
  468. }
  469. static int __devexit omap2430_remove(struct platform_device *pdev)
  470. {
  471. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  472. cancel_work_sync(&glue->omap_musb_mailbox_work);
  473. platform_device_del(glue->musb);
  474. platform_device_put(glue->musb);
  475. return 0;
  476. }
  477. #ifdef CONFIG_PM
  478. static int omap2430_runtime_suspend(struct device *dev)
  479. {
  480. struct omap2430_glue *glue = dev_get_drvdata(dev);
  481. struct musb *musb = glue_to_musb(glue);
  482. if (musb) {
  483. musb->context.otg_interfsel = musb_readl(musb->mregs,
  484. OTG_INTERFSEL);
  485. omap2430_low_level_exit(musb);
  486. usb_phy_set_suspend(musb->xceiv, 1);
  487. }
  488. return 0;
  489. }
  490. static int omap2430_runtime_resume(struct device *dev)
  491. {
  492. struct omap2430_glue *glue = dev_get_drvdata(dev);
  493. struct musb *musb = glue_to_musb(glue);
  494. if (musb) {
  495. omap2430_low_level_init(musb);
  496. musb_writel(musb->mregs, OTG_INTERFSEL,
  497. musb->context.otg_interfsel);
  498. usb_phy_set_suspend(musb->xceiv, 0);
  499. }
  500. return 0;
  501. }
  502. static struct dev_pm_ops omap2430_pm_ops = {
  503. .runtime_suspend = omap2430_runtime_suspend,
  504. .runtime_resume = omap2430_runtime_resume,
  505. };
  506. #define DEV_PM_OPS (&omap2430_pm_ops)
  507. #else
  508. #define DEV_PM_OPS NULL
  509. #endif
  510. static struct platform_driver omap2430_driver = {
  511. .probe = omap2430_probe,
  512. .remove = __devexit_p(omap2430_remove),
  513. .driver = {
  514. .name = "musb-omap2430",
  515. .pm = DEV_PM_OPS,
  516. },
  517. };
  518. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  519. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  520. MODULE_LICENSE("GPL v2");
  521. static int __init omap2430_init(void)
  522. {
  523. return platform_driver_register(&omap2430_driver);
  524. }
  525. subsys_initcall(omap2430_init);
  526. static void __exit omap2430_exit(void)
  527. {
  528. platform_driver_unregister(&omap2430_driver);
  529. }
  530. module_exit(omap2430_exit);
  531. #endif