of-fpga-region.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * FPGA Region - Device Tree support for FPGA programming under Linux
  4. *
  5. * Copyright (C) 2013-2016 Altera Corporation
  6. * Copyright (C) 2017 Intel Corporation
  7. */
  8. #include <linux/fpga/fpga-bridge.h>
  9. #include <linux/fpga/fpga-mgr.h>
  10. #include <linux/fpga/fpga-region.h>
  11. #include <linux/idr.h>
  12. #include <linux/kernel.h>
  13. #include <linux/list.h>
  14. #include <linux/module.h>
  15. #include <linux/of_platform.h>
  16. #include <linux/slab.h>
  17. #include <linux/spinlock.h>
  18. static const struct of_device_id fpga_region_of_match[] = {
  19. { .compatible = "fpga-region", },
  20. {},
  21. };
  22. MODULE_DEVICE_TABLE(of, fpga_region_of_match);
  23. static int fpga_region_of_node_match(struct device *dev, const void *data)
  24. {
  25. return dev->of_node == data;
  26. }
  27. /**
  28. * of_fpga_region_find - find FPGA region
  29. * @np: device node of FPGA Region
  30. *
  31. * Caller will need to put_device(&region->dev) when done.
  32. *
  33. * Returns FPGA Region struct or NULL
  34. */
  35. static struct fpga_region *of_fpga_region_find(struct device_node *np)
  36. {
  37. return fpga_region_class_find(NULL, np, fpga_region_of_node_match);
  38. }
  39. /**
  40. * of_fpga_region_get_mgr - get reference for FPGA manager
  41. * @np: device node of FPGA region
  42. *
  43. * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
  44. *
  45. * Caller should call fpga_mgr_put() when done with manager.
  46. *
  47. * Return: fpga manager struct or IS_ERR() condition containing error code.
  48. */
  49. static struct fpga_manager *of_fpga_region_get_mgr(struct device_node *np)
  50. {
  51. struct device_node *mgr_node;
  52. struct fpga_manager *mgr;
  53. of_node_get(np);
  54. while (np) {
  55. if (of_device_is_compatible(np, "fpga-region")) {
  56. mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
  57. if (mgr_node) {
  58. mgr = of_fpga_mgr_get(mgr_node);
  59. of_node_put(mgr_node);
  60. of_node_put(np);
  61. return mgr;
  62. }
  63. }
  64. np = of_get_next_parent(np);
  65. }
  66. of_node_put(np);
  67. return ERR_PTR(-EINVAL);
  68. }
  69. /**
  70. * of_fpga_region_get_bridges - create a list of bridges
  71. * @region: FPGA region
  72. *
  73. * Create a list of bridges including the parent bridge and the bridges
  74. * specified by "fpga-bridges" property. Note that the
  75. * fpga_bridges_enable/disable/put functions are all fine with an empty list
  76. * if that happens.
  77. *
  78. * Caller should call fpga_bridges_put(&region->bridge_list) when
  79. * done with the bridges.
  80. *
  81. * Return 0 for success (even if there are no bridges specified)
  82. * or -EBUSY if any of the bridges are in use.
  83. */
  84. static int of_fpga_region_get_bridges(struct fpga_region *region)
  85. {
  86. struct device *dev = &region->dev;
  87. struct device_node *region_np = dev->of_node;
  88. struct fpga_image_info *info = region->info;
  89. struct device_node *br, *np, *parent_br = NULL;
  90. int i, ret;
  91. /* If parent is a bridge, add to list */
  92. ret = of_fpga_bridge_get_to_list(region_np->parent, info,
  93. &region->bridge_list);
  94. /* -EBUSY means parent is a bridge that is under use. Give up. */
  95. if (ret == -EBUSY)
  96. return ret;
  97. /* Zero return code means parent was a bridge and was added to list. */
  98. if (!ret)
  99. parent_br = region_np->parent;
  100. /* If overlay has a list of bridges, use it. */
  101. br = of_parse_phandle(info->overlay, "fpga-bridges", 0);
  102. if (br) {
  103. of_node_put(br);
  104. np = info->overlay;
  105. } else {
  106. np = region_np;
  107. }
  108. for (i = 0; ; i++) {
  109. br = of_parse_phandle(np, "fpga-bridges", i);
  110. if (!br)
  111. break;
  112. /* If parent bridge is in list, skip it. */
  113. if (br == parent_br) {
  114. of_node_put(br);
  115. continue;
  116. }
  117. /* If node is a bridge, get it and add to list */
  118. ret = of_fpga_bridge_get_to_list(br, info,
  119. &region->bridge_list);
  120. of_node_put(br);
  121. /* If any of the bridges are in use, give up */
  122. if (ret == -EBUSY) {
  123. fpga_bridges_put(&region->bridge_list);
  124. return -EBUSY;
  125. }
  126. }
  127. return 0;
  128. }
  129. /**
  130. * child_regions_with_firmware
  131. * @overlay: device node of the overlay
  132. *
  133. * If the overlay adds child FPGA regions, they are not allowed to have
  134. * firmware-name property.
  135. *
  136. * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
  137. */
  138. static int child_regions_with_firmware(struct device_node *overlay)
  139. {
  140. struct device_node *child_region;
  141. const char *child_firmware_name;
  142. int ret = 0;
  143. of_node_get(overlay);
  144. child_region = of_find_matching_node(overlay, fpga_region_of_match);
  145. while (child_region) {
  146. if (!of_property_read_string(child_region, "firmware-name",
  147. &child_firmware_name)) {
  148. ret = -EINVAL;
  149. break;
  150. }
  151. child_region = of_find_matching_node(child_region,
  152. fpga_region_of_match);
  153. }
  154. of_node_put(child_region);
  155. if (ret)
  156. pr_err("firmware-name not allowed in child FPGA region: %pOF",
  157. child_region);
  158. return ret;
  159. }
  160. /**
  161. * of_fpga_region_parse_ov - parse and check overlay applied to region
  162. *
  163. * @region: FPGA region
  164. * @overlay: overlay applied to the FPGA region
  165. *
  166. * Given an overlay applied to a FPGA region, parse the FPGA image specific
  167. * info in the overlay and do some checking.
  168. *
  169. * Returns:
  170. * NULL if overlay doesn't direct us to program the FPGA.
  171. * fpga_image_info struct if there is an image to program.
  172. * error code for invalid overlay.
  173. */
  174. static struct fpga_image_info *of_fpga_region_parse_ov(
  175. struct fpga_region *region,
  176. struct device_node *overlay)
  177. {
  178. struct device *dev = &region->dev;
  179. struct fpga_image_info *info;
  180. const char *firmware_name;
  181. int ret;
  182. if (region->info) {
  183. dev_err(dev, "Region already has overlay applied.\n");
  184. return ERR_PTR(-EINVAL);
  185. }
  186. /*
  187. * Reject overlay if child FPGA Regions added in the overlay have
  188. * firmware-name property (would mean that an FPGA region that has
  189. * not been added to the live tree yet is doing FPGA programming).
  190. */
  191. ret = child_regions_with_firmware(overlay);
  192. if (ret)
  193. return ERR_PTR(ret);
  194. info = fpga_image_info_alloc(dev);
  195. if (!info)
  196. return ERR_PTR(-ENOMEM);
  197. info->overlay = overlay;
  198. /* Read FPGA region properties from the overlay */
  199. if (of_property_read_bool(overlay, "partial-fpga-config"))
  200. info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
  201. if (of_property_read_bool(overlay, "external-fpga-config"))
  202. info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
  203. if (of_property_read_bool(overlay, "encrypted-fpga-config"))
  204. info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
  205. if (!of_property_read_string(overlay, "firmware-name",
  206. &firmware_name)) {
  207. info->firmware_name = devm_kstrdup(dev, firmware_name,
  208. GFP_KERNEL);
  209. if (!info->firmware_name)
  210. return ERR_PTR(-ENOMEM);
  211. }
  212. of_property_read_u32(overlay, "region-unfreeze-timeout-us",
  213. &info->enable_timeout_us);
  214. of_property_read_u32(overlay, "region-freeze-timeout-us",
  215. &info->disable_timeout_us);
  216. of_property_read_u32(overlay, "config-complete-timeout-us",
  217. &info->config_complete_timeout_us);
  218. /* If overlay is not programming the FPGA, don't need FPGA image info */
  219. if (!info->firmware_name) {
  220. ret = 0;
  221. goto ret_no_info;
  222. }
  223. /*
  224. * If overlay informs us FPGA was externally programmed, specifying
  225. * firmware here would be ambiguous.
  226. */
  227. if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
  228. dev_err(dev, "error: specified firmware and external-fpga-config");
  229. ret = -EINVAL;
  230. goto ret_no_info;
  231. }
  232. return info;
  233. ret_no_info:
  234. fpga_image_info_free(info);
  235. return ERR_PTR(ret);
  236. }
  237. /**
  238. * of_fpga_region_notify_pre_apply - pre-apply overlay notification
  239. *
  240. * @region: FPGA region that the overlay was applied to
  241. * @nd: overlay notification data
  242. *
  243. * Called when an overlay targeted to a FPGA Region is about to be applied.
  244. * Parses the overlay for properties that influence how the FPGA will be
  245. * programmed and does some checking. If the checks pass, programs the FPGA.
  246. * If the checks fail, overlay is rejected and does not get added to the
  247. * live tree.
  248. *
  249. * Returns 0 for success or negative error code for failure.
  250. */
  251. static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
  252. struct of_overlay_notify_data *nd)
  253. {
  254. struct device *dev = &region->dev;
  255. struct fpga_image_info *info;
  256. int ret;
  257. info = of_fpga_region_parse_ov(region, nd->overlay);
  258. if (IS_ERR(info))
  259. return PTR_ERR(info);
  260. /* If overlay doesn't program the FPGA, accept it anyway. */
  261. if (!info)
  262. return 0;
  263. if (region->info) {
  264. dev_err(dev, "Region already has overlay applied.\n");
  265. return -EINVAL;
  266. }
  267. region->info = info;
  268. ret = fpga_region_program_fpga(region);
  269. if (ret) {
  270. /* error; reject overlay */
  271. fpga_image_info_free(info);
  272. region->info = NULL;
  273. }
  274. return ret;
  275. }
  276. /**
  277. * of_fpga_region_notify_post_remove - post-remove overlay notification
  278. *
  279. * @region: FPGA region that was targeted by the overlay that was removed
  280. * @nd: overlay notification data
  281. *
  282. * Called after an overlay has been removed if the overlay's target was a
  283. * FPGA region.
  284. */
  285. static void of_fpga_region_notify_post_remove(struct fpga_region *region,
  286. struct of_overlay_notify_data *nd)
  287. {
  288. fpga_bridges_disable(&region->bridge_list);
  289. fpga_bridges_put(&region->bridge_list);
  290. fpga_image_info_free(region->info);
  291. region->info = NULL;
  292. }
  293. /**
  294. * of_fpga_region_notify - reconfig notifier for dynamic DT changes
  295. * @nb: notifier block
  296. * @action: notifier action
  297. * @arg: reconfig data
  298. *
  299. * This notifier handles programming a FPGA when a "firmware-name" property is
  300. * added to a fpga-region.
  301. *
  302. * Returns NOTIFY_OK or error if FPGA programming fails.
  303. */
  304. static int of_fpga_region_notify(struct notifier_block *nb,
  305. unsigned long action, void *arg)
  306. {
  307. struct of_overlay_notify_data *nd = arg;
  308. struct fpga_region *region;
  309. int ret;
  310. switch (action) {
  311. case OF_OVERLAY_PRE_APPLY:
  312. pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
  313. break;
  314. case OF_OVERLAY_POST_APPLY:
  315. pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
  316. return NOTIFY_OK; /* not for us */
  317. case OF_OVERLAY_PRE_REMOVE:
  318. pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
  319. return NOTIFY_OK; /* not for us */
  320. case OF_OVERLAY_POST_REMOVE:
  321. pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
  322. break;
  323. default: /* should not happen */
  324. return NOTIFY_OK;
  325. }
  326. region = of_fpga_region_find(nd->target);
  327. if (!region)
  328. return NOTIFY_OK;
  329. ret = 0;
  330. switch (action) {
  331. case OF_OVERLAY_PRE_APPLY:
  332. ret = of_fpga_region_notify_pre_apply(region, nd);
  333. break;
  334. case OF_OVERLAY_POST_REMOVE:
  335. of_fpga_region_notify_post_remove(region, nd);
  336. break;
  337. }
  338. put_device(&region->dev);
  339. if (ret)
  340. return notifier_from_errno(ret);
  341. return NOTIFY_OK;
  342. }
  343. static struct notifier_block fpga_region_of_nb = {
  344. .notifier_call = of_fpga_region_notify,
  345. };
  346. static int of_fpga_region_probe(struct platform_device *pdev)
  347. {
  348. struct device *dev = &pdev->dev;
  349. struct device_node *np = dev->of_node;
  350. struct fpga_region *region;
  351. struct fpga_manager *mgr;
  352. int ret;
  353. /* Find the FPGA mgr specified by region or parent region. */
  354. mgr = of_fpga_region_get_mgr(np);
  355. if (IS_ERR(mgr))
  356. return -EPROBE_DEFER;
  357. region = fpga_region_create(dev, mgr, of_fpga_region_get_bridges);
  358. if (!region) {
  359. ret = -ENOMEM;
  360. goto eprobe_mgr_put;
  361. }
  362. ret = fpga_region_register(region);
  363. if (ret)
  364. goto eprobe_free;
  365. of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
  366. dev_set_drvdata(dev, region);
  367. dev_info(dev, "FPGA Region probed\n");
  368. return 0;
  369. eprobe_free:
  370. fpga_region_free(region);
  371. eprobe_mgr_put:
  372. fpga_mgr_put(mgr);
  373. return ret;
  374. }
  375. static int of_fpga_region_remove(struct platform_device *pdev)
  376. {
  377. struct fpga_region *region = platform_get_drvdata(pdev);
  378. struct fpga_manager *mgr = region->mgr;
  379. fpga_region_unregister(region);
  380. fpga_mgr_put(mgr);
  381. return 0;
  382. }
  383. static struct platform_driver of_fpga_region_driver = {
  384. .probe = of_fpga_region_probe,
  385. .remove = of_fpga_region_remove,
  386. .driver = {
  387. .name = "of-fpga-region",
  388. .of_match_table = of_match_ptr(fpga_region_of_match),
  389. },
  390. };
  391. /**
  392. * fpga_region_init - init function for fpga_region class
  393. * Creates the fpga_region class and registers a reconfig notifier.
  394. */
  395. static int __init of_fpga_region_init(void)
  396. {
  397. int ret;
  398. ret = of_overlay_notifier_register(&fpga_region_of_nb);
  399. if (ret)
  400. return ret;
  401. ret = platform_driver_register(&of_fpga_region_driver);
  402. if (ret)
  403. goto err_plat;
  404. return 0;
  405. err_plat:
  406. of_overlay_notifier_unregister(&fpga_region_of_nb);
  407. return ret;
  408. }
  409. static void __exit of_fpga_region_exit(void)
  410. {
  411. platform_driver_unregister(&of_fpga_region_driver);
  412. of_overlay_notifier_unregister(&fpga_region_of_nb);
  413. }
  414. subsys_initcall(of_fpga_region_init);
  415. module_exit(of_fpga_region_exit);
  416. MODULE_DESCRIPTION("FPGA Region");
  417. MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
  418. MODULE_LICENSE("GPL v2");