Kconfig 5.9 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. menu "DesignWare PCI Core Support"
  3. depends on PCI
  4. config PCIE_DW
  5. bool
  6. config PCIE_DW_HOST
  7. bool
  8. depends on PCI_MSI_IRQ_DOMAIN
  9. select PCIE_DW
  10. config PCIE_DW_EP
  11. bool
  12. depends on PCI_ENDPOINT
  13. select PCIE_DW
  14. config PCI_DRA7XX
  15. bool
  16. config PCI_DRA7XX_HOST
  17. bool "TI DRA7xx PCIe controller Host Mode"
  18. depends on SOC_DRA7XX || COMPILE_TEST
  19. depends on PCI_MSI_IRQ_DOMAIN
  20. depends on OF && HAS_IOMEM && TI_PIPE3
  21. select PCIE_DW_HOST
  22. select PCI_DRA7XX
  23. default y
  24. help
  25. Enables support for the PCIe controller in the DRA7xx SoC to work in
  26. host mode. There are two instances of PCIe controller in DRA7xx.
  27. This controller can work either as EP or RC. In order to enable
  28. host-specific features PCI_DRA7XX_HOST must be selected and in order
  29. to enable device-specific features PCI_DRA7XX_EP must be selected.
  30. This uses the DesignWare core.
  31. config PCI_DRA7XX_EP
  32. bool "TI DRA7xx PCIe controller Endpoint Mode"
  33. depends on SOC_DRA7XX || COMPILE_TEST
  34. depends on PCI_ENDPOINT
  35. depends on OF && HAS_IOMEM && TI_PIPE3
  36. select PCIE_DW_EP
  37. select PCI_DRA7XX
  38. help
  39. Enables support for the PCIe controller in the DRA7xx SoC to work in
  40. endpoint mode. There are two instances of PCIe controller in DRA7xx.
  41. This controller can work either as EP or RC. In order to enable
  42. host-specific features PCI_DRA7XX_HOST must be selected and in order
  43. to enable device-specific features PCI_DRA7XX_EP must be selected.
  44. This uses the DesignWare core.
  45. config PCIE_DW_PLAT
  46. bool
  47. config PCIE_DW_PLAT_HOST
  48. bool "Platform bus based DesignWare PCIe Controller - Host mode"
  49. depends on PCI && PCI_MSI_IRQ_DOMAIN
  50. select PCIE_DW_HOST
  51. select PCIE_DW_PLAT
  52. help
  53. Enables support for the PCIe controller in the Designware IP to
  54. work in host mode. There are two instances of PCIe controller in
  55. Designware IP.
  56. This controller can work either as EP or RC. In order to enable
  57. host-specific features PCIE_DW_PLAT_HOST must be selected and in
  58. order to enable device-specific features PCI_DW_PLAT_EP must be
  59. selected.
  60. config PCIE_DW_PLAT_EP
  61. bool "Platform bus based DesignWare PCIe Controller - Endpoint mode"
  62. depends on PCI && PCI_MSI_IRQ_DOMAIN
  63. depends on PCI_ENDPOINT
  64. select PCIE_DW_EP
  65. select PCIE_DW_PLAT
  66. help
  67. Enables support for the PCIe controller in the Designware IP to
  68. work in endpoint mode. There are two instances of PCIe controller
  69. in Designware IP.
  70. This controller can work either as EP or RC. In order to enable
  71. host-specific features PCIE_DW_PLAT_HOST must be selected and in
  72. order to enable device-specific features PCI_DW_PLAT_EP must be
  73. selected.
  74. config PCI_EXYNOS
  75. bool "Samsung Exynos PCIe controller"
  76. depends on SOC_EXYNOS5440 || COMPILE_TEST
  77. depends on PCI_MSI_IRQ_DOMAIN
  78. select PCIE_DW_HOST
  79. config PCI_IMX6
  80. bool "Freescale i.MX6 PCIe controller"
  81. depends on SOC_IMX6Q || (ARM && COMPILE_TEST)
  82. depends on PCI_MSI_IRQ_DOMAIN
  83. select PCIE_DW_HOST
  84. config PCIE_SPEAR13XX
  85. bool "STMicroelectronics SPEAr PCIe controller"
  86. depends on ARCH_SPEAR13XX || COMPILE_TEST
  87. depends on PCI_MSI_IRQ_DOMAIN
  88. select PCIE_DW_HOST
  89. help
  90. Say Y here if you want PCIe support on SPEAr13XX SoCs.
  91. config PCI_KEYSTONE
  92. bool "TI Keystone PCIe controller"
  93. depends on ARCH_KEYSTONE || (ARM && COMPILE_TEST)
  94. depends on PCI_MSI_IRQ_DOMAIN
  95. select PCIE_DW_HOST
  96. help
  97. Say Y here if you want to enable PCI controller support on Keystone
  98. SoCs. The PCI controller on Keystone is based on DesignWare hardware
  99. and therefore the driver re-uses the DesignWare core functions to
  100. implement the driver.
  101. config PCI_LAYERSCAPE
  102. bool "Freescale Layerscape PCIe controller"
  103. depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
  104. depends on PCI_MSI_IRQ_DOMAIN
  105. select MFD_SYSCON
  106. select PCIE_DW_HOST
  107. help
  108. Say Y here if you want PCIe controller support on Layerscape SoCs.
  109. config PCI_HISI
  110. depends on OF && (ARM64 || COMPILE_TEST)
  111. bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
  112. depends on PCI_MSI_IRQ_DOMAIN
  113. select PCIE_DW_HOST
  114. select PCI_HOST_COMMON
  115. help
  116. Say Y here if you want PCIe controller support on HiSilicon
  117. Hip05 and Hip06 SoCs
  118. config PCIE_QCOM
  119. bool "Qualcomm PCIe controller"
  120. depends on OF && (ARCH_QCOM || COMPILE_TEST)
  121. depends on PCI_MSI_IRQ_DOMAIN
  122. select PCIE_DW_HOST
  123. help
  124. Say Y here to enable PCIe controller support on Qualcomm SoCs. The
  125. PCIe controller uses the DesignWare core plus Qualcomm-specific
  126. hardware wrappers.
  127. config PCIE_ARMADA_8K
  128. bool "Marvell Armada-8K PCIe controller"
  129. depends on ARCH_MVEBU || COMPILE_TEST
  130. depends on PCI_MSI_IRQ_DOMAIN
  131. select PCIE_DW_HOST
  132. help
  133. Say Y here if you want to enable PCIe controller support on
  134. Armada-8K SoCs. The PCIe controller on Armada-8K is based on
  135. DesignWare hardware and therefore the driver re-uses the
  136. DesignWare core functions to implement the driver.
  137. config PCIE_ARTPEC6
  138. bool
  139. config PCIE_ARTPEC6_HOST
  140. bool "Axis ARTPEC-6 PCIe controller Host Mode"
  141. depends on MACH_ARTPEC6 || COMPILE_TEST
  142. depends on PCI_MSI_IRQ_DOMAIN
  143. select PCIE_DW_HOST
  144. select PCIE_ARTPEC6
  145. help
  146. Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
  147. host mode. This uses the DesignWare core.
  148. config PCIE_ARTPEC6_EP
  149. bool "Axis ARTPEC-6 PCIe controller Endpoint Mode"
  150. depends on MACH_ARTPEC6 || COMPILE_TEST
  151. depends on PCI_ENDPOINT
  152. select PCIE_DW_EP
  153. select PCIE_ARTPEC6
  154. help
  155. Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
  156. endpoint mode. This uses the DesignWare core.
  157. config PCIE_KIRIN
  158. depends on OF && (ARM64 || COMPILE_TEST)
  159. bool "HiSilicon Kirin series SoCs PCIe controllers"
  160. depends on PCI_MSI_IRQ_DOMAIN
  161. select PCIE_DW_HOST
  162. help
  163. Say Y here if you want PCIe controller support
  164. on HiSilicon Kirin series SoCs.
  165. config PCIE_HISI_STB
  166. bool "HiSilicon STB SoCs PCIe controllers"
  167. depends on ARCH_HISI || COMPILE_TEST
  168. depends on PCI_MSI_IRQ_DOMAIN
  169. select PCIE_DW_HOST
  170. help
  171. Say Y here if you want PCIe controller support on HiSilicon STB SoCs
  172. endmenu