uio_fsl_elbc_gpcm.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* uio_fsl_elbc_gpcm: UIO driver for eLBC/GPCM peripherals
  3. Copyright (C) 2014 Linutronix GmbH
  4. Author: John Ogness <john.ogness@linutronix.de>
  5. This driver provides UIO access to memory of a peripheral connected
  6. to the Freescale enhanced local bus controller (eLBC) interface
  7. using the general purpose chip-select mode (GPCM).
  8. Here is an example of the device tree entries:
  9. localbus@ffe05000 {
  10. ranges = <0x2 0x0 0x0 0xff810000 0x10000>;
  11. dpm@2,0 {
  12. compatible = "fsl,elbc-gpcm-uio";
  13. reg = <0x2 0x0 0x10000>;
  14. elbc-gpcm-br = <0xff810800>;
  15. elbc-gpcm-or = <0xffff09f7>;
  16. interrupt-parent = <&mpic>;
  17. interrupts = <4 1>;
  18. device_type = "netx5152";
  19. uio_name = "netx_custom";
  20. netx5152,init-win0-offset = <0x0>;
  21. };
  22. };
  23. Only the entries reg (to identify bank) and elbc-gpcm-* (initial BR/OR
  24. values) are required. The entries interrupt*, device_type, and uio_name
  25. are optional (as well as any type-specific options such as
  26. netx5152,init-win0-offset). As long as no interrupt handler is needed,
  27. this driver can be used without any type-specific implementation.
  28. The netx5152 type has been tested to work with the netX 51/52 hardware
  29. from Hilscher using the Hilscher userspace netX stack.
  30. The netx5152 type should serve as a model to add new type-specific
  31. devices as needed.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/device.h>
  35. #include <linux/string.h>
  36. #include <linux/slab.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/uio_driver.h>
  39. #include <linux/of_address.h>
  40. #include <linux/of_irq.h>
  41. #include <asm/fsl_lbc.h>
  42. #define MAX_BANKS 8
  43. struct fsl_elbc_gpcm {
  44. struct device *dev;
  45. struct fsl_lbc_regs __iomem *lbc;
  46. u32 bank;
  47. const char *name;
  48. void (*init)(struct uio_info *info);
  49. void (*shutdown)(struct uio_info *info, bool init_err);
  50. irqreturn_t (*irq_handler)(int irq, struct uio_info *info);
  51. };
  52. static ssize_t reg_show(struct device *dev, struct device_attribute *attr,
  53. char *buf);
  54. static ssize_t reg_store(struct device *dev, struct device_attribute *attr,
  55. const char *buf, size_t count);
  56. DEVICE_ATTR(reg_br, S_IRUGO|S_IWUSR|S_IWGRP, reg_show, reg_store);
  57. DEVICE_ATTR(reg_or, S_IRUGO|S_IWUSR|S_IWGRP, reg_show, reg_store);
  58. static ssize_t reg_show(struct device *dev, struct device_attribute *attr,
  59. char *buf)
  60. {
  61. struct platform_device *pdev = to_platform_device(dev);
  62. struct uio_info *info = platform_get_drvdata(pdev);
  63. struct fsl_elbc_gpcm *priv = info->priv;
  64. struct fsl_lbc_bank *bank = &priv->lbc->bank[priv->bank];
  65. if (attr == &dev_attr_reg_br) {
  66. return scnprintf(buf, PAGE_SIZE, "0x%08x\n",
  67. in_be32(&bank->br));
  68. } else if (attr == &dev_attr_reg_or) {
  69. return scnprintf(buf, PAGE_SIZE, "0x%08x\n",
  70. in_be32(&bank->or));
  71. }
  72. return 0;
  73. }
  74. static ssize_t reg_store(struct device *dev, struct device_attribute *attr,
  75. const char *buf, size_t count)
  76. {
  77. struct platform_device *pdev = to_platform_device(dev);
  78. struct uio_info *info = platform_get_drvdata(pdev);
  79. struct fsl_elbc_gpcm *priv = info->priv;
  80. struct fsl_lbc_bank *bank = &priv->lbc->bank[priv->bank];
  81. unsigned long val;
  82. u32 reg_br_cur;
  83. u32 reg_or_cur;
  84. u32 reg_new;
  85. /* parse use input */
  86. if (kstrtoul(buf, 0, &val) != 0)
  87. return -EINVAL;
  88. reg_new = (u32)val;
  89. /* read current values */
  90. reg_br_cur = in_be32(&bank->br);
  91. reg_or_cur = in_be32(&bank->or);
  92. if (attr == &dev_attr_reg_br) {
  93. /* not allowed to change effective base address */
  94. if ((reg_br_cur & reg_or_cur & BR_BA) !=
  95. (reg_new & reg_or_cur & BR_BA)) {
  96. return -EINVAL;
  97. }
  98. /* not allowed to change mode */
  99. if ((reg_new & BR_MSEL) != BR_MS_GPCM)
  100. return -EINVAL;
  101. /* write new value (force valid) */
  102. out_be32(&bank->br, reg_new | BR_V);
  103. } else if (attr == &dev_attr_reg_or) {
  104. /* not allowed to change access mask */
  105. if ((reg_or_cur & OR_GPCM_AM) != (reg_new & OR_GPCM_AM))
  106. return -EINVAL;
  107. /* write new value */
  108. out_be32(&bank->or, reg_new);
  109. } else {
  110. return -EINVAL;
  111. }
  112. return count;
  113. }
  114. #ifdef CONFIG_UIO_FSL_ELBC_GPCM_NETX5152
  115. #define DPM_HOST_WIN0_OFFSET 0xff00
  116. #define DPM_HOST_INT_STAT0 0xe0
  117. #define DPM_HOST_INT_EN0 0xf0
  118. #define DPM_HOST_INT_MASK 0xe600ffff
  119. #define DPM_HOST_INT_GLOBAL_EN 0x80000000
  120. static irqreturn_t netx5152_irq_handler(int irq, struct uio_info *info)
  121. {
  122. void __iomem *reg_int_en = info->mem[0].internal_addr +
  123. DPM_HOST_WIN0_OFFSET +
  124. DPM_HOST_INT_EN0;
  125. void __iomem *reg_int_stat = info->mem[0].internal_addr +
  126. DPM_HOST_WIN0_OFFSET +
  127. DPM_HOST_INT_STAT0;
  128. /* check if an interrupt is enabled and active */
  129. if ((ioread32(reg_int_en) & ioread32(reg_int_stat) &
  130. DPM_HOST_INT_MASK) == 0) {
  131. return IRQ_NONE;
  132. }
  133. /* disable interrupts */
  134. iowrite32(ioread32(reg_int_en) & ~DPM_HOST_INT_GLOBAL_EN, reg_int_en);
  135. return IRQ_HANDLED;
  136. }
  137. static void netx5152_init(struct uio_info *info)
  138. {
  139. unsigned long win0_offset = DPM_HOST_WIN0_OFFSET;
  140. struct fsl_elbc_gpcm *priv = info->priv;
  141. const void *prop;
  142. /* get an optional initial win0 offset */
  143. prop = of_get_property(priv->dev->of_node,
  144. "netx5152,init-win0-offset", NULL);
  145. if (prop)
  146. win0_offset = of_read_ulong(prop, 1);
  147. /* disable interrupts */
  148. iowrite32(0, info->mem[0].internal_addr + win0_offset +
  149. DPM_HOST_INT_EN0);
  150. }
  151. static void netx5152_shutdown(struct uio_info *info, bool init_err)
  152. {
  153. if (init_err)
  154. return;
  155. /* disable interrupts */
  156. iowrite32(0, info->mem[0].internal_addr + DPM_HOST_WIN0_OFFSET +
  157. DPM_HOST_INT_EN0);
  158. }
  159. #endif
  160. static void setup_periph(struct fsl_elbc_gpcm *priv,
  161. const char *type)
  162. {
  163. #ifdef CONFIG_UIO_FSL_ELBC_GPCM_NETX5152
  164. if (strcmp(type, "netx5152") == 0) {
  165. priv->irq_handler = netx5152_irq_handler;
  166. priv->init = netx5152_init;
  167. priv->shutdown = netx5152_shutdown;
  168. priv->name = "netX 51/52";
  169. return;
  170. }
  171. #endif
  172. }
  173. static int check_of_data(struct fsl_elbc_gpcm *priv,
  174. struct resource *res,
  175. u32 reg_br, u32 reg_or)
  176. {
  177. /* check specified bank */
  178. if (priv->bank >= MAX_BANKS) {
  179. dev_err(priv->dev, "invalid bank\n");
  180. return -ENODEV;
  181. }
  182. /* check specified mode (BR_MS_GPCM is 0) */
  183. if ((reg_br & BR_MSEL) != BR_MS_GPCM) {
  184. dev_err(priv->dev, "unsupported mode\n");
  185. return -ENODEV;
  186. }
  187. /* check specified mask vs. resource size */
  188. if ((~(reg_or & OR_GPCM_AM) + 1) != resource_size(res)) {
  189. dev_err(priv->dev, "address mask / size mismatch\n");
  190. return -ENODEV;
  191. }
  192. /* check specified address */
  193. if ((reg_br & reg_or & BR_BA) != fsl_lbc_addr(res->start)) {
  194. dev_err(priv->dev, "base address mismatch\n");
  195. return -ENODEV;
  196. }
  197. return 0;
  198. }
  199. static int get_of_data(struct fsl_elbc_gpcm *priv, struct device_node *node,
  200. struct resource *res, u32 *reg_br,
  201. u32 *reg_or, unsigned int *irq, char **name)
  202. {
  203. const char *dt_name;
  204. const char *type;
  205. int ret;
  206. /* get the memory resource */
  207. ret = of_address_to_resource(node, 0, res);
  208. if (ret) {
  209. dev_err(priv->dev, "failed to get resource\n");
  210. return ret;
  211. }
  212. /* get the bank number */
  213. ret = of_property_read_u32(node, "reg", &priv->bank);
  214. if (ret) {
  215. dev_err(priv->dev, "failed to get bank number\n");
  216. return ret;
  217. }
  218. /* get BR value to set */
  219. ret = of_property_read_u32(node, "elbc-gpcm-br", reg_br);
  220. if (ret) {
  221. dev_err(priv->dev, "missing elbc-gpcm-br value\n");
  222. return ret;
  223. }
  224. /* get OR value to set */
  225. ret = of_property_read_u32(node, "elbc-gpcm-or", reg_or);
  226. if (ret) {
  227. dev_err(priv->dev, "missing elbc-gpcm-or value\n");
  228. return ret;
  229. }
  230. /* get optional peripheral type */
  231. priv->name = "generic";
  232. if (of_property_read_string(node, "device_type", &type) == 0)
  233. setup_periph(priv, type);
  234. /* get optional irq value */
  235. *irq = irq_of_parse_and_map(node, 0);
  236. /* sanity check device tree data */
  237. ret = check_of_data(priv, res, *reg_br, *reg_or);
  238. if (ret)
  239. return ret;
  240. /* get optional uio name */
  241. if (of_property_read_string(node, "uio_name", &dt_name) != 0)
  242. dt_name = "eLBC_GPCM";
  243. *name = kstrdup(dt_name, GFP_KERNEL);
  244. if (!*name)
  245. return -ENOMEM;
  246. return 0;
  247. }
  248. static int uio_fsl_elbc_gpcm_probe(struct platform_device *pdev)
  249. {
  250. struct device_node *node = pdev->dev.of_node;
  251. struct fsl_elbc_gpcm *priv;
  252. struct uio_info *info;
  253. char *uio_name = NULL;
  254. struct resource res;
  255. unsigned int irq;
  256. u32 reg_br_cur;
  257. u32 reg_or_cur;
  258. u32 reg_br_new;
  259. u32 reg_or_new;
  260. int ret;
  261. if (!fsl_lbc_ctrl_dev || !fsl_lbc_ctrl_dev->regs)
  262. return -ENODEV;
  263. /* allocate private data */
  264. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  265. if (!priv)
  266. return -ENOMEM;
  267. priv->dev = &pdev->dev;
  268. priv->lbc = fsl_lbc_ctrl_dev->regs;
  269. /* get device tree data */
  270. ret = get_of_data(priv, node, &res, &reg_br_new, &reg_or_new,
  271. &irq, &uio_name);
  272. if (ret)
  273. goto out_err0;
  274. /* allocate UIO structure */
  275. info = kzalloc(sizeof(*info), GFP_KERNEL);
  276. if (!info) {
  277. ret = -ENOMEM;
  278. goto out_err0;
  279. }
  280. /* get current BR/OR values */
  281. reg_br_cur = in_be32(&priv->lbc->bank[priv->bank].br);
  282. reg_or_cur = in_be32(&priv->lbc->bank[priv->bank].or);
  283. /* if bank already configured, make sure it matches */
  284. if ((reg_br_cur & BR_V)) {
  285. if ((reg_br_cur & BR_MSEL) != BR_MS_GPCM ||
  286. (reg_br_cur & reg_or_cur & BR_BA)
  287. != fsl_lbc_addr(res.start)) {
  288. dev_err(priv->dev,
  289. "bank in use by another peripheral\n");
  290. ret = -ENODEV;
  291. goto out_err1;
  292. }
  293. /* warn if behavior settings changing */
  294. if ((reg_br_cur & ~(BR_BA | BR_V)) !=
  295. (reg_br_new & ~(BR_BA | BR_V))) {
  296. dev_warn(priv->dev,
  297. "modifying BR settings: 0x%08x -> 0x%08x",
  298. reg_br_cur, reg_br_new);
  299. }
  300. if ((reg_or_cur & ~OR_GPCM_AM) != (reg_or_new & ~OR_GPCM_AM)) {
  301. dev_warn(priv->dev,
  302. "modifying OR settings: 0x%08x -> 0x%08x",
  303. reg_or_cur, reg_or_new);
  304. }
  305. }
  306. /* configure the bank (force base address and GPCM) */
  307. reg_br_new &= ~(BR_BA | BR_MSEL);
  308. reg_br_new |= fsl_lbc_addr(res.start) | BR_MS_GPCM | BR_V;
  309. out_be32(&priv->lbc->bank[priv->bank].or, reg_or_new);
  310. out_be32(&priv->lbc->bank[priv->bank].br, reg_br_new);
  311. /* map the memory resource */
  312. info->mem[0].internal_addr = ioremap(res.start, resource_size(&res));
  313. if (!info->mem[0].internal_addr) {
  314. dev_err(priv->dev, "failed to map chip region\n");
  315. ret = -ENODEV;
  316. goto out_err1;
  317. }
  318. /* set all UIO data */
  319. if (node->name)
  320. info->mem[0].name = kstrdup(node->name, GFP_KERNEL);
  321. info->mem[0].addr = res.start;
  322. info->mem[0].size = resource_size(&res);
  323. info->mem[0].memtype = UIO_MEM_PHYS;
  324. info->priv = priv;
  325. info->name = uio_name;
  326. info->version = "0.0.1";
  327. if (irq != NO_IRQ) {
  328. if (priv->irq_handler) {
  329. info->irq = irq;
  330. info->irq_flags = IRQF_SHARED;
  331. info->handler = priv->irq_handler;
  332. } else {
  333. irq = NO_IRQ;
  334. dev_warn(priv->dev, "ignoring irq, no handler\n");
  335. }
  336. }
  337. if (priv->init)
  338. priv->init(info);
  339. /* register UIO device */
  340. if (uio_register_device(priv->dev, info) != 0) {
  341. dev_err(priv->dev, "UIO registration failed\n");
  342. ret = -ENODEV;
  343. goto out_err2;
  344. }
  345. /* store private data */
  346. platform_set_drvdata(pdev, info);
  347. /* create sysfs files */
  348. ret = device_create_file(priv->dev, &dev_attr_reg_br);
  349. if (ret)
  350. goto out_err3;
  351. ret = device_create_file(priv->dev, &dev_attr_reg_or);
  352. if (ret)
  353. goto out_err4;
  354. dev_info(priv->dev,
  355. "eLBC/GPCM device (%s) at 0x%llx, bank %d, irq=%d\n",
  356. priv->name, (unsigned long long)res.start, priv->bank,
  357. irq != NO_IRQ ? irq : -1);
  358. return 0;
  359. out_err4:
  360. device_remove_file(priv->dev, &dev_attr_reg_br);
  361. out_err3:
  362. platform_set_drvdata(pdev, NULL);
  363. uio_unregister_device(info);
  364. out_err2:
  365. if (priv->shutdown)
  366. priv->shutdown(info, true);
  367. iounmap(info->mem[0].internal_addr);
  368. out_err1:
  369. kfree(info->mem[0].name);
  370. kfree(info);
  371. out_err0:
  372. kfree(uio_name);
  373. kfree(priv);
  374. return ret;
  375. }
  376. static int uio_fsl_elbc_gpcm_remove(struct platform_device *pdev)
  377. {
  378. struct uio_info *info = platform_get_drvdata(pdev);
  379. struct fsl_elbc_gpcm *priv = info->priv;
  380. device_remove_file(priv->dev, &dev_attr_reg_or);
  381. device_remove_file(priv->dev, &dev_attr_reg_br);
  382. platform_set_drvdata(pdev, NULL);
  383. uio_unregister_device(info);
  384. if (priv->shutdown)
  385. priv->shutdown(info, false);
  386. iounmap(info->mem[0].internal_addr);
  387. kfree(info->mem[0].name);
  388. kfree(info->name);
  389. kfree(info);
  390. kfree(priv);
  391. return 0;
  392. }
  393. static const struct of_device_id uio_fsl_elbc_gpcm_match[] = {
  394. { .compatible = "fsl,elbc-gpcm-uio", },
  395. {}
  396. };
  397. MODULE_DEVICE_TABLE(of, uio_fsl_elbc_gpcm_match);
  398. static struct platform_driver uio_fsl_elbc_gpcm_driver = {
  399. .driver = {
  400. .name = "fsl,elbc-gpcm-uio",
  401. .of_match_table = uio_fsl_elbc_gpcm_match,
  402. },
  403. .probe = uio_fsl_elbc_gpcm_probe,
  404. .remove = uio_fsl_elbc_gpcm_remove,
  405. };
  406. module_platform_driver(uio_fsl_elbc_gpcm_driver);
  407. MODULE_LICENSE("GPL");
  408. MODULE_AUTHOR("John Ogness <john.ogness@linutronix.de>");
  409. MODULE_DESCRIPTION("Freescale Enhanced Local Bus Controller GPCM driver");