axc001.dtsi 3.0 KB

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  1. /*
  2. * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /*
  9. * Device tree for AXC001 770D/EM6/AS221 CPU card
  10. * Note that this file only supports the 770D CPU
  11. */
  12. /include/ "skeleton.dtsi"
  13. / {
  14. compatible = "snps,arc";
  15. #address-cells = <2>;
  16. #size-cells = <2>;
  17. cpu_card {
  18. compatible = "simple-bus";
  19. #address-cells = <1>;
  20. #size-cells = <1>;
  21. ranges = <0x00000000 0x0 0xf0000000 0x10000000>;
  22. core_clk: core_clk {
  23. #clock-cells = <0>;
  24. compatible = "fixed-clock";
  25. clock-frequency = <750000000>;
  26. };
  27. core_intc: arc700-intc@cpu {
  28. compatible = "snps,arc700-intc";
  29. interrupt-controller;
  30. #interrupt-cells = <1>;
  31. };
  32. /*
  33. * this GPIO block ORs all interrupts on CPU card (creg,..)
  34. * to uplink only 1 IRQ to ARC core intc
  35. */
  36. dw-apb-gpio@0x2000 {
  37. compatible = "snps,dw-apb-gpio";
  38. reg = < 0x2000 0x80 >;
  39. #address-cells = <1>;
  40. #size-cells = <0>;
  41. ictl_intc: gpio-controller@0 {
  42. compatible = "snps,dw-apb-gpio-port";
  43. gpio-controller;
  44. #gpio-cells = <2>;
  45. snps,nr-gpios = <30>;
  46. reg = <0>;
  47. interrupt-controller;
  48. #interrupt-cells = <2>;
  49. interrupt-parent = <&core_intc>;
  50. interrupts = <15>;
  51. };
  52. };
  53. debug_uart: dw-apb-uart@0x5000 {
  54. compatible = "snps,dw-apb-uart";
  55. reg = <0x5000 0x100>;
  56. clock-frequency = <33333000>;
  57. interrupt-parent = <&ictl_intc>;
  58. interrupts = <19 4>;
  59. baud = <115200>;
  60. reg-shift = <2>;
  61. reg-io-width = <4>;
  62. };
  63. arcpct0: pct {
  64. compatible = "snps,arc700-pct";
  65. };
  66. };
  67. /*
  68. * This INTC is actually connected to DW APB GPIO
  69. * which acts as a wire between MB INTC and CPU INTC.
  70. * GPIO INTC is configured in platform init code
  71. * and here we mimic direct connection from MB INTC to
  72. * CPU INTC, thus we set "interrupts = <7>" instead of
  73. * "interrupts = <12>"
  74. *
  75. * This intc actually resides on MB, but we move it here to
  76. * avoid duplicating the MB dtsi file given that IRQ from
  77. * this intc to cpu intc are different for axs101 and axs103
  78. */
  79. mb_intc: dw-apb-ictl@0xe0012000 {
  80. #interrupt-cells = <1>;
  81. compatible = "snps,dw-apb-ictl";
  82. reg = < 0x0 0xe0012000 0x0 0x200 >;
  83. interrupt-controller;
  84. interrupt-parent = <&core_intc>;
  85. interrupts = < 7 >;
  86. };
  87. memory {
  88. device_type = "memory";
  89. /* CONFIG_LINUX_RAM_BASE needs to match low mem start */
  90. reg = <0x0 0x80000000 0x0 0x1b000000>; /* (512 - 32) MiB */
  91. };
  92. reserved-memory {
  93. #address-cells = <2>;
  94. #size-cells = <2>;
  95. ranges;
  96. /*
  97. * We just move frame buffer area to the very end of
  98. * available DDR. And even though in case of ARC770 there's
  99. * no strict requirement for a frame-buffer to be in any
  100. * particular location it allows us to use the same
  101. * base board's DT node for ARC PGU as for ARc HS38.
  102. */
  103. frame_buffer: frame_buffer@9e000000 {
  104. compatible = "shared-dma-pool";
  105. reg = <0x0 0x9e000000 0x0 0x2000000>;
  106. no-map;
  107. };
  108. };
  109. };