jz4780.dtsi 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <dt-bindings/clock/jz4780-cgu.h>
  3. #include <dt-bindings/dma/jz4780-dma.h>
  4. / {
  5. #address-cells = <1>;
  6. #size-cells = <1>;
  7. compatible = "ingenic,jz4780";
  8. cpuintc: interrupt-controller {
  9. #address-cells = <0>;
  10. #interrupt-cells = <1>;
  11. interrupt-controller;
  12. compatible = "mti,cpu-interrupt-controller";
  13. };
  14. intc: interrupt-controller@10001000 {
  15. compatible = "ingenic,jz4780-intc";
  16. reg = <0x10001000 0x50>;
  17. interrupt-controller;
  18. #interrupt-cells = <1>;
  19. interrupt-parent = <&cpuintc>;
  20. interrupts = <2>;
  21. };
  22. ext: ext {
  23. compatible = "fixed-clock";
  24. #clock-cells = <0>;
  25. };
  26. rtc: rtc {
  27. compatible = "fixed-clock";
  28. #clock-cells = <0>;
  29. clock-frequency = <32768>;
  30. };
  31. cgu: jz4780-cgu@10000000 {
  32. compatible = "ingenic,jz4780-cgu";
  33. reg = <0x10000000 0x100>;
  34. clocks = <&ext>, <&rtc>;
  35. clock-names = "ext", "rtc";
  36. #clock-cells = <1>;
  37. };
  38. rtc_dev: rtc@10003000 {
  39. compatible = "ingenic,jz4780-rtc";
  40. reg = <0x10003000 0x4c>;
  41. interrupt-parent = <&intc>;
  42. interrupts = <32>;
  43. clocks = <&cgu JZ4780_CLK_RTCLK>;
  44. clock-names = "rtc";
  45. };
  46. pinctrl: pin-controller@10010000 {
  47. compatible = "ingenic,jz4780-pinctrl";
  48. reg = <0x10010000 0x600>;
  49. #address-cells = <1>;
  50. #size-cells = <0>;
  51. gpa: gpio@0 {
  52. compatible = "ingenic,jz4780-gpio";
  53. reg = <0>;
  54. gpio-controller;
  55. gpio-ranges = <&pinctrl 0 0 32>;
  56. #gpio-cells = <2>;
  57. interrupt-controller;
  58. #interrupt-cells = <2>;
  59. interrupt-parent = <&intc>;
  60. interrupts = <17>;
  61. };
  62. gpb: gpio@1 {
  63. compatible = "ingenic,jz4780-gpio";
  64. reg = <1>;
  65. gpio-controller;
  66. gpio-ranges = <&pinctrl 0 32 32>;
  67. #gpio-cells = <2>;
  68. interrupt-controller;
  69. #interrupt-cells = <2>;
  70. interrupt-parent = <&intc>;
  71. interrupts = <16>;
  72. };
  73. gpc: gpio@2 {
  74. compatible = "ingenic,jz4780-gpio";
  75. reg = <2>;
  76. gpio-controller;
  77. gpio-ranges = <&pinctrl 0 64 32>;
  78. #gpio-cells = <2>;
  79. interrupt-controller;
  80. #interrupt-cells = <2>;
  81. interrupt-parent = <&intc>;
  82. interrupts = <15>;
  83. };
  84. gpd: gpio@3 {
  85. compatible = "ingenic,jz4780-gpio";
  86. reg = <3>;
  87. gpio-controller;
  88. gpio-ranges = <&pinctrl 0 96 32>;
  89. #gpio-cells = <2>;
  90. interrupt-controller;
  91. #interrupt-cells = <2>;
  92. interrupt-parent = <&intc>;
  93. interrupts = <14>;
  94. };
  95. gpe: gpio@4 {
  96. compatible = "ingenic,jz4780-gpio";
  97. reg = <4>;
  98. gpio-controller;
  99. gpio-ranges = <&pinctrl 0 128 32>;
  100. #gpio-cells = <2>;
  101. interrupt-controller;
  102. #interrupt-cells = <2>;
  103. interrupt-parent = <&intc>;
  104. interrupts = <13>;
  105. };
  106. gpf: gpio@5 {
  107. compatible = "ingenic,jz4780-gpio";
  108. reg = <5>;
  109. gpio-controller;
  110. gpio-ranges = <&pinctrl 0 160 32>;
  111. #gpio-cells = <2>;
  112. interrupt-controller;
  113. #interrupt-cells = <2>;
  114. interrupt-parent = <&intc>;
  115. interrupts = <12>;
  116. };
  117. };
  118. spi_gpio {
  119. compatible = "spi-gpio";
  120. #address-cells = <1>;
  121. #size-cells = <0>;
  122. num-chipselects = <2>;
  123. gpio-miso = <&gpe 14 0>;
  124. gpio-sck = <&gpe 15 0>;
  125. gpio-mosi = <&gpe 17 0>;
  126. cs-gpios = <&gpe 16 0
  127. &gpe 18 0>;
  128. spidev@0 {
  129. compatible = "spidev";
  130. reg = <0>;
  131. spi-max-frequency = <1000000>;
  132. };
  133. };
  134. uart0: serial@10030000 {
  135. compatible = "ingenic,jz4780-uart";
  136. reg = <0x10030000 0x100>;
  137. interrupt-parent = <&intc>;
  138. interrupts = <51>;
  139. clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
  140. clock-names = "baud", "module";
  141. status = "disabled";
  142. };
  143. uart1: serial@10031000 {
  144. compatible = "ingenic,jz4780-uart";
  145. reg = <0x10031000 0x100>;
  146. interrupt-parent = <&intc>;
  147. interrupts = <50>;
  148. clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
  149. clock-names = "baud", "module";
  150. status = "disabled";
  151. };
  152. uart2: serial@10032000 {
  153. compatible = "ingenic,jz4780-uart";
  154. reg = <0x10032000 0x100>;
  155. interrupt-parent = <&intc>;
  156. interrupts = <49>;
  157. clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
  158. clock-names = "baud", "module";
  159. status = "disabled";
  160. };
  161. uart3: serial@10033000 {
  162. compatible = "ingenic,jz4780-uart";
  163. reg = <0x10033000 0x100>;
  164. interrupt-parent = <&intc>;
  165. interrupts = <48>;
  166. clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
  167. clock-names = "baud", "module";
  168. status = "disabled";
  169. };
  170. uart4: serial@10034000 {
  171. compatible = "ingenic,jz4780-uart";
  172. reg = <0x10034000 0x100>;
  173. interrupt-parent = <&intc>;
  174. interrupts = <34>;
  175. clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
  176. clock-names = "baud", "module";
  177. status = "disabled";
  178. };
  179. watchdog: watchdog@10002000 {
  180. compatible = "ingenic,jz4780-watchdog";
  181. reg = <0x10002000 0x10>;
  182. clocks = <&cgu JZ4780_CLK_RTCLK>;
  183. clock-names = "rtc";
  184. };
  185. nemc: nemc@13410000 {
  186. compatible = "ingenic,jz4780-nemc";
  187. reg = <0x13410000 0x10000>;
  188. #address-cells = <2>;
  189. #size-cells = <1>;
  190. ranges = <1 0 0x1b000000 0x1000000
  191. 2 0 0x1a000000 0x1000000
  192. 3 0 0x19000000 0x1000000
  193. 4 0 0x18000000 0x1000000
  194. 5 0 0x17000000 0x1000000
  195. 6 0 0x16000000 0x1000000>;
  196. clocks = <&cgu JZ4780_CLK_NEMC>;
  197. status = "disabled";
  198. };
  199. dma: dma@13420000 {
  200. compatible = "ingenic,jz4780-dma";
  201. reg = <0x13420000 0x10000>;
  202. #dma-cells = <2>;
  203. interrupt-parent = <&intc>;
  204. interrupts = <10>;
  205. clocks = <&cgu JZ4780_CLK_PDMA>;
  206. };
  207. mmc0: mmc@13450000 {
  208. compatible = "ingenic,jz4780-mmc";
  209. reg = <0x13450000 0x1000>;
  210. interrupt-parent = <&intc>;
  211. interrupts = <37>;
  212. clocks = <&cgu JZ4780_CLK_MSC0>;
  213. clock-names = "mmc";
  214. cap-sd-highspeed;
  215. cap-mmc-highspeed;
  216. cap-sdio-irq;
  217. dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
  218. <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
  219. dma-names = "rx", "tx";
  220. status = "disabled";
  221. };
  222. mmc1: mmc@13460000 {
  223. compatible = "ingenic,jz4780-mmc";
  224. reg = <0x13460000 0x1000>;
  225. interrupt-parent = <&intc>;
  226. interrupts = <36>;
  227. clocks = <&cgu JZ4780_CLK_MSC1>;
  228. clock-names = "mmc";
  229. cap-sd-highspeed;
  230. cap-mmc-highspeed;
  231. cap-sdio-irq;
  232. dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
  233. <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
  234. dma-names = "rx", "tx";
  235. status = "disabled";
  236. };
  237. bch: bch@134d0000 {
  238. compatible = "ingenic,jz4780-bch";
  239. reg = <0x134d0000 0x10000>;
  240. clocks = <&cgu JZ4780_CLK_BCH>;
  241. status = "disabled";
  242. };
  243. };