e1000_main.c 145 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 1999 - 2006 Intel Corporation. */
  3. #include "e1000.h"
  4. #include <net/ip6_checksum.h>
  5. #include <linux/io.h>
  6. #include <linux/prefetch.h>
  7. #include <linux/bitops.h>
  8. #include <linux/if_vlan.h>
  9. char e1000_driver_name[] = "e1000";
  10. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  11. #define DRV_VERSION "7.3.21-k8-NAPI"
  12. const char e1000_driver_version[] = DRV_VERSION;
  13. static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  14. /* e1000_pci_tbl - PCI Device ID Table
  15. *
  16. * Last entry must be all 0s
  17. *
  18. * Macro expands to...
  19. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  20. */
  21. static const struct pci_device_id e1000_pci_tbl[] = {
  22. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  23. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  24. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  25. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  26. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  27. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  28. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  29. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  30. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  31. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  32. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  33. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  34. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  35. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  36. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  37. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  38. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  39. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  40. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  41. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  42. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  43. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  45. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  46. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  47. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  52. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  53. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  54. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  55. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  57. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  58. INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
  59. /* required last entry */
  60. {0,}
  61. };
  62. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  63. int e1000_up(struct e1000_adapter *adapter);
  64. void e1000_down(struct e1000_adapter *adapter);
  65. void e1000_reinit_locked(struct e1000_adapter *adapter);
  66. void e1000_reset(struct e1000_adapter *adapter);
  67. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  68. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  69. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  70. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  71. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  72. struct e1000_tx_ring *txdr);
  73. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  74. struct e1000_rx_ring *rxdr);
  75. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  76. struct e1000_tx_ring *tx_ring);
  77. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  78. struct e1000_rx_ring *rx_ring);
  79. void e1000_update_stats(struct e1000_adapter *adapter);
  80. static int e1000_init_module(void);
  81. static void e1000_exit_module(void);
  82. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  83. static void e1000_remove(struct pci_dev *pdev);
  84. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  85. static int e1000_sw_init(struct e1000_adapter *adapter);
  86. int e1000_open(struct net_device *netdev);
  87. int e1000_close(struct net_device *netdev);
  88. static void e1000_configure_tx(struct e1000_adapter *adapter);
  89. static void e1000_configure_rx(struct e1000_adapter *adapter);
  90. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  91. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  92. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  93. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  94. struct e1000_tx_ring *tx_ring);
  95. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  96. struct e1000_rx_ring *rx_ring);
  97. static void e1000_set_rx_mode(struct net_device *netdev);
  98. static void e1000_update_phy_info_task(struct work_struct *work);
  99. static void e1000_watchdog(struct work_struct *work);
  100. static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
  101. static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
  102. struct net_device *netdev);
  103. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  104. static int e1000_set_mac(struct net_device *netdev, void *p);
  105. static irqreturn_t e1000_intr(int irq, void *data);
  106. static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
  107. struct e1000_tx_ring *tx_ring);
  108. static int e1000_clean(struct napi_struct *napi, int budget);
  109. static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
  110. struct e1000_rx_ring *rx_ring,
  111. int *work_done, int work_to_do);
  112. static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
  113. struct e1000_rx_ring *rx_ring,
  114. int *work_done, int work_to_do);
  115. static void e1000_alloc_dummy_rx_buffers(struct e1000_adapter *adapter,
  116. struct e1000_rx_ring *rx_ring,
  117. int cleaned_count)
  118. {
  119. }
  120. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  121. struct e1000_rx_ring *rx_ring,
  122. int cleaned_count);
  123. static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
  124. struct e1000_rx_ring *rx_ring,
  125. int cleaned_count);
  126. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  127. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  128. int cmd);
  129. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  130. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  131. static void e1000_tx_timeout(struct net_device *dev);
  132. static void e1000_reset_task(struct work_struct *work);
  133. static void e1000_smartspeed(struct e1000_adapter *adapter);
  134. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  135. struct sk_buff *skb);
  136. static bool e1000_vlan_used(struct e1000_adapter *adapter);
  137. static void e1000_vlan_mode(struct net_device *netdev,
  138. netdev_features_t features);
  139. static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
  140. bool filter_on);
  141. static int e1000_vlan_rx_add_vid(struct net_device *netdev,
  142. __be16 proto, u16 vid);
  143. static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
  144. __be16 proto, u16 vid);
  145. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  146. #ifdef CONFIG_PM
  147. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  148. static int e1000_resume(struct pci_dev *pdev);
  149. #endif
  150. static void e1000_shutdown(struct pci_dev *pdev);
  151. #ifdef CONFIG_NET_POLL_CONTROLLER
  152. /* for netdump / net console */
  153. static void e1000_netpoll (struct net_device *netdev);
  154. #endif
  155. #define COPYBREAK_DEFAULT 256
  156. static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
  157. module_param(copybreak, uint, 0644);
  158. MODULE_PARM_DESC(copybreak,
  159. "Maximum size of packet that is copied to a new buffer on receive");
  160. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  161. pci_channel_state_t state);
  162. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  163. static void e1000_io_resume(struct pci_dev *pdev);
  164. static const struct pci_error_handlers e1000_err_handler = {
  165. .error_detected = e1000_io_error_detected,
  166. .slot_reset = e1000_io_slot_reset,
  167. .resume = e1000_io_resume,
  168. };
  169. static struct pci_driver e1000_driver = {
  170. .name = e1000_driver_name,
  171. .id_table = e1000_pci_tbl,
  172. .probe = e1000_probe,
  173. .remove = e1000_remove,
  174. #ifdef CONFIG_PM
  175. /* Power Management Hooks */
  176. .suspend = e1000_suspend,
  177. .resume = e1000_resume,
  178. #endif
  179. .shutdown = e1000_shutdown,
  180. .err_handler = &e1000_err_handler
  181. };
  182. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  183. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  184. MODULE_LICENSE("GPL");
  185. MODULE_VERSION(DRV_VERSION);
  186. #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  187. static int debug = -1;
  188. module_param(debug, int, 0);
  189. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  190. /**
  191. * e1000_get_hw_dev - return device
  192. * used by hardware layer to print debugging information
  193. *
  194. **/
  195. struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
  196. {
  197. struct e1000_adapter *adapter = hw->back;
  198. return adapter->netdev;
  199. }
  200. /**
  201. * e1000_init_module - Driver Registration Routine
  202. *
  203. * e1000_init_module is the first routine called when the driver is
  204. * loaded. All it does is register with the PCI subsystem.
  205. **/
  206. static int __init e1000_init_module(void)
  207. {
  208. int ret;
  209. pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
  210. pr_info("%s\n", e1000_copyright);
  211. ret = pci_register_driver(&e1000_driver);
  212. if (copybreak != COPYBREAK_DEFAULT) {
  213. if (copybreak == 0)
  214. pr_info("copybreak disabled\n");
  215. else
  216. pr_info("copybreak enabled for "
  217. "packets <= %u bytes\n", copybreak);
  218. }
  219. return ret;
  220. }
  221. module_init(e1000_init_module);
  222. /**
  223. * e1000_exit_module - Driver Exit Cleanup Routine
  224. *
  225. * e1000_exit_module is called just before the driver is removed
  226. * from memory.
  227. **/
  228. static void __exit e1000_exit_module(void)
  229. {
  230. pci_unregister_driver(&e1000_driver);
  231. }
  232. module_exit(e1000_exit_module);
  233. static int e1000_request_irq(struct e1000_adapter *adapter)
  234. {
  235. struct net_device *netdev = adapter->netdev;
  236. irq_handler_t handler = e1000_intr;
  237. int irq_flags = IRQF_SHARED;
  238. int err;
  239. err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
  240. netdev);
  241. if (err) {
  242. e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
  243. }
  244. return err;
  245. }
  246. static void e1000_free_irq(struct e1000_adapter *adapter)
  247. {
  248. struct net_device *netdev = adapter->netdev;
  249. free_irq(adapter->pdev->irq, netdev);
  250. }
  251. /**
  252. * e1000_irq_disable - Mask off interrupt generation on the NIC
  253. * @adapter: board private structure
  254. **/
  255. static void e1000_irq_disable(struct e1000_adapter *adapter)
  256. {
  257. struct e1000_hw *hw = &adapter->hw;
  258. ew32(IMC, ~0);
  259. E1000_WRITE_FLUSH();
  260. synchronize_irq(adapter->pdev->irq);
  261. }
  262. /**
  263. * e1000_irq_enable - Enable default interrupt generation settings
  264. * @adapter: board private structure
  265. **/
  266. static void e1000_irq_enable(struct e1000_adapter *adapter)
  267. {
  268. struct e1000_hw *hw = &adapter->hw;
  269. ew32(IMS, IMS_ENABLE_MASK);
  270. E1000_WRITE_FLUSH();
  271. }
  272. static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
  273. {
  274. struct e1000_hw *hw = &adapter->hw;
  275. struct net_device *netdev = adapter->netdev;
  276. u16 vid = hw->mng_cookie.vlan_id;
  277. u16 old_vid = adapter->mng_vlan_id;
  278. if (!e1000_vlan_used(adapter))
  279. return;
  280. if (!test_bit(vid, adapter->active_vlans)) {
  281. if (hw->mng_cookie.status &
  282. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  283. e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
  284. adapter->mng_vlan_id = vid;
  285. } else {
  286. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  287. }
  288. if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
  289. (vid != old_vid) &&
  290. !test_bit(old_vid, adapter->active_vlans))
  291. e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
  292. old_vid);
  293. } else {
  294. adapter->mng_vlan_id = vid;
  295. }
  296. }
  297. static void e1000_init_manageability(struct e1000_adapter *adapter)
  298. {
  299. struct e1000_hw *hw = &adapter->hw;
  300. if (adapter->en_mng_pt) {
  301. u32 manc = er32(MANC);
  302. /* disable hardware interception of ARP */
  303. manc &= ~(E1000_MANC_ARP_EN);
  304. ew32(MANC, manc);
  305. }
  306. }
  307. static void e1000_release_manageability(struct e1000_adapter *adapter)
  308. {
  309. struct e1000_hw *hw = &adapter->hw;
  310. if (adapter->en_mng_pt) {
  311. u32 manc = er32(MANC);
  312. /* re-enable hardware interception of ARP */
  313. manc |= E1000_MANC_ARP_EN;
  314. ew32(MANC, manc);
  315. }
  316. }
  317. /**
  318. * e1000_configure - configure the hardware for RX and TX
  319. * @adapter = private board structure
  320. **/
  321. static void e1000_configure(struct e1000_adapter *adapter)
  322. {
  323. struct net_device *netdev = adapter->netdev;
  324. int i;
  325. e1000_set_rx_mode(netdev);
  326. e1000_restore_vlan(adapter);
  327. e1000_init_manageability(adapter);
  328. e1000_configure_tx(adapter);
  329. e1000_setup_rctl(adapter);
  330. e1000_configure_rx(adapter);
  331. /* call E1000_DESC_UNUSED which always leaves
  332. * at least 1 descriptor unused to make sure
  333. * next_to_use != next_to_clean
  334. */
  335. for (i = 0; i < adapter->num_rx_queues; i++) {
  336. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  337. adapter->alloc_rx_buf(adapter, ring,
  338. E1000_DESC_UNUSED(ring));
  339. }
  340. }
  341. int e1000_up(struct e1000_adapter *adapter)
  342. {
  343. struct e1000_hw *hw = &adapter->hw;
  344. /* hardware has been reset, we need to reload some things */
  345. e1000_configure(adapter);
  346. clear_bit(__E1000_DOWN, &adapter->flags);
  347. napi_enable(&adapter->napi);
  348. e1000_irq_enable(adapter);
  349. netif_wake_queue(adapter->netdev);
  350. /* fire a link change interrupt to start the watchdog */
  351. ew32(ICS, E1000_ICS_LSC);
  352. return 0;
  353. }
  354. /**
  355. * e1000_power_up_phy - restore link in case the phy was powered down
  356. * @adapter: address of board private structure
  357. *
  358. * The phy may be powered down to save power and turn off link when the
  359. * driver is unloaded and wake on lan is not enabled (among others)
  360. * *** this routine MUST be followed by a call to e1000_reset ***
  361. **/
  362. void e1000_power_up_phy(struct e1000_adapter *adapter)
  363. {
  364. struct e1000_hw *hw = &adapter->hw;
  365. u16 mii_reg = 0;
  366. /* Just clear the power down bit to wake the phy back up */
  367. if (hw->media_type == e1000_media_type_copper) {
  368. /* according to the manual, the phy will retain its
  369. * settings across a power-down/up cycle
  370. */
  371. e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
  372. mii_reg &= ~MII_CR_POWER_DOWN;
  373. e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
  374. }
  375. }
  376. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  377. {
  378. struct e1000_hw *hw = &adapter->hw;
  379. /* Power down the PHY so no link is implied when interface is down *
  380. * The PHY cannot be powered down if any of the following is true *
  381. * (a) WoL is enabled
  382. * (b) AMT is active
  383. * (c) SoL/IDER session is active
  384. */
  385. if (!adapter->wol && hw->mac_type >= e1000_82540 &&
  386. hw->media_type == e1000_media_type_copper) {
  387. u16 mii_reg = 0;
  388. switch (hw->mac_type) {
  389. case e1000_82540:
  390. case e1000_82545:
  391. case e1000_82545_rev_3:
  392. case e1000_82546:
  393. case e1000_ce4100:
  394. case e1000_82546_rev_3:
  395. case e1000_82541:
  396. case e1000_82541_rev_2:
  397. case e1000_82547:
  398. case e1000_82547_rev_2:
  399. if (er32(MANC) & E1000_MANC_SMBUS_EN)
  400. goto out;
  401. break;
  402. default:
  403. goto out;
  404. }
  405. e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
  406. mii_reg |= MII_CR_POWER_DOWN;
  407. e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
  408. msleep(1);
  409. }
  410. out:
  411. return;
  412. }
  413. static void e1000_down_and_stop(struct e1000_adapter *adapter)
  414. {
  415. set_bit(__E1000_DOWN, &adapter->flags);
  416. cancel_delayed_work_sync(&adapter->watchdog_task);
  417. /*
  418. * Since the watchdog task can reschedule other tasks, we should cancel
  419. * it first, otherwise we can run into the situation when a work is
  420. * still running after the adapter has been turned down.
  421. */
  422. cancel_delayed_work_sync(&adapter->phy_info_task);
  423. cancel_delayed_work_sync(&adapter->fifo_stall_task);
  424. /* Only kill reset task if adapter is not resetting */
  425. if (!test_bit(__E1000_RESETTING, &adapter->flags))
  426. cancel_work_sync(&adapter->reset_task);
  427. }
  428. void e1000_down(struct e1000_adapter *adapter)
  429. {
  430. struct e1000_hw *hw = &adapter->hw;
  431. struct net_device *netdev = adapter->netdev;
  432. u32 rctl, tctl;
  433. /* disable receives in the hardware */
  434. rctl = er32(RCTL);
  435. ew32(RCTL, rctl & ~E1000_RCTL_EN);
  436. /* flush and sleep below */
  437. netif_tx_disable(netdev);
  438. /* disable transmits in the hardware */
  439. tctl = er32(TCTL);
  440. tctl &= ~E1000_TCTL_EN;
  441. ew32(TCTL, tctl);
  442. /* flush both disables and wait for them to finish */
  443. E1000_WRITE_FLUSH();
  444. msleep(10);
  445. /* Set the carrier off after transmits have been disabled in the
  446. * hardware, to avoid race conditions with e1000_watchdog() (which
  447. * may be running concurrently to us, checking for the carrier
  448. * bit to decide whether it should enable transmits again). Such
  449. * a race condition would result into transmission being disabled
  450. * in the hardware until the next IFF_DOWN+IFF_UP cycle.
  451. */
  452. netif_carrier_off(netdev);
  453. napi_disable(&adapter->napi);
  454. e1000_irq_disable(adapter);
  455. /* Setting DOWN must be after irq_disable to prevent
  456. * a screaming interrupt. Setting DOWN also prevents
  457. * tasks from rescheduling.
  458. */
  459. e1000_down_and_stop(adapter);
  460. adapter->link_speed = 0;
  461. adapter->link_duplex = 0;
  462. e1000_reset(adapter);
  463. e1000_clean_all_tx_rings(adapter);
  464. e1000_clean_all_rx_rings(adapter);
  465. }
  466. void e1000_reinit_locked(struct e1000_adapter *adapter)
  467. {
  468. WARN_ON(in_interrupt());
  469. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  470. msleep(1);
  471. /* only run the task if not already down */
  472. if (!test_bit(__E1000_DOWN, &adapter->flags)) {
  473. e1000_down(adapter);
  474. e1000_up(adapter);
  475. }
  476. clear_bit(__E1000_RESETTING, &adapter->flags);
  477. }
  478. void e1000_reset(struct e1000_adapter *adapter)
  479. {
  480. struct e1000_hw *hw = &adapter->hw;
  481. u32 pba = 0, tx_space, min_tx_space, min_rx_space;
  482. bool legacy_pba_adjust = false;
  483. u16 hwm;
  484. /* Repartition Pba for greater than 9k mtu
  485. * To take effect CTRL.RST is required.
  486. */
  487. switch (hw->mac_type) {
  488. case e1000_82542_rev2_0:
  489. case e1000_82542_rev2_1:
  490. case e1000_82543:
  491. case e1000_82544:
  492. case e1000_82540:
  493. case e1000_82541:
  494. case e1000_82541_rev_2:
  495. legacy_pba_adjust = true;
  496. pba = E1000_PBA_48K;
  497. break;
  498. case e1000_82545:
  499. case e1000_82545_rev_3:
  500. case e1000_82546:
  501. case e1000_ce4100:
  502. case e1000_82546_rev_3:
  503. pba = E1000_PBA_48K;
  504. break;
  505. case e1000_82547:
  506. case e1000_82547_rev_2:
  507. legacy_pba_adjust = true;
  508. pba = E1000_PBA_30K;
  509. break;
  510. case e1000_undefined:
  511. case e1000_num_macs:
  512. break;
  513. }
  514. if (legacy_pba_adjust) {
  515. if (hw->max_frame_size > E1000_RXBUFFER_8192)
  516. pba -= 8; /* allocate more FIFO for Tx */
  517. if (hw->mac_type == e1000_82547) {
  518. adapter->tx_fifo_head = 0;
  519. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  520. adapter->tx_fifo_size =
  521. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  522. atomic_set(&adapter->tx_fifo_stall, 0);
  523. }
  524. } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
  525. /* adjust PBA for jumbo frames */
  526. ew32(PBA, pba);
  527. /* To maintain wire speed transmits, the Tx FIFO should be
  528. * large enough to accommodate two full transmit packets,
  529. * rounded up to the next 1KB and expressed in KB. Likewise,
  530. * the Rx FIFO should be large enough to accommodate at least
  531. * one full receive packet and is similarly rounded up and
  532. * expressed in KB.
  533. */
  534. pba = er32(PBA);
  535. /* upper 16 bits has Tx packet buffer allocation size in KB */
  536. tx_space = pba >> 16;
  537. /* lower 16 bits has Rx packet buffer allocation size in KB */
  538. pba &= 0xffff;
  539. /* the Tx fifo also stores 16 bytes of information about the Tx
  540. * but don't include ethernet FCS because hardware appends it
  541. */
  542. min_tx_space = (hw->max_frame_size +
  543. sizeof(struct e1000_tx_desc) -
  544. ETH_FCS_LEN) * 2;
  545. min_tx_space = ALIGN(min_tx_space, 1024);
  546. min_tx_space >>= 10;
  547. /* software strips receive CRC, so leave room for it */
  548. min_rx_space = hw->max_frame_size;
  549. min_rx_space = ALIGN(min_rx_space, 1024);
  550. min_rx_space >>= 10;
  551. /* If current Tx allocation is less than the min Tx FIFO size,
  552. * and the min Tx FIFO size is less than the current Rx FIFO
  553. * allocation, take space away from current Rx allocation
  554. */
  555. if (tx_space < min_tx_space &&
  556. ((min_tx_space - tx_space) < pba)) {
  557. pba = pba - (min_tx_space - tx_space);
  558. /* PCI/PCIx hardware has PBA alignment constraints */
  559. switch (hw->mac_type) {
  560. case e1000_82545 ... e1000_82546_rev_3:
  561. pba &= ~(E1000_PBA_8K - 1);
  562. break;
  563. default:
  564. break;
  565. }
  566. /* if short on Rx space, Rx wins and must trump Tx
  567. * adjustment or use Early Receive if available
  568. */
  569. if (pba < min_rx_space)
  570. pba = min_rx_space;
  571. }
  572. }
  573. ew32(PBA, pba);
  574. /* flow control settings:
  575. * The high water mark must be low enough to fit one full frame
  576. * (or the size used for early receive) above it in the Rx FIFO.
  577. * Set it to the lower of:
  578. * - 90% of the Rx FIFO size, and
  579. * - the full Rx FIFO size minus the early receive size (for parts
  580. * with ERT support assuming ERT set to E1000_ERT_2048), or
  581. * - the full Rx FIFO size minus one full frame
  582. */
  583. hwm = min(((pba << 10) * 9 / 10),
  584. ((pba << 10) - hw->max_frame_size));
  585. hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
  586. hw->fc_low_water = hw->fc_high_water - 8;
  587. hw->fc_pause_time = E1000_FC_PAUSE_TIME;
  588. hw->fc_send_xon = 1;
  589. hw->fc = hw->original_fc;
  590. /* Allow time for pending master requests to run */
  591. e1000_reset_hw(hw);
  592. if (hw->mac_type >= e1000_82544)
  593. ew32(WUC, 0);
  594. if (e1000_init_hw(hw))
  595. e_dev_err("Hardware Error\n");
  596. e1000_update_mng_vlan(adapter);
  597. /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
  598. if (hw->mac_type >= e1000_82544 &&
  599. hw->autoneg == 1 &&
  600. hw->autoneg_advertised == ADVERTISE_1000_FULL) {
  601. u32 ctrl = er32(CTRL);
  602. /* clear phy power management bit if we are in gig only mode,
  603. * which if enabled will attempt negotiation to 100Mb, which
  604. * can cause a loss of link at power off or driver unload
  605. */
  606. ctrl &= ~E1000_CTRL_SWDPIN3;
  607. ew32(CTRL, ctrl);
  608. }
  609. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  610. ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
  611. e1000_reset_adaptive(hw);
  612. e1000_phy_get_info(hw, &adapter->phy_info);
  613. e1000_release_manageability(adapter);
  614. }
  615. /* Dump the eeprom for users having checksum issues */
  616. static void e1000_dump_eeprom(struct e1000_adapter *adapter)
  617. {
  618. struct net_device *netdev = adapter->netdev;
  619. struct ethtool_eeprom eeprom;
  620. const struct ethtool_ops *ops = netdev->ethtool_ops;
  621. u8 *data;
  622. int i;
  623. u16 csum_old, csum_new = 0;
  624. eeprom.len = ops->get_eeprom_len(netdev);
  625. eeprom.offset = 0;
  626. data = kmalloc(eeprom.len, GFP_KERNEL);
  627. if (!data)
  628. return;
  629. ops->get_eeprom(netdev, &eeprom, data);
  630. csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
  631. (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
  632. for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
  633. csum_new += data[i] + (data[i + 1] << 8);
  634. csum_new = EEPROM_SUM - csum_new;
  635. pr_err("/*********************/\n");
  636. pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
  637. pr_err("Calculated : 0x%04x\n", csum_new);
  638. pr_err("Offset Values\n");
  639. pr_err("======== ======\n");
  640. print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
  641. pr_err("Include this output when contacting your support provider.\n");
  642. pr_err("This is not a software error! Something bad happened to\n");
  643. pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
  644. pr_err("result in further problems, possibly loss of data,\n");
  645. pr_err("corruption or system hangs!\n");
  646. pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
  647. pr_err("which is invalid and requires you to set the proper MAC\n");
  648. pr_err("address manually before continuing to enable this network\n");
  649. pr_err("device. Please inspect the EEPROM dump and report the\n");
  650. pr_err("issue to your hardware vendor or Intel Customer Support.\n");
  651. pr_err("/*********************/\n");
  652. kfree(data);
  653. }
  654. /**
  655. * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
  656. * @pdev: PCI device information struct
  657. *
  658. * Return true if an adapter needs ioport resources
  659. **/
  660. static int e1000_is_need_ioport(struct pci_dev *pdev)
  661. {
  662. switch (pdev->device) {
  663. case E1000_DEV_ID_82540EM:
  664. case E1000_DEV_ID_82540EM_LOM:
  665. case E1000_DEV_ID_82540EP:
  666. case E1000_DEV_ID_82540EP_LOM:
  667. case E1000_DEV_ID_82540EP_LP:
  668. case E1000_DEV_ID_82541EI:
  669. case E1000_DEV_ID_82541EI_MOBILE:
  670. case E1000_DEV_ID_82541ER:
  671. case E1000_DEV_ID_82541ER_LOM:
  672. case E1000_DEV_ID_82541GI:
  673. case E1000_DEV_ID_82541GI_LF:
  674. case E1000_DEV_ID_82541GI_MOBILE:
  675. case E1000_DEV_ID_82544EI_COPPER:
  676. case E1000_DEV_ID_82544EI_FIBER:
  677. case E1000_DEV_ID_82544GC_COPPER:
  678. case E1000_DEV_ID_82544GC_LOM:
  679. case E1000_DEV_ID_82545EM_COPPER:
  680. case E1000_DEV_ID_82545EM_FIBER:
  681. case E1000_DEV_ID_82546EB_COPPER:
  682. case E1000_DEV_ID_82546EB_FIBER:
  683. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  684. return true;
  685. default:
  686. return false;
  687. }
  688. }
  689. static netdev_features_t e1000_fix_features(struct net_device *netdev,
  690. netdev_features_t features)
  691. {
  692. /* Since there is no support for separate Rx/Tx vlan accel
  693. * enable/disable make sure Tx flag is always in same state as Rx.
  694. */
  695. if (features & NETIF_F_HW_VLAN_CTAG_RX)
  696. features |= NETIF_F_HW_VLAN_CTAG_TX;
  697. else
  698. features &= ~NETIF_F_HW_VLAN_CTAG_TX;
  699. return features;
  700. }
  701. static int e1000_set_features(struct net_device *netdev,
  702. netdev_features_t features)
  703. {
  704. struct e1000_adapter *adapter = netdev_priv(netdev);
  705. netdev_features_t changed = features ^ netdev->features;
  706. if (changed & NETIF_F_HW_VLAN_CTAG_RX)
  707. e1000_vlan_mode(netdev, features);
  708. if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
  709. return 0;
  710. netdev->features = features;
  711. adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
  712. if (netif_running(netdev))
  713. e1000_reinit_locked(adapter);
  714. else
  715. e1000_reset(adapter);
  716. return 0;
  717. }
  718. static const struct net_device_ops e1000_netdev_ops = {
  719. .ndo_open = e1000_open,
  720. .ndo_stop = e1000_close,
  721. .ndo_start_xmit = e1000_xmit_frame,
  722. .ndo_set_rx_mode = e1000_set_rx_mode,
  723. .ndo_set_mac_address = e1000_set_mac,
  724. .ndo_tx_timeout = e1000_tx_timeout,
  725. .ndo_change_mtu = e1000_change_mtu,
  726. .ndo_do_ioctl = e1000_ioctl,
  727. .ndo_validate_addr = eth_validate_addr,
  728. .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
  729. .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
  730. #ifdef CONFIG_NET_POLL_CONTROLLER
  731. .ndo_poll_controller = e1000_netpoll,
  732. #endif
  733. .ndo_fix_features = e1000_fix_features,
  734. .ndo_set_features = e1000_set_features,
  735. };
  736. /**
  737. * e1000_init_hw_struct - initialize members of hw struct
  738. * @adapter: board private struct
  739. * @hw: structure used by e1000_hw.c
  740. *
  741. * Factors out initialization of the e1000_hw struct to its own function
  742. * that can be called very early at init (just after struct allocation).
  743. * Fields are initialized based on PCI device information and
  744. * OS network device settings (MTU size).
  745. * Returns negative error codes if MAC type setup fails.
  746. */
  747. static int e1000_init_hw_struct(struct e1000_adapter *adapter,
  748. struct e1000_hw *hw)
  749. {
  750. struct pci_dev *pdev = adapter->pdev;
  751. /* PCI config space info */
  752. hw->vendor_id = pdev->vendor;
  753. hw->device_id = pdev->device;
  754. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  755. hw->subsystem_id = pdev->subsystem_device;
  756. hw->revision_id = pdev->revision;
  757. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  758. hw->max_frame_size = adapter->netdev->mtu +
  759. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  760. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  761. /* identify the MAC */
  762. if (e1000_set_mac_type(hw)) {
  763. e_err(probe, "Unknown MAC Type\n");
  764. return -EIO;
  765. }
  766. switch (hw->mac_type) {
  767. default:
  768. break;
  769. case e1000_82541:
  770. case e1000_82547:
  771. case e1000_82541_rev_2:
  772. case e1000_82547_rev_2:
  773. hw->phy_init_script = 1;
  774. break;
  775. }
  776. e1000_set_media_type(hw);
  777. e1000_get_bus_info(hw);
  778. hw->wait_autoneg_complete = false;
  779. hw->tbi_compatibility_en = true;
  780. hw->adaptive_ifs = true;
  781. /* Copper options */
  782. if (hw->media_type == e1000_media_type_copper) {
  783. hw->mdix = AUTO_ALL_MODES;
  784. hw->disable_polarity_correction = false;
  785. hw->master_slave = E1000_MASTER_SLAVE;
  786. }
  787. return 0;
  788. }
  789. /**
  790. * e1000_probe - Device Initialization Routine
  791. * @pdev: PCI device information struct
  792. * @ent: entry in e1000_pci_tbl
  793. *
  794. * Returns 0 on success, negative on failure
  795. *
  796. * e1000_probe initializes an adapter identified by a pci_dev structure.
  797. * The OS initialization, configuring of the adapter private structure,
  798. * and a hardware reset occur.
  799. **/
  800. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  801. {
  802. struct net_device *netdev;
  803. struct e1000_adapter *adapter = NULL;
  804. struct e1000_hw *hw;
  805. static int cards_found;
  806. static int global_quad_port_a; /* global ksp3 port a indication */
  807. int i, err, pci_using_dac;
  808. u16 eeprom_data = 0;
  809. u16 tmp = 0;
  810. u16 eeprom_apme_mask = E1000_EEPROM_APME;
  811. int bars, need_ioport;
  812. bool disable_dev = false;
  813. /* do not allocate ioport bars when not needed */
  814. need_ioport = e1000_is_need_ioport(pdev);
  815. if (need_ioport) {
  816. bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
  817. err = pci_enable_device(pdev);
  818. } else {
  819. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  820. err = pci_enable_device_mem(pdev);
  821. }
  822. if (err)
  823. return err;
  824. err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
  825. if (err)
  826. goto err_pci_reg;
  827. pci_set_master(pdev);
  828. err = pci_save_state(pdev);
  829. if (err)
  830. goto err_alloc_etherdev;
  831. err = -ENOMEM;
  832. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  833. if (!netdev)
  834. goto err_alloc_etherdev;
  835. SET_NETDEV_DEV(netdev, &pdev->dev);
  836. pci_set_drvdata(pdev, netdev);
  837. adapter = netdev_priv(netdev);
  838. adapter->netdev = netdev;
  839. adapter->pdev = pdev;
  840. adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  841. adapter->bars = bars;
  842. adapter->need_ioport = need_ioport;
  843. hw = &adapter->hw;
  844. hw->back = adapter;
  845. err = -EIO;
  846. hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
  847. if (!hw->hw_addr)
  848. goto err_ioremap;
  849. if (adapter->need_ioport) {
  850. for (i = BAR_1; i <= BAR_5; i++) {
  851. if (pci_resource_len(pdev, i) == 0)
  852. continue;
  853. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  854. hw->io_base = pci_resource_start(pdev, i);
  855. break;
  856. }
  857. }
  858. }
  859. /* make ready for any if (hw->...) below */
  860. err = e1000_init_hw_struct(adapter, hw);
  861. if (err)
  862. goto err_sw_init;
  863. /* there is a workaround being applied below that limits
  864. * 64-bit DMA addresses to 64-bit hardware. There are some
  865. * 32-bit adapters that Tx hang when given 64-bit DMA addresses
  866. */
  867. pci_using_dac = 0;
  868. if ((hw->bus_type == e1000_bus_type_pcix) &&
  869. !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
  870. pci_using_dac = 1;
  871. } else {
  872. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  873. if (err) {
  874. pr_err("No usable DMA config, aborting\n");
  875. goto err_dma;
  876. }
  877. }
  878. netdev->netdev_ops = &e1000_netdev_ops;
  879. e1000_set_ethtool_ops(netdev);
  880. netdev->watchdog_timeo = 5 * HZ;
  881. netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
  882. strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
  883. adapter->bd_number = cards_found;
  884. /* setup the private structure */
  885. err = e1000_sw_init(adapter);
  886. if (err)
  887. goto err_sw_init;
  888. err = -EIO;
  889. if (hw->mac_type == e1000_ce4100) {
  890. hw->ce4100_gbe_mdio_base_virt =
  891. ioremap(pci_resource_start(pdev, BAR_1),
  892. pci_resource_len(pdev, BAR_1));
  893. if (!hw->ce4100_gbe_mdio_base_virt)
  894. goto err_mdio_ioremap;
  895. }
  896. if (hw->mac_type >= e1000_82543) {
  897. netdev->hw_features = NETIF_F_SG |
  898. NETIF_F_HW_CSUM |
  899. NETIF_F_HW_VLAN_CTAG_RX;
  900. netdev->features = NETIF_F_HW_VLAN_CTAG_TX |
  901. NETIF_F_HW_VLAN_CTAG_FILTER;
  902. }
  903. if ((hw->mac_type >= e1000_82544) &&
  904. (hw->mac_type != e1000_82547))
  905. netdev->hw_features |= NETIF_F_TSO;
  906. netdev->priv_flags |= IFF_SUPP_NOFCS;
  907. netdev->features |= netdev->hw_features;
  908. netdev->hw_features |= (NETIF_F_RXCSUM |
  909. NETIF_F_RXALL |
  910. NETIF_F_RXFCS);
  911. if (pci_using_dac) {
  912. netdev->features |= NETIF_F_HIGHDMA;
  913. netdev->vlan_features |= NETIF_F_HIGHDMA;
  914. }
  915. netdev->vlan_features |= (NETIF_F_TSO |
  916. NETIF_F_HW_CSUM |
  917. NETIF_F_SG);
  918. /* Do not set IFF_UNICAST_FLT for VMWare's 82545EM */
  919. if (hw->device_id != E1000_DEV_ID_82545EM_COPPER ||
  920. hw->subsystem_vendor_id != PCI_VENDOR_ID_VMWARE)
  921. netdev->priv_flags |= IFF_UNICAST_FLT;
  922. /* MTU range: 46 - 16110 */
  923. netdev->min_mtu = ETH_ZLEN - ETH_HLEN;
  924. netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
  925. adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
  926. /* initialize eeprom parameters */
  927. if (e1000_init_eeprom_params(hw)) {
  928. e_err(probe, "EEPROM initialization failed\n");
  929. goto err_eeprom;
  930. }
  931. /* before reading the EEPROM, reset the controller to
  932. * put the device in a known good starting state
  933. */
  934. e1000_reset_hw(hw);
  935. /* make sure the EEPROM is good */
  936. if (e1000_validate_eeprom_checksum(hw) < 0) {
  937. e_err(probe, "The EEPROM Checksum Is Not Valid\n");
  938. e1000_dump_eeprom(adapter);
  939. /* set MAC address to all zeroes to invalidate and temporary
  940. * disable this device for the user. This blocks regular
  941. * traffic while still permitting ethtool ioctls from reaching
  942. * the hardware as well as allowing the user to run the
  943. * interface after manually setting a hw addr using
  944. * `ip set address`
  945. */
  946. memset(hw->mac_addr, 0, netdev->addr_len);
  947. } else {
  948. /* copy the MAC address out of the EEPROM */
  949. if (e1000_read_mac_addr(hw))
  950. e_err(probe, "EEPROM Read Error\n");
  951. }
  952. /* don't block initialization here due to bad MAC address */
  953. memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
  954. if (!is_valid_ether_addr(netdev->dev_addr))
  955. e_err(probe, "Invalid MAC Address\n");
  956. INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
  957. INIT_DELAYED_WORK(&adapter->fifo_stall_task,
  958. e1000_82547_tx_fifo_stall_task);
  959. INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
  960. INIT_WORK(&adapter->reset_task, e1000_reset_task);
  961. e1000_check_options(adapter);
  962. /* Initial Wake on LAN setting
  963. * If APM wake is enabled in the EEPROM,
  964. * enable the ACPI Magic Packet filter
  965. */
  966. switch (hw->mac_type) {
  967. case e1000_82542_rev2_0:
  968. case e1000_82542_rev2_1:
  969. case e1000_82543:
  970. break;
  971. case e1000_82544:
  972. e1000_read_eeprom(hw,
  973. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  974. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  975. break;
  976. case e1000_82546:
  977. case e1000_82546_rev_3:
  978. if (er32(STATUS) & E1000_STATUS_FUNC_1) {
  979. e1000_read_eeprom(hw,
  980. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  981. break;
  982. }
  983. /* Fall Through */
  984. default:
  985. e1000_read_eeprom(hw,
  986. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  987. break;
  988. }
  989. if (eeprom_data & eeprom_apme_mask)
  990. adapter->eeprom_wol |= E1000_WUFC_MAG;
  991. /* now that we have the eeprom settings, apply the special cases
  992. * where the eeprom may be wrong or the board simply won't support
  993. * wake on lan on a particular port
  994. */
  995. switch (pdev->device) {
  996. case E1000_DEV_ID_82546GB_PCIE:
  997. adapter->eeprom_wol = 0;
  998. break;
  999. case E1000_DEV_ID_82546EB_FIBER:
  1000. case E1000_DEV_ID_82546GB_FIBER:
  1001. /* Wake events only supported on port A for dual fiber
  1002. * regardless of eeprom setting
  1003. */
  1004. if (er32(STATUS) & E1000_STATUS_FUNC_1)
  1005. adapter->eeprom_wol = 0;
  1006. break;
  1007. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1008. /* if quad port adapter, disable WoL on all but port A */
  1009. if (global_quad_port_a != 0)
  1010. adapter->eeprom_wol = 0;
  1011. else
  1012. adapter->quad_port_a = true;
  1013. /* Reset for multiple quad port adapters */
  1014. if (++global_quad_port_a == 4)
  1015. global_quad_port_a = 0;
  1016. break;
  1017. }
  1018. /* initialize the wol settings based on the eeprom settings */
  1019. adapter->wol = adapter->eeprom_wol;
  1020. device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
  1021. /* Auto detect PHY address */
  1022. if (hw->mac_type == e1000_ce4100) {
  1023. for (i = 0; i < 32; i++) {
  1024. hw->phy_addr = i;
  1025. e1000_read_phy_reg(hw, PHY_ID2, &tmp);
  1026. if (tmp != 0 && tmp != 0xFF)
  1027. break;
  1028. }
  1029. if (i >= 32)
  1030. goto err_eeprom;
  1031. }
  1032. /* reset the hardware with the new settings */
  1033. e1000_reset(adapter);
  1034. strcpy(netdev->name, "eth%d");
  1035. err = register_netdev(netdev);
  1036. if (err)
  1037. goto err_register;
  1038. e1000_vlan_filter_on_off(adapter, false);
  1039. /* print bus type/speed/width info */
  1040. e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
  1041. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
  1042. ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
  1043. (hw->bus_speed == e1000_bus_speed_120) ? 120 :
  1044. (hw->bus_speed == e1000_bus_speed_100) ? 100 :
  1045. (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
  1046. ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
  1047. netdev->dev_addr);
  1048. /* carrier off reporting is important to ethtool even BEFORE open */
  1049. netif_carrier_off(netdev);
  1050. e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
  1051. cards_found++;
  1052. return 0;
  1053. err_register:
  1054. err_eeprom:
  1055. e1000_phy_hw_reset(hw);
  1056. if (hw->flash_address)
  1057. iounmap(hw->flash_address);
  1058. kfree(adapter->tx_ring);
  1059. kfree(adapter->rx_ring);
  1060. err_dma:
  1061. err_sw_init:
  1062. err_mdio_ioremap:
  1063. iounmap(hw->ce4100_gbe_mdio_base_virt);
  1064. iounmap(hw->hw_addr);
  1065. err_ioremap:
  1066. disable_dev = !test_and_set_bit(__E1000_DISABLED, &adapter->flags);
  1067. free_netdev(netdev);
  1068. err_alloc_etherdev:
  1069. pci_release_selected_regions(pdev, bars);
  1070. err_pci_reg:
  1071. if (!adapter || disable_dev)
  1072. pci_disable_device(pdev);
  1073. return err;
  1074. }
  1075. /**
  1076. * e1000_remove - Device Removal Routine
  1077. * @pdev: PCI device information struct
  1078. *
  1079. * e1000_remove is called by the PCI subsystem to alert the driver
  1080. * that it should release a PCI device. That could be caused by a
  1081. * Hot-Plug event, or because the driver is going to be removed from
  1082. * memory.
  1083. **/
  1084. static void e1000_remove(struct pci_dev *pdev)
  1085. {
  1086. struct net_device *netdev = pci_get_drvdata(pdev);
  1087. struct e1000_adapter *adapter = netdev_priv(netdev);
  1088. struct e1000_hw *hw = &adapter->hw;
  1089. bool disable_dev;
  1090. e1000_down_and_stop(adapter);
  1091. e1000_release_manageability(adapter);
  1092. unregister_netdev(netdev);
  1093. e1000_phy_hw_reset(hw);
  1094. kfree(adapter->tx_ring);
  1095. kfree(adapter->rx_ring);
  1096. if (hw->mac_type == e1000_ce4100)
  1097. iounmap(hw->ce4100_gbe_mdio_base_virt);
  1098. iounmap(hw->hw_addr);
  1099. if (hw->flash_address)
  1100. iounmap(hw->flash_address);
  1101. pci_release_selected_regions(pdev, adapter->bars);
  1102. disable_dev = !test_and_set_bit(__E1000_DISABLED, &adapter->flags);
  1103. free_netdev(netdev);
  1104. if (disable_dev)
  1105. pci_disable_device(pdev);
  1106. }
  1107. /**
  1108. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  1109. * @adapter: board private structure to initialize
  1110. *
  1111. * e1000_sw_init initializes the Adapter private data structure.
  1112. * e1000_init_hw_struct MUST be called before this function
  1113. **/
  1114. static int e1000_sw_init(struct e1000_adapter *adapter)
  1115. {
  1116. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  1117. adapter->num_tx_queues = 1;
  1118. adapter->num_rx_queues = 1;
  1119. if (e1000_alloc_queues(adapter)) {
  1120. e_err(probe, "Unable to allocate memory for queues\n");
  1121. return -ENOMEM;
  1122. }
  1123. /* Explicitly disable IRQ since the NIC can be in any state. */
  1124. e1000_irq_disable(adapter);
  1125. spin_lock_init(&adapter->stats_lock);
  1126. set_bit(__E1000_DOWN, &adapter->flags);
  1127. return 0;
  1128. }
  1129. /**
  1130. * e1000_alloc_queues - Allocate memory for all rings
  1131. * @adapter: board private structure to initialize
  1132. *
  1133. * We allocate one ring per queue at run-time since we don't know the
  1134. * number of queues at compile-time.
  1135. **/
  1136. static int e1000_alloc_queues(struct e1000_adapter *adapter)
  1137. {
  1138. adapter->tx_ring = kcalloc(adapter->num_tx_queues,
  1139. sizeof(struct e1000_tx_ring), GFP_KERNEL);
  1140. if (!adapter->tx_ring)
  1141. return -ENOMEM;
  1142. adapter->rx_ring = kcalloc(adapter->num_rx_queues,
  1143. sizeof(struct e1000_rx_ring), GFP_KERNEL);
  1144. if (!adapter->rx_ring) {
  1145. kfree(adapter->tx_ring);
  1146. return -ENOMEM;
  1147. }
  1148. return E1000_SUCCESS;
  1149. }
  1150. /**
  1151. * e1000_open - Called when a network interface is made active
  1152. * @netdev: network interface device structure
  1153. *
  1154. * Returns 0 on success, negative value on failure
  1155. *
  1156. * The open entry point is called when a network interface is made
  1157. * active by the system (IFF_UP). At this point all resources needed
  1158. * for transmit and receive operations are allocated, the interrupt
  1159. * handler is registered with the OS, the watchdog task is started,
  1160. * and the stack is notified that the interface is ready.
  1161. **/
  1162. int e1000_open(struct net_device *netdev)
  1163. {
  1164. struct e1000_adapter *adapter = netdev_priv(netdev);
  1165. struct e1000_hw *hw = &adapter->hw;
  1166. int err;
  1167. /* disallow open during test */
  1168. if (test_bit(__E1000_TESTING, &adapter->flags))
  1169. return -EBUSY;
  1170. netif_carrier_off(netdev);
  1171. /* allocate transmit descriptors */
  1172. err = e1000_setup_all_tx_resources(adapter);
  1173. if (err)
  1174. goto err_setup_tx;
  1175. /* allocate receive descriptors */
  1176. err = e1000_setup_all_rx_resources(adapter);
  1177. if (err)
  1178. goto err_setup_rx;
  1179. e1000_power_up_phy(adapter);
  1180. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1181. if ((hw->mng_cookie.status &
  1182. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1183. e1000_update_mng_vlan(adapter);
  1184. }
  1185. /* before we allocate an interrupt, we must be ready to handle it.
  1186. * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
  1187. * as soon as we call pci_request_irq, so we have to setup our
  1188. * clean_rx handler before we do so.
  1189. */
  1190. e1000_configure(adapter);
  1191. err = e1000_request_irq(adapter);
  1192. if (err)
  1193. goto err_req_irq;
  1194. /* From here on the code is the same as e1000_up() */
  1195. clear_bit(__E1000_DOWN, &adapter->flags);
  1196. napi_enable(&adapter->napi);
  1197. e1000_irq_enable(adapter);
  1198. netif_start_queue(netdev);
  1199. /* fire a link status change interrupt to start the watchdog */
  1200. ew32(ICS, E1000_ICS_LSC);
  1201. return E1000_SUCCESS;
  1202. err_req_irq:
  1203. e1000_power_down_phy(adapter);
  1204. e1000_free_all_rx_resources(adapter);
  1205. err_setup_rx:
  1206. e1000_free_all_tx_resources(adapter);
  1207. err_setup_tx:
  1208. e1000_reset(adapter);
  1209. return err;
  1210. }
  1211. /**
  1212. * e1000_close - Disables a network interface
  1213. * @netdev: network interface device structure
  1214. *
  1215. * Returns 0, this is not allowed to fail
  1216. *
  1217. * The close entry point is called when an interface is de-activated
  1218. * by the OS. The hardware is still under the drivers control, but
  1219. * needs to be disabled. A global MAC reset is issued to stop the
  1220. * hardware, and all transmit and receive resources are freed.
  1221. **/
  1222. int e1000_close(struct net_device *netdev)
  1223. {
  1224. struct e1000_adapter *adapter = netdev_priv(netdev);
  1225. struct e1000_hw *hw = &adapter->hw;
  1226. int count = E1000_CHECK_RESET_COUNT;
  1227. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags) && count--)
  1228. usleep_range(10000, 20000);
  1229. WARN_ON(count < 0);
  1230. /* signal that we're down so that the reset task will no longer run */
  1231. set_bit(__E1000_DOWN, &adapter->flags);
  1232. clear_bit(__E1000_RESETTING, &adapter->flags);
  1233. e1000_down(adapter);
  1234. e1000_power_down_phy(adapter);
  1235. e1000_free_irq(adapter);
  1236. e1000_free_all_tx_resources(adapter);
  1237. e1000_free_all_rx_resources(adapter);
  1238. /* kill manageability vlan ID if supported, but not if a vlan with
  1239. * the same ID is registered on the host OS (let 8021q kill it)
  1240. */
  1241. if ((hw->mng_cookie.status &
  1242. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  1243. !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
  1244. e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
  1245. adapter->mng_vlan_id);
  1246. }
  1247. return 0;
  1248. }
  1249. /**
  1250. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1251. * @adapter: address of board private structure
  1252. * @start: address of beginning of memory
  1253. * @len: length of memory
  1254. **/
  1255. static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
  1256. unsigned long len)
  1257. {
  1258. struct e1000_hw *hw = &adapter->hw;
  1259. unsigned long begin = (unsigned long)start;
  1260. unsigned long end = begin + len;
  1261. /* First rev 82545 and 82546 need to not allow any memory
  1262. * write location to cross 64k boundary due to errata 23
  1263. */
  1264. if (hw->mac_type == e1000_82545 ||
  1265. hw->mac_type == e1000_ce4100 ||
  1266. hw->mac_type == e1000_82546) {
  1267. return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
  1268. }
  1269. return true;
  1270. }
  1271. /**
  1272. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1273. * @adapter: board private structure
  1274. * @txdr: tx descriptor ring (for a specific queue) to setup
  1275. *
  1276. * Return 0 on success, negative on failure
  1277. **/
  1278. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1279. struct e1000_tx_ring *txdr)
  1280. {
  1281. struct pci_dev *pdev = adapter->pdev;
  1282. int size;
  1283. size = sizeof(struct e1000_tx_buffer) * txdr->count;
  1284. txdr->buffer_info = vzalloc(size);
  1285. if (!txdr->buffer_info)
  1286. return -ENOMEM;
  1287. /* round up to nearest 4K */
  1288. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1289. txdr->size = ALIGN(txdr->size, 4096);
  1290. txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
  1291. GFP_KERNEL);
  1292. if (!txdr->desc) {
  1293. setup_tx_desc_die:
  1294. vfree(txdr->buffer_info);
  1295. return -ENOMEM;
  1296. }
  1297. /* Fix for errata 23, can't cross 64kB boundary */
  1298. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1299. void *olddesc = txdr->desc;
  1300. dma_addr_t olddma = txdr->dma;
  1301. e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
  1302. txdr->size, txdr->desc);
  1303. /* Try again, without freeing the previous */
  1304. txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
  1305. &txdr->dma, GFP_KERNEL);
  1306. /* Failed allocation, critical failure */
  1307. if (!txdr->desc) {
  1308. dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  1309. olddma);
  1310. goto setup_tx_desc_die;
  1311. }
  1312. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1313. /* give up */
  1314. dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
  1315. txdr->dma);
  1316. dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  1317. olddma);
  1318. e_err(probe, "Unable to allocate aligned memory "
  1319. "for the transmit descriptor ring\n");
  1320. vfree(txdr->buffer_info);
  1321. return -ENOMEM;
  1322. } else {
  1323. /* Free old allocation, new allocation was successful */
  1324. dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  1325. olddma);
  1326. }
  1327. }
  1328. memset(txdr->desc, 0, txdr->size);
  1329. txdr->next_to_use = 0;
  1330. txdr->next_to_clean = 0;
  1331. return 0;
  1332. }
  1333. /**
  1334. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1335. * (Descriptors) for all queues
  1336. * @adapter: board private structure
  1337. *
  1338. * Return 0 on success, negative on failure
  1339. **/
  1340. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1341. {
  1342. int i, err = 0;
  1343. for (i = 0; i < adapter->num_tx_queues; i++) {
  1344. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1345. if (err) {
  1346. e_err(probe, "Allocation for Tx Queue %u failed\n", i);
  1347. for (i-- ; i >= 0; i--)
  1348. e1000_free_tx_resources(adapter,
  1349. &adapter->tx_ring[i]);
  1350. break;
  1351. }
  1352. }
  1353. return err;
  1354. }
  1355. /**
  1356. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1357. * @adapter: board private structure
  1358. *
  1359. * Configure the Tx unit of the MAC after a reset.
  1360. **/
  1361. static void e1000_configure_tx(struct e1000_adapter *adapter)
  1362. {
  1363. u64 tdba;
  1364. struct e1000_hw *hw = &adapter->hw;
  1365. u32 tdlen, tctl, tipg;
  1366. u32 ipgr1, ipgr2;
  1367. /* Setup the HW Tx Head and Tail descriptor pointers */
  1368. switch (adapter->num_tx_queues) {
  1369. case 1:
  1370. default:
  1371. tdba = adapter->tx_ring[0].dma;
  1372. tdlen = adapter->tx_ring[0].count *
  1373. sizeof(struct e1000_tx_desc);
  1374. ew32(TDLEN, tdlen);
  1375. ew32(TDBAH, (tdba >> 32));
  1376. ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
  1377. ew32(TDT, 0);
  1378. ew32(TDH, 0);
  1379. adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ?
  1380. E1000_TDH : E1000_82542_TDH);
  1381. adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ?
  1382. E1000_TDT : E1000_82542_TDT);
  1383. break;
  1384. }
  1385. /* Set the default values for the Tx Inter Packet Gap timer */
  1386. if ((hw->media_type == e1000_media_type_fiber ||
  1387. hw->media_type == e1000_media_type_internal_serdes))
  1388. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1389. else
  1390. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1391. switch (hw->mac_type) {
  1392. case e1000_82542_rev2_0:
  1393. case e1000_82542_rev2_1:
  1394. tipg = DEFAULT_82542_TIPG_IPGT;
  1395. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1396. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1397. break;
  1398. default:
  1399. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1400. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1401. break;
  1402. }
  1403. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1404. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1405. ew32(TIPG, tipg);
  1406. /* Set the Tx Interrupt Delay register */
  1407. ew32(TIDV, adapter->tx_int_delay);
  1408. if (hw->mac_type >= e1000_82540)
  1409. ew32(TADV, adapter->tx_abs_int_delay);
  1410. /* Program the Transmit Control Register */
  1411. tctl = er32(TCTL);
  1412. tctl &= ~E1000_TCTL_CT;
  1413. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1414. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1415. e1000_config_collision_dist(hw);
  1416. /* Setup Transmit Descriptor Settings for eop descriptor */
  1417. adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
  1418. /* only set IDE if we are delaying interrupts using the timers */
  1419. if (adapter->tx_int_delay)
  1420. adapter->txd_cmd |= E1000_TXD_CMD_IDE;
  1421. if (hw->mac_type < e1000_82543)
  1422. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1423. else
  1424. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1425. /* Cache if we're 82544 running in PCI-X because we'll
  1426. * need this to apply a workaround later in the send path.
  1427. */
  1428. if (hw->mac_type == e1000_82544 &&
  1429. hw->bus_type == e1000_bus_type_pcix)
  1430. adapter->pcix_82544 = true;
  1431. ew32(TCTL, tctl);
  1432. }
  1433. /**
  1434. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1435. * @adapter: board private structure
  1436. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1437. *
  1438. * Returns 0 on success, negative on failure
  1439. **/
  1440. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1441. struct e1000_rx_ring *rxdr)
  1442. {
  1443. struct pci_dev *pdev = adapter->pdev;
  1444. int size, desc_len;
  1445. size = sizeof(struct e1000_rx_buffer) * rxdr->count;
  1446. rxdr->buffer_info = vzalloc(size);
  1447. if (!rxdr->buffer_info)
  1448. return -ENOMEM;
  1449. desc_len = sizeof(struct e1000_rx_desc);
  1450. /* Round up to nearest 4K */
  1451. rxdr->size = rxdr->count * desc_len;
  1452. rxdr->size = ALIGN(rxdr->size, 4096);
  1453. rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
  1454. GFP_KERNEL);
  1455. if (!rxdr->desc) {
  1456. setup_rx_desc_die:
  1457. vfree(rxdr->buffer_info);
  1458. return -ENOMEM;
  1459. }
  1460. /* Fix for errata 23, can't cross 64kB boundary */
  1461. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1462. void *olddesc = rxdr->desc;
  1463. dma_addr_t olddma = rxdr->dma;
  1464. e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
  1465. rxdr->size, rxdr->desc);
  1466. /* Try again, without freeing the previous */
  1467. rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
  1468. &rxdr->dma, GFP_KERNEL);
  1469. /* Failed allocation, critical failure */
  1470. if (!rxdr->desc) {
  1471. dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
  1472. olddma);
  1473. goto setup_rx_desc_die;
  1474. }
  1475. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1476. /* give up */
  1477. dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
  1478. rxdr->dma);
  1479. dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
  1480. olddma);
  1481. e_err(probe, "Unable to allocate aligned memory for "
  1482. "the Rx descriptor ring\n");
  1483. goto setup_rx_desc_die;
  1484. } else {
  1485. /* Free old allocation, new allocation was successful */
  1486. dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
  1487. olddma);
  1488. }
  1489. }
  1490. memset(rxdr->desc, 0, rxdr->size);
  1491. rxdr->next_to_clean = 0;
  1492. rxdr->next_to_use = 0;
  1493. rxdr->rx_skb_top = NULL;
  1494. return 0;
  1495. }
  1496. /**
  1497. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1498. * (Descriptors) for all queues
  1499. * @adapter: board private structure
  1500. *
  1501. * Return 0 on success, negative on failure
  1502. **/
  1503. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1504. {
  1505. int i, err = 0;
  1506. for (i = 0; i < adapter->num_rx_queues; i++) {
  1507. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1508. if (err) {
  1509. e_err(probe, "Allocation for Rx Queue %u failed\n", i);
  1510. for (i-- ; i >= 0; i--)
  1511. e1000_free_rx_resources(adapter,
  1512. &adapter->rx_ring[i]);
  1513. break;
  1514. }
  1515. }
  1516. return err;
  1517. }
  1518. /**
  1519. * e1000_setup_rctl - configure the receive control registers
  1520. * @adapter: Board private structure
  1521. **/
  1522. static void e1000_setup_rctl(struct e1000_adapter *adapter)
  1523. {
  1524. struct e1000_hw *hw = &adapter->hw;
  1525. u32 rctl;
  1526. rctl = er32(RCTL);
  1527. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1528. rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
  1529. E1000_RCTL_RDMTS_HALF |
  1530. (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
  1531. if (hw->tbi_compatibility_on == 1)
  1532. rctl |= E1000_RCTL_SBP;
  1533. else
  1534. rctl &= ~E1000_RCTL_SBP;
  1535. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1536. rctl &= ~E1000_RCTL_LPE;
  1537. else
  1538. rctl |= E1000_RCTL_LPE;
  1539. /* Setup buffer sizes */
  1540. rctl &= ~E1000_RCTL_SZ_4096;
  1541. rctl |= E1000_RCTL_BSEX;
  1542. switch (adapter->rx_buffer_len) {
  1543. case E1000_RXBUFFER_2048:
  1544. default:
  1545. rctl |= E1000_RCTL_SZ_2048;
  1546. rctl &= ~E1000_RCTL_BSEX;
  1547. break;
  1548. case E1000_RXBUFFER_4096:
  1549. rctl |= E1000_RCTL_SZ_4096;
  1550. break;
  1551. case E1000_RXBUFFER_8192:
  1552. rctl |= E1000_RCTL_SZ_8192;
  1553. break;
  1554. case E1000_RXBUFFER_16384:
  1555. rctl |= E1000_RCTL_SZ_16384;
  1556. break;
  1557. }
  1558. /* This is useful for sniffing bad packets. */
  1559. if (adapter->netdev->features & NETIF_F_RXALL) {
  1560. /* UPE and MPE will be handled by normal PROMISC logic
  1561. * in e1000e_set_rx_mode
  1562. */
  1563. rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
  1564. E1000_RCTL_BAM | /* RX All Bcast Pkts */
  1565. E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
  1566. rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
  1567. E1000_RCTL_DPF | /* Allow filtered pause */
  1568. E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
  1569. /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
  1570. * and that breaks VLANs.
  1571. */
  1572. }
  1573. ew32(RCTL, rctl);
  1574. }
  1575. /**
  1576. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1577. * @adapter: board private structure
  1578. *
  1579. * Configure the Rx unit of the MAC after a reset.
  1580. **/
  1581. static void e1000_configure_rx(struct e1000_adapter *adapter)
  1582. {
  1583. u64 rdba;
  1584. struct e1000_hw *hw = &adapter->hw;
  1585. u32 rdlen, rctl, rxcsum;
  1586. if (adapter->netdev->mtu > ETH_DATA_LEN) {
  1587. rdlen = adapter->rx_ring[0].count *
  1588. sizeof(struct e1000_rx_desc);
  1589. adapter->clean_rx = e1000_clean_jumbo_rx_irq;
  1590. adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
  1591. } else {
  1592. rdlen = adapter->rx_ring[0].count *
  1593. sizeof(struct e1000_rx_desc);
  1594. adapter->clean_rx = e1000_clean_rx_irq;
  1595. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1596. }
  1597. /* disable receives while setting up the descriptors */
  1598. rctl = er32(RCTL);
  1599. ew32(RCTL, rctl & ~E1000_RCTL_EN);
  1600. /* set the Receive Delay Timer Register */
  1601. ew32(RDTR, adapter->rx_int_delay);
  1602. if (hw->mac_type >= e1000_82540) {
  1603. ew32(RADV, adapter->rx_abs_int_delay);
  1604. if (adapter->itr_setting != 0)
  1605. ew32(ITR, 1000000000 / (adapter->itr * 256));
  1606. }
  1607. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1608. * the Base and Length of the Rx Descriptor Ring
  1609. */
  1610. switch (adapter->num_rx_queues) {
  1611. case 1:
  1612. default:
  1613. rdba = adapter->rx_ring[0].dma;
  1614. ew32(RDLEN, rdlen);
  1615. ew32(RDBAH, (rdba >> 32));
  1616. ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
  1617. ew32(RDT, 0);
  1618. ew32(RDH, 0);
  1619. adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ?
  1620. E1000_RDH : E1000_82542_RDH);
  1621. adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ?
  1622. E1000_RDT : E1000_82542_RDT);
  1623. break;
  1624. }
  1625. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1626. if (hw->mac_type >= e1000_82543) {
  1627. rxcsum = er32(RXCSUM);
  1628. if (adapter->rx_csum)
  1629. rxcsum |= E1000_RXCSUM_TUOFL;
  1630. else
  1631. /* don't need to clear IPPCSE as it defaults to 0 */
  1632. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1633. ew32(RXCSUM, rxcsum);
  1634. }
  1635. /* Enable Receives */
  1636. ew32(RCTL, rctl | E1000_RCTL_EN);
  1637. }
  1638. /**
  1639. * e1000_free_tx_resources - Free Tx Resources per Queue
  1640. * @adapter: board private structure
  1641. * @tx_ring: Tx descriptor ring for a specific queue
  1642. *
  1643. * Free all transmit software resources
  1644. **/
  1645. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  1646. struct e1000_tx_ring *tx_ring)
  1647. {
  1648. struct pci_dev *pdev = adapter->pdev;
  1649. e1000_clean_tx_ring(adapter, tx_ring);
  1650. vfree(tx_ring->buffer_info);
  1651. tx_ring->buffer_info = NULL;
  1652. dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
  1653. tx_ring->dma);
  1654. tx_ring->desc = NULL;
  1655. }
  1656. /**
  1657. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1658. * @adapter: board private structure
  1659. *
  1660. * Free all transmit software resources
  1661. **/
  1662. void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1663. {
  1664. int i;
  1665. for (i = 0; i < adapter->num_tx_queues; i++)
  1666. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1667. }
  1668. static void
  1669. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1670. struct e1000_tx_buffer *buffer_info)
  1671. {
  1672. if (buffer_info->dma) {
  1673. if (buffer_info->mapped_as_page)
  1674. dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
  1675. buffer_info->length, DMA_TO_DEVICE);
  1676. else
  1677. dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
  1678. buffer_info->length,
  1679. DMA_TO_DEVICE);
  1680. buffer_info->dma = 0;
  1681. }
  1682. if (buffer_info->skb) {
  1683. dev_kfree_skb_any(buffer_info->skb);
  1684. buffer_info->skb = NULL;
  1685. }
  1686. buffer_info->time_stamp = 0;
  1687. /* buffer_info must be completely set up in the transmit path */
  1688. }
  1689. /**
  1690. * e1000_clean_tx_ring - Free Tx Buffers
  1691. * @adapter: board private structure
  1692. * @tx_ring: ring to be cleaned
  1693. **/
  1694. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1695. struct e1000_tx_ring *tx_ring)
  1696. {
  1697. struct e1000_hw *hw = &adapter->hw;
  1698. struct e1000_tx_buffer *buffer_info;
  1699. unsigned long size;
  1700. unsigned int i;
  1701. /* Free all the Tx ring sk_buffs */
  1702. for (i = 0; i < tx_ring->count; i++) {
  1703. buffer_info = &tx_ring->buffer_info[i];
  1704. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1705. }
  1706. netdev_reset_queue(adapter->netdev);
  1707. size = sizeof(struct e1000_tx_buffer) * tx_ring->count;
  1708. memset(tx_ring->buffer_info, 0, size);
  1709. /* Zero out the descriptor ring */
  1710. memset(tx_ring->desc, 0, tx_ring->size);
  1711. tx_ring->next_to_use = 0;
  1712. tx_ring->next_to_clean = 0;
  1713. tx_ring->last_tx_tso = false;
  1714. writel(0, hw->hw_addr + tx_ring->tdh);
  1715. writel(0, hw->hw_addr + tx_ring->tdt);
  1716. }
  1717. /**
  1718. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1719. * @adapter: board private structure
  1720. **/
  1721. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1722. {
  1723. int i;
  1724. for (i = 0; i < adapter->num_tx_queues; i++)
  1725. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1726. }
  1727. /**
  1728. * e1000_free_rx_resources - Free Rx Resources
  1729. * @adapter: board private structure
  1730. * @rx_ring: ring to clean the resources from
  1731. *
  1732. * Free all receive software resources
  1733. **/
  1734. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  1735. struct e1000_rx_ring *rx_ring)
  1736. {
  1737. struct pci_dev *pdev = adapter->pdev;
  1738. e1000_clean_rx_ring(adapter, rx_ring);
  1739. vfree(rx_ring->buffer_info);
  1740. rx_ring->buffer_info = NULL;
  1741. dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
  1742. rx_ring->dma);
  1743. rx_ring->desc = NULL;
  1744. }
  1745. /**
  1746. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1747. * @adapter: board private structure
  1748. *
  1749. * Free all receive software resources
  1750. **/
  1751. void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1752. {
  1753. int i;
  1754. for (i = 0; i < adapter->num_rx_queues; i++)
  1755. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1756. }
  1757. #define E1000_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
  1758. static unsigned int e1000_frag_len(const struct e1000_adapter *a)
  1759. {
  1760. return SKB_DATA_ALIGN(a->rx_buffer_len + E1000_HEADROOM) +
  1761. SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
  1762. }
  1763. static void *e1000_alloc_frag(const struct e1000_adapter *a)
  1764. {
  1765. unsigned int len = e1000_frag_len(a);
  1766. u8 *data = netdev_alloc_frag(len);
  1767. if (likely(data))
  1768. data += E1000_HEADROOM;
  1769. return data;
  1770. }
  1771. /**
  1772. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1773. * @adapter: board private structure
  1774. * @rx_ring: ring to free buffers from
  1775. **/
  1776. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1777. struct e1000_rx_ring *rx_ring)
  1778. {
  1779. struct e1000_hw *hw = &adapter->hw;
  1780. struct e1000_rx_buffer *buffer_info;
  1781. struct pci_dev *pdev = adapter->pdev;
  1782. unsigned long size;
  1783. unsigned int i;
  1784. /* Free all the Rx netfrags */
  1785. for (i = 0; i < rx_ring->count; i++) {
  1786. buffer_info = &rx_ring->buffer_info[i];
  1787. if (adapter->clean_rx == e1000_clean_rx_irq) {
  1788. if (buffer_info->dma)
  1789. dma_unmap_single(&pdev->dev, buffer_info->dma,
  1790. adapter->rx_buffer_len,
  1791. DMA_FROM_DEVICE);
  1792. if (buffer_info->rxbuf.data) {
  1793. skb_free_frag(buffer_info->rxbuf.data);
  1794. buffer_info->rxbuf.data = NULL;
  1795. }
  1796. } else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
  1797. if (buffer_info->dma)
  1798. dma_unmap_page(&pdev->dev, buffer_info->dma,
  1799. adapter->rx_buffer_len,
  1800. DMA_FROM_DEVICE);
  1801. if (buffer_info->rxbuf.page) {
  1802. put_page(buffer_info->rxbuf.page);
  1803. buffer_info->rxbuf.page = NULL;
  1804. }
  1805. }
  1806. buffer_info->dma = 0;
  1807. }
  1808. /* there also may be some cached data from a chained receive */
  1809. napi_free_frags(&adapter->napi);
  1810. rx_ring->rx_skb_top = NULL;
  1811. size = sizeof(struct e1000_rx_buffer) * rx_ring->count;
  1812. memset(rx_ring->buffer_info, 0, size);
  1813. /* Zero out the descriptor ring */
  1814. memset(rx_ring->desc, 0, rx_ring->size);
  1815. rx_ring->next_to_clean = 0;
  1816. rx_ring->next_to_use = 0;
  1817. writel(0, hw->hw_addr + rx_ring->rdh);
  1818. writel(0, hw->hw_addr + rx_ring->rdt);
  1819. }
  1820. /**
  1821. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1822. * @adapter: board private structure
  1823. **/
  1824. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1825. {
  1826. int i;
  1827. for (i = 0; i < adapter->num_rx_queues; i++)
  1828. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1829. }
  1830. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1831. * and memory write and invalidate disabled for certain operations
  1832. */
  1833. static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1834. {
  1835. struct e1000_hw *hw = &adapter->hw;
  1836. struct net_device *netdev = adapter->netdev;
  1837. u32 rctl;
  1838. e1000_pci_clear_mwi(hw);
  1839. rctl = er32(RCTL);
  1840. rctl |= E1000_RCTL_RST;
  1841. ew32(RCTL, rctl);
  1842. E1000_WRITE_FLUSH();
  1843. mdelay(5);
  1844. if (netif_running(netdev))
  1845. e1000_clean_all_rx_rings(adapter);
  1846. }
  1847. static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1848. {
  1849. struct e1000_hw *hw = &adapter->hw;
  1850. struct net_device *netdev = adapter->netdev;
  1851. u32 rctl;
  1852. rctl = er32(RCTL);
  1853. rctl &= ~E1000_RCTL_RST;
  1854. ew32(RCTL, rctl);
  1855. E1000_WRITE_FLUSH();
  1856. mdelay(5);
  1857. if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1858. e1000_pci_set_mwi(hw);
  1859. if (netif_running(netdev)) {
  1860. /* No need to loop, because 82542 supports only 1 queue */
  1861. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1862. e1000_configure_rx(adapter);
  1863. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1864. }
  1865. }
  1866. /**
  1867. * e1000_set_mac - Change the Ethernet Address of the NIC
  1868. * @netdev: network interface device structure
  1869. * @p: pointer to an address structure
  1870. *
  1871. * Returns 0 on success, negative on failure
  1872. **/
  1873. static int e1000_set_mac(struct net_device *netdev, void *p)
  1874. {
  1875. struct e1000_adapter *adapter = netdev_priv(netdev);
  1876. struct e1000_hw *hw = &adapter->hw;
  1877. struct sockaddr *addr = p;
  1878. if (!is_valid_ether_addr(addr->sa_data))
  1879. return -EADDRNOTAVAIL;
  1880. /* 82542 2.0 needs to be in reset to write receive address registers */
  1881. if (hw->mac_type == e1000_82542_rev2_0)
  1882. e1000_enter_82542_rst(adapter);
  1883. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1884. memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
  1885. e1000_rar_set(hw, hw->mac_addr, 0);
  1886. if (hw->mac_type == e1000_82542_rev2_0)
  1887. e1000_leave_82542_rst(adapter);
  1888. return 0;
  1889. }
  1890. /**
  1891. * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
  1892. * @netdev: network interface device structure
  1893. *
  1894. * The set_rx_mode entry point is called whenever the unicast or multicast
  1895. * address lists or the network interface flags are updated. This routine is
  1896. * responsible for configuring the hardware for proper unicast, multicast,
  1897. * promiscuous mode, and all-multi behavior.
  1898. **/
  1899. static void e1000_set_rx_mode(struct net_device *netdev)
  1900. {
  1901. struct e1000_adapter *adapter = netdev_priv(netdev);
  1902. struct e1000_hw *hw = &adapter->hw;
  1903. struct netdev_hw_addr *ha;
  1904. bool use_uc = false;
  1905. u32 rctl;
  1906. u32 hash_value;
  1907. int i, rar_entries = E1000_RAR_ENTRIES;
  1908. int mta_reg_count = E1000_NUM_MTA_REGISTERS;
  1909. u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
  1910. if (!mcarray)
  1911. return;
  1912. /* Check for Promiscuous and All Multicast modes */
  1913. rctl = er32(RCTL);
  1914. if (netdev->flags & IFF_PROMISC) {
  1915. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1916. rctl &= ~E1000_RCTL_VFE;
  1917. } else {
  1918. if (netdev->flags & IFF_ALLMULTI)
  1919. rctl |= E1000_RCTL_MPE;
  1920. else
  1921. rctl &= ~E1000_RCTL_MPE;
  1922. /* Enable VLAN filter if there is a VLAN */
  1923. if (e1000_vlan_used(adapter))
  1924. rctl |= E1000_RCTL_VFE;
  1925. }
  1926. if (netdev_uc_count(netdev) > rar_entries - 1) {
  1927. rctl |= E1000_RCTL_UPE;
  1928. } else if (!(netdev->flags & IFF_PROMISC)) {
  1929. rctl &= ~E1000_RCTL_UPE;
  1930. use_uc = true;
  1931. }
  1932. ew32(RCTL, rctl);
  1933. /* 82542 2.0 needs to be in reset to write receive address registers */
  1934. if (hw->mac_type == e1000_82542_rev2_0)
  1935. e1000_enter_82542_rst(adapter);
  1936. /* load the first 14 addresses into the exact filters 1-14. Unicast
  1937. * addresses take precedence to avoid disabling unicast filtering
  1938. * when possible.
  1939. *
  1940. * RAR 0 is used for the station MAC address
  1941. * if there are not 14 addresses, go ahead and clear the filters
  1942. */
  1943. i = 1;
  1944. if (use_uc)
  1945. netdev_for_each_uc_addr(ha, netdev) {
  1946. if (i == rar_entries)
  1947. break;
  1948. e1000_rar_set(hw, ha->addr, i++);
  1949. }
  1950. netdev_for_each_mc_addr(ha, netdev) {
  1951. if (i == rar_entries) {
  1952. /* load any remaining addresses into the hash table */
  1953. u32 hash_reg, hash_bit, mta;
  1954. hash_value = e1000_hash_mc_addr(hw, ha->addr);
  1955. hash_reg = (hash_value >> 5) & 0x7F;
  1956. hash_bit = hash_value & 0x1F;
  1957. mta = (1 << hash_bit);
  1958. mcarray[hash_reg] |= mta;
  1959. } else {
  1960. e1000_rar_set(hw, ha->addr, i++);
  1961. }
  1962. }
  1963. for (; i < rar_entries; i++) {
  1964. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1965. E1000_WRITE_FLUSH();
  1966. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1967. E1000_WRITE_FLUSH();
  1968. }
  1969. /* write the hash table completely, write from bottom to avoid
  1970. * both stupid write combining chipsets, and flushing each write
  1971. */
  1972. for (i = mta_reg_count - 1; i >= 0 ; i--) {
  1973. /* If we are on an 82544 has an errata where writing odd
  1974. * offsets overwrites the previous even offset, but writing
  1975. * backwards over the range solves the issue by always
  1976. * writing the odd offset first
  1977. */
  1978. E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
  1979. }
  1980. E1000_WRITE_FLUSH();
  1981. if (hw->mac_type == e1000_82542_rev2_0)
  1982. e1000_leave_82542_rst(adapter);
  1983. kfree(mcarray);
  1984. }
  1985. /**
  1986. * e1000_update_phy_info_task - get phy info
  1987. * @work: work struct contained inside adapter struct
  1988. *
  1989. * Need to wait a few seconds after link up to get diagnostic information from
  1990. * the phy
  1991. */
  1992. static void e1000_update_phy_info_task(struct work_struct *work)
  1993. {
  1994. struct e1000_adapter *adapter = container_of(work,
  1995. struct e1000_adapter,
  1996. phy_info_task.work);
  1997. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1998. }
  1999. /**
  2000. * e1000_82547_tx_fifo_stall_task - task to complete work
  2001. * @work: work struct contained inside adapter struct
  2002. **/
  2003. static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
  2004. {
  2005. struct e1000_adapter *adapter = container_of(work,
  2006. struct e1000_adapter,
  2007. fifo_stall_task.work);
  2008. struct e1000_hw *hw = &adapter->hw;
  2009. struct net_device *netdev = adapter->netdev;
  2010. u32 tctl;
  2011. if (atomic_read(&adapter->tx_fifo_stall)) {
  2012. if ((er32(TDT) == er32(TDH)) &&
  2013. (er32(TDFT) == er32(TDFH)) &&
  2014. (er32(TDFTS) == er32(TDFHS))) {
  2015. tctl = er32(TCTL);
  2016. ew32(TCTL, tctl & ~E1000_TCTL_EN);
  2017. ew32(TDFT, adapter->tx_head_addr);
  2018. ew32(TDFH, adapter->tx_head_addr);
  2019. ew32(TDFTS, adapter->tx_head_addr);
  2020. ew32(TDFHS, adapter->tx_head_addr);
  2021. ew32(TCTL, tctl);
  2022. E1000_WRITE_FLUSH();
  2023. adapter->tx_fifo_head = 0;
  2024. atomic_set(&adapter->tx_fifo_stall, 0);
  2025. netif_wake_queue(netdev);
  2026. } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
  2027. schedule_delayed_work(&adapter->fifo_stall_task, 1);
  2028. }
  2029. }
  2030. }
  2031. bool e1000_has_link(struct e1000_adapter *adapter)
  2032. {
  2033. struct e1000_hw *hw = &adapter->hw;
  2034. bool link_active = false;
  2035. /* get_link_status is set on LSC (link status) interrupt or rx
  2036. * sequence error interrupt (except on intel ce4100).
  2037. * get_link_status will stay false until the
  2038. * e1000_check_for_link establishes link for copper adapters
  2039. * ONLY
  2040. */
  2041. switch (hw->media_type) {
  2042. case e1000_media_type_copper:
  2043. if (hw->mac_type == e1000_ce4100)
  2044. hw->get_link_status = 1;
  2045. if (hw->get_link_status) {
  2046. e1000_check_for_link(hw);
  2047. link_active = !hw->get_link_status;
  2048. } else {
  2049. link_active = true;
  2050. }
  2051. break;
  2052. case e1000_media_type_fiber:
  2053. e1000_check_for_link(hw);
  2054. link_active = !!(er32(STATUS) & E1000_STATUS_LU);
  2055. break;
  2056. case e1000_media_type_internal_serdes:
  2057. e1000_check_for_link(hw);
  2058. link_active = hw->serdes_has_link;
  2059. break;
  2060. default:
  2061. break;
  2062. }
  2063. return link_active;
  2064. }
  2065. /**
  2066. * e1000_watchdog - work function
  2067. * @work: work struct contained inside adapter struct
  2068. **/
  2069. static void e1000_watchdog(struct work_struct *work)
  2070. {
  2071. struct e1000_adapter *adapter = container_of(work,
  2072. struct e1000_adapter,
  2073. watchdog_task.work);
  2074. struct e1000_hw *hw = &adapter->hw;
  2075. struct net_device *netdev = adapter->netdev;
  2076. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2077. u32 link, tctl;
  2078. link = e1000_has_link(adapter);
  2079. if ((netif_carrier_ok(netdev)) && link)
  2080. goto link_up;
  2081. if (link) {
  2082. if (!netif_carrier_ok(netdev)) {
  2083. u32 ctrl;
  2084. bool txb2b = true;
  2085. /* update snapshot of PHY registers on LSC */
  2086. e1000_get_speed_and_duplex(hw,
  2087. &adapter->link_speed,
  2088. &adapter->link_duplex);
  2089. ctrl = er32(CTRL);
  2090. pr_info("%s NIC Link is Up %d Mbps %s, "
  2091. "Flow Control: %s\n",
  2092. netdev->name,
  2093. adapter->link_speed,
  2094. adapter->link_duplex == FULL_DUPLEX ?
  2095. "Full Duplex" : "Half Duplex",
  2096. ((ctrl & E1000_CTRL_TFCE) && (ctrl &
  2097. E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
  2098. E1000_CTRL_RFCE) ? "RX" : ((ctrl &
  2099. E1000_CTRL_TFCE) ? "TX" : "None")));
  2100. /* adjust timeout factor according to speed/duplex */
  2101. adapter->tx_timeout_factor = 1;
  2102. switch (adapter->link_speed) {
  2103. case SPEED_10:
  2104. txb2b = false;
  2105. adapter->tx_timeout_factor = 16;
  2106. break;
  2107. case SPEED_100:
  2108. txb2b = false;
  2109. /* maybe add some timeout factor ? */
  2110. break;
  2111. }
  2112. /* enable transmits in the hardware */
  2113. tctl = er32(TCTL);
  2114. tctl |= E1000_TCTL_EN;
  2115. ew32(TCTL, tctl);
  2116. netif_carrier_on(netdev);
  2117. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2118. schedule_delayed_work(&adapter->phy_info_task,
  2119. 2 * HZ);
  2120. adapter->smartspeed = 0;
  2121. }
  2122. } else {
  2123. if (netif_carrier_ok(netdev)) {
  2124. adapter->link_speed = 0;
  2125. adapter->link_duplex = 0;
  2126. pr_info("%s NIC Link is Down\n",
  2127. netdev->name);
  2128. netif_carrier_off(netdev);
  2129. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2130. schedule_delayed_work(&adapter->phy_info_task,
  2131. 2 * HZ);
  2132. }
  2133. e1000_smartspeed(adapter);
  2134. }
  2135. link_up:
  2136. e1000_update_stats(adapter);
  2137. hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2138. adapter->tpt_old = adapter->stats.tpt;
  2139. hw->collision_delta = adapter->stats.colc - adapter->colc_old;
  2140. adapter->colc_old = adapter->stats.colc;
  2141. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2142. adapter->gorcl_old = adapter->stats.gorcl;
  2143. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2144. adapter->gotcl_old = adapter->stats.gotcl;
  2145. e1000_update_adaptive(hw);
  2146. if (!netif_carrier_ok(netdev)) {
  2147. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2148. /* We've lost link, so the controller stops DMA,
  2149. * but we've got queued Tx work that's never going
  2150. * to get done, so reset controller to flush Tx.
  2151. * (Do the reset outside of interrupt context).
  2152. */
  2153. adapter->tx_timeout_count++;
  2154. schedule_work(&adapter->reset_task);
  2155. /* exit immediately since reset is imminent */
  2156. return;
  2157. }
  2158. }
  2159. /* Simple mode for Interrupt Throttle Rate (ITR) */
  2160. if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
  2161. /* Symmetric Tx/Rx gets a reduced ITR=2000;
  2162. * Total asymmetrical Tx or Rx gets ITR=8000;
  2163. * everyone else is between 2000-8000.
  2164. */
  2165. u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2166. u32 dif = (adapter->gotcl > adapter->gorcl ?
  2167. adapter->gotcl - adapter->gorcl :
  2168. adapter->gorcl - adapter->gotcl) / 10000;
  2169. u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2170. ew32(ITR, 1000000000 / (itr * 256));
  2171. }
  2172. /* Cause software interrupt to ensure rx ring is cleaned */
  2173. ew32(ICS, E1000_ICS_RXDMT0);
  2174. /* Force detection of hung controller every watchdog period */
  2175. adapter->detect_tx_hung = true;
  2176. /* Reschedule the task */
  2177. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2178. schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
  2179. }
  2180. enum latency_range {
  2181. lowest_latency = 0,
  2182. low_latency = 1,
  2183. bulk_latency = 2,
  2184. latency_invalid = 255
  2185. };
  2186. /**
  2187. * e1000_update_itr - update the dynamic ITR value based on statistics
  2188. * @adapter: pointer to adapter
  2189. * @itr_setting: current adapter->itr
  2190. * @packets: the number of packets during this measurement interval
  2191. * @bytes: the number of bytes during this measurement interval
  2192. *
  2193. * Stores a new ITR value based on packets and byte
  2194. * counts during the last interrupt. The advantage of per interrupt
  2195. * computation is faster updates and more accurate ITR for the current
  2196. * traffic pattern. Constants in this function were computed
  2197. * based on theoretical maximum wire speed and thresholds were set based
  2198. * on testing data as well as attempting to minimize response time
  2199. * while increasing bulk throughput.
  2200. * this functionality is controlled by the InterruptThrottleRate module
  2201. * parameter (see e1000_param.c)
  2202. **/
  2203. static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
  2204. u16 itr_setting, int packets, int bytes)
  2205. {
  2206. unsigned int retval = itr_setting;
  2207. struct e1000_hw *hw = &adapter->hw;
  2208. if (unlikely(hw->mac_type < e1000_82540))
  2209. goto update_itr_done;
  2210. if (packets == 0)
  2211. goto update_itr_done;
  2212. switch (itr_setting) {
  2213. case lowest_latency:
  2214. /* jumbo frames get bulk treatment*/
  2215. if (bytes/packets > 8000)
  2216. retval = bulk_latency;
  2217. else if ((packets < 5) && (bytes > 512))
  2218. retval = low_latency;
  2219. break;
  2220. case low_latency: /* 50 usec aka 20000 ints/s */
  2221. if (bytes > 10000) {
  2222. /* jumbo frames need bulk latency setting */
  2223. if (bytes/packets > 8000)
  2224. retval = bulk_latency;
  2225. else if ((packets < 10) || ((bytes/packets) > 1200))
  2226. retval = bulk_latency;
  2227. else if ((packets > 35))
  2228. retval = lowest_latency;
  2229. } else if (bytes/packets > 2000)
  2230. retval = bulk_latency;
  2231. else if (packets <= 2 && bytes < 512)
  2232. retval = lowest_latency;
  2233. break;
  2234. case bulk_latency: /* 250 usec aka 4000 ints/s */
  2235. if (bytes > 25000) {
  2236. if (packets > 35)
  2237. retval = low_latency;
  2238. } else if (bytes < 6000) {
  2239. retval = low_latency;
  2240. }
  2241. break;
  2242. }
  2243. update_itr_done:
  2244. return retval;
  2245. }
  2246. static void e1000_set_itr(struct e1000_adapter *adapter)
  2247. {
  2248. struct e1000_hw *hw = &adapter->hw;
  2249. u16 current_itr;
  2250. u32 new_itr = adapter->itr;
  2251. if (unlikely(hw->mac_type < e1000_82540))
  2252. return;
  2253. /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
  2254. if (unlikely(adapter->link_speed != SPEED_1000)) {
  2255. current_itr = 0;
  2256. new_itr = 4000;
  2257. goto set_itr_now;
  2258. }
  2259. adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr,
  2260. adapter->total_tx_packets,
  2261. adapter->total_tx_bytes);
  2262. /* conservative mode (itr 3) eliminates the lowest_latency setting */
  2263. if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
  2264. adapter->tx_itr = low_latency;
  2265. adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr,
  2266. adapter->total_rx_packets,
  2267. adapter->total_rx_bytes);
  2268. /* conservative mode (itr 3) eliminates the lowest_latency setting */
  2269. if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
  2270. adapter->rx_itr = low_latency;
  2271. current_itr = max(adapter->rx_itr, adapter->tx_itr);
  2272. switch (current_itr) {
  2273. /* counts and packets in update_itr are dependent on these numbers */
  2274. case lowest_latency:
  2275. new_itr = 70000;
  2276. break;
  2277. case low_latency:
  2278. new_itr = 20000; /* aka hwitr = ~200 */
  2279. break;
  2280. case bulk_latency:
  2281. new_itr = 4000;
  2282. break;
  2283. default:
  2284. break;
  2285. }
  2286. set_itr_now:
  2287. if (new_itr != adapter->itr) {
  2288. /* this attempts to bias the interrupt rate towards Bulk
  2289. * by adding intermediate steps when interrupt rate is
  2290. * increasing
  2291. */
  2292. new_itr = new_itr > adapter->itr ?
  2293. min(adapter->itr + (new_itr >> 2), new_itr) :
  2294. new_itr;
  2295. adapter->itr = new_itr;
  2296. ew32(ITR, 1000000000 / (new_itr * 256));
  2297. }
  2298. }
  2299. #define E1000_TX_FLAGS_CSUM 0x00000001
  2300. #define E1000_TX_FLAGS_VLAN 0x00000002
  2301. #define E1000_TX_FLAGS_TSO 0x00000004
  2302. #define E1000_TX_FLAGS_IPV4 0x00000008
  2303. #define E1000_TX_FLAGS_NO_FCS 0x00000010
  2304. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2305. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2306. static int e1000_tso(struct e1000_adapter *adapter,
  2307. struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
  2308. __be16 protocol)
  2309. {
  2310. struct e1000_context_desc *context_desc;
  2311. struct e1000_tx_buffer *buffer_info;
  2312. unsigned int i;
  2313. u32 cmd_length = 0;
  2314. u16 ipcse = 0, tucse, mss;
  2315. u8 ipcss, ipcso, tucss, tucso, hdr_len;
  2316. if (skb_is_gso(skb)) {
  2317. int err;
  2318. err = skb_cow_head(skb, 0);
  2319. if (err < 0)
  2320. return err;
  2321. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  2322. mss = skb_shinfo(skb)->gso_size;
  2323. if (protocol == htons(ETH_P_IP)) {
  2324. struct iphdr *iph = ip_hdr(skb);
  2325. iph->tot_len = 0;
  2326. iph->check = 0;
  2327. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  2328. iph->daddr, 0,
  2329. IPPROTO_TCP,
  2330. 0);
  2331. cmd_length = E1000_TXD_CMD_IP;
  2332. ipcse = skb_transport_offset(skb) - 1;
  2333. } else if (skb_is_gso_v6(skb)) {
  2334. ipv6_hdr(skb)->payload_len = 0;
  2335. tcp_hdr(skb)->check =
  2336. ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  2337. &ipv6_hdr(skb)->daddr,
  2338. 0, IPPROTO_TCP, 0);
  2339. ipcse = 0;
  2340. }
  2341. ipcss = skb_network_offset(skb);
  2342. ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
  2343. tucss = skb_transport_offset(skb);
  2344. tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
  2345. tucse = 0;
  2346. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2347. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2348. i = tx_ring->next_to_use;
  2349. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2350. buffer_info = &tx_ring->buffer_info[i];
  2351. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2352. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2353. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2354. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2355. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2356. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2357. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2358. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2359. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2360. buffer_info->time_stamp = jiffies;
  2361. buffer_info->next_to_watch = i;
  2362. if (++i == tx_ring->count)
  2363. i = 0;
  2364. tx_ring->next_to_use = i;
  2365. return true;
  2366. }
  2367. return false;
  2368. }
  2369. static bool e1000_tx_csum(struct e1000_adapter *adapter,
  2370. struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
  2371. __be16 protocol)
  2372. {
  2373. struct e1000_context_desc *context_desc;
  2374. struct e1000_tx_buffer *buffer_info;
  2375. unsigned int i;
  2376. u8 css;
  2377. u32 cmd_len = E1000_TXD_CMD_DEXT;
  2378. if (skb->ip_summed != CHECKSUM_PARTIAL)
  2379. return false;
  2380. switch (protocol) {
  2381. case cpu_to_be16(ETH_P_IP):
  2382. if (ip_hdr(skb)->protocol == IPPROTO_TCP)
  2383. cmd_len |= E1000_TXD_CMD_TCP;
  2384. break;
  2385. case cpu_to_be16(ETH_P_IPV6):
  2386. /* XXX not handling all IPV6 headers */
  2387. if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
  2388. cmd_len |= E1000_TXD_CMD_TCP;
  2389. break;
  2390. default:
  2391. if (unlikely(net_ratelimit()))
  2392. e_warn(drv, "checksum_partial proto=%x!\n",
  2393. skb->protocol);
  2394. break;
  2395. }
  2396. css = skb_checksum_start_offset(skb);
  2397. i = tx_ring->next_to_use;
  2398. buffer_info = &tx_ring->buffer_info[i];
  2399. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2400. context_desc->lower_setup.ip_config = 0;
  2401. context_desc->upper_setup.tcp_fields.tucss = css;
  2402. context_desc->upper_setup.tcp_fields.tucso =
  2403. css + skb->csum_offset;
  2404. context_desc->upper_setup.tcp_fields.tucse = 0;
  2405. context_desc->tcp_seg_setup.data = 0;
  2406. context_desc->cmd_and_length = cpu_to_le32(cmd_len);
  2407. buffer_info->time_stamp = jiffies;
  2408. buffer_info->next_to_watch = i;
  2409. if (unlikely(++i == tx_ring->count))
  2410. i = 0;
  2411. tx_ring->next_to_use = i;
  2412. return true;
  2413. }
  2414. #define E1000_MAX_TXD_PWR 12
  2415. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2416. static int e1000_tx_map(struct e1000_adapter *adapter,
  2417. struct e1000_tx_ring *tx_ring,
  2418. struct sk_buff *skb, unsigned int first,
  2419. unsigned int max_per_txd, unsigned int nr_frags,
  2420. unsigned int mss)
  2421. {
  2422. struct e1000_hw *hw = &adapter->hw;
  2423. struct pci_dev *pdev = adapter->pdev;
  2424. struct e1000_tx_buffer *buffer_info;
  2425. unsigned int len = skb_headlen(skb);
  2426. unsigned int offset = 0, size, count = 0, i;
  2427. unsigned int f, bytecount, segs;
  2428. i = tx_ring->next_to_use;
  2429. while (len) {
  2430. buffer_info = &tx_ring->buffer_info[i];
  2431. size = min(len, max_per_txd);
  2432. /* Workaround for Controller erratum --
  2433. * descriptor for non-tso packet in a linear SKB that follows a
  2434. * tso gets written back prematurely before the data is fully
  2435. * DMA'd to the controller
  2436. */
  2437. if (!skb->data_len && tx_ring->last_tx_tso &&
  2438. !skb_is_gso(skb)) {
  2439. tx_ring->last_tx_tso = false;
  2440. size -= 4;
  2441. }
  2442. /* Workaround for premature desc write-backs
  2443. * in TSO mode. Append 4-byte sentinel desc
  2444. */
  2445. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2446. size -= 4;
  2447. /* work-around for errata 10 and it applies
  2448. * to all controllers in PCI-X mode
  2449. * The fix is to make sure that the first descriptor of a
  2450. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2451. */
  2452. if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
  2453. (size > 2015) && count == 0))
  2454. size = 2015;
  2455. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2456. * terminating buffers within evenly-aligned dwords.
  2457. */
  2458. if (unlikely(adapter->pcix_82544 &&
  2459. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2460. size > 4))
  2461. size -= 4;
  2462. buffer_info->length = size;
  2463. /* set time_stamp *before* dma to help avoid a possible race */
  2464. buffer_info->time_stamp = jiffies;
  2465. buffer_info->mapped_as_page = false;
  2466. buffer_info->dma = dma_map_single(&pdev->dev,
  2467. skb->data + offset,
  2468. size, DMA_TO_DEVICE);
  2469. if (dma_mapping_error(&pdev->dev, buffer_info->dma))
  2470. goto dma_error;
  2471. buffer_info->next_to_watch = i;
  2472. len -= size;
  2473. offset += size;
  2474. count++;
  2475. if (len) {
  2476. i++;
  2477. if (unlikely(i == tx_ring->count))
  2478. i = 0;
  2479. }
  2480. }
  2481. for (f = 0; f < nr_frags; f++) {
  2482. const struct skb_frag_struct *frag;
  2483. frag = &skb_shinfo(skb)->frags[f];
  2484. len = skb_frag_size(frag);
  2485. offset = 0;
  2486. while (len) {
  2487. unsigned long bufend;
  2488. i++;
  2489. if (unlikely(i == tx_ring->count))
  2490. i = 0;
  2491. buffer_info = &tx_ring->buffer_info[i];
  2492. size = min(len, max_per_txd);
  2493. /* Workaround for premature desc write-backs
  2494. * in TSO mode. Append 4-byte sentinel desc
  2495. */
  2496. if (unlikely(mss && f == (nr_frags-1) &&
  2497. size == len && size > 8))
  2498. size -= 4;
  2499. /* Workaround for potential 82544 hang in PCI-X.
  2500. * Avoid terminating buffers within evenly-aligned
  2501. * dwords.
  2502. */
  2503. bufend = (unsigned long)
  2504. page_to_phys(skb_frag_page(frag));
  2505. bufend += offset + size - 1;
  2506. if (unlikely(adapter->pcix_82544 &&
  2507. !(bufend & 4) &&
  2508. size > 4))
  2509. size -= 4;
  2510. buffer_info->length = size;
  2511. buffer_info->time_stamp = jiffies;
  2512. buffer_info->mapped_as_page = true;
  2513. buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
  2514. offset, size, DMA_TO_DEVICE);
  2515. if (dma_mapping_error(&pdev->dev, buffer_info->dma))
  2516. goto dma_error;
  2517. buffer_info->next_to_watch = i;
  2518. len -= size;
  2519. offset += size;
  2520. count++;
  2521. }
  2522. }
  2523. segs = skb_shinfo(skb)->gso_segs ?: 1;
  2524. /* multiply data chunks by size of headers */
  2525. bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
  2526. tx_ring->buffer_info[i].skb = skb;
  2527. tx_ring->buffer_info[i].segs = segs;
  2528. tx_ring->buffer_info[i].bytecount = bytecount;
  2529. tx_ring->buffer_info[first].next_to_watch = i;
  2530. return count;
  2531. dma_error:
  2532. dev_err(&pdev->dev, "TX DMA map failed\n");
  2533. buffer_info->dma = 0;
  2534. if (count)
  2535. count--;
  2536. while (count--) {
  2537. if (i == 0)
  2538. i += tx_ring->count;
  2539. i--;
  2540. buffer_info = &tx_ring->buffer_info[i];
  2541. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2542. }
  2543. return 0;
  2544. }
  2545. static void e1000_tx_queue(struct e1000_adapter *adapter,
  2546. struct e1000_tx_ring *tx_ring, int tx_flags,
  2547. int count)
  2548. {
  2549. struct e1000_tx_desc *tx_desc = NULL;
  2550. struct e1000_tx_buffer *buffer_info;
  2551. u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2552. unsigned int i;
  2553. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2554. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2555. E1000_TXD_CMD_TSE;
  2556. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2557. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2558. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2559. }
  2560. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2561. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2562. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2563. }
  2564. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2565. txd_lower |= E1000_TXD_CMD_VLE;
  2566. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2567. }
  2568. if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
  2569. txd_lower &= ~(E1000_TXD_CMD_IFCS);
  2570. i = tx_ring->next_to_use;
  2571. while (count--) {
  2572. buffer_info = &tx_ring->buffer_info[i];
  2573. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2574. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2575. tx_desc->lower.data =
  2576. cpu_to_le32(txd_lower | buffer_info->length);
  2577. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2578. if (unlikely(++i == tx_ring->count))
  2579. i = 0;
  2580. }
  2581. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2582. /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
  2583. if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
  2584. tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
  2585. /* Force memory writes to complete before letting h/w
  2586. * know there are new descriptors to fetch. (Only
  2587. * applicable for weak-ordered memory model archs,
  2588. * such as IA-64).
  2589. */
  2590. wmb();
  2591. tx_ring->next_to_use = i;
  2592. }
  2593. /* 82547 workaround to avoid controller hang in half-duplex environment.
  2594. * The workaround is to avoid queuing a large packet that would span
  2595. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2596. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2597. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2598. * to the beginning of the Tx FIFO.
  2599. */
  2600. #define E1000_FIFO_HDR 0x10
  2601. #define E1000_82547_PAD_LEN 0x3E0
  2602. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  2603. struct sk_buff *skb)
  2604. {
  2605. u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2606. u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2607. skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
  2608. if (adapter->link_duplex != HALF_DUPLEX)
  2609. goto no_fifo_stall_required;
  2610. if (atomic_read(&adapter->tx_fifo_stall))
  2611. return 1;
  2612. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2613. atomic_set(&adapter->tx_fifo_stall, 1);
  2614. return 1;
  2615. }
  2616. no_fifo_stall_required:
  2617. adapter->tx_fifo_head += skb_fifo_len;
  2618. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2619. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2620. return 0;
  2621. }
  2622. static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
  2623. {
  2624. struct e1000_adapter *adapter = netdev_priv(netdev);
  2625. struct e1000_tx_ring *tx_ring = adapter->tx_ring;
  2626. netif_stop_queue(netdev);
  2627. /* Herbert's original patch had:
  2628. * smp_mb__after_netif_stop_queue();
  2629. * but since that doesn't exist yet, just open code it.
  2630. */
  2631. smp_mb();
  2632. /* We need to check again in a case another CPU has just
  2633. * made room available.
  2634. */
  2635. if (likely(E1000_DESC_UNUSED(tx_ring) < size))
  2636. return -EBUSY;
  2637. /* A reprieve! */
  2638. netif_start_queue(netdev);
  2639. ++adapter->restart_queue;
  2640. return 0;
  2641. }
  2642. static int e1000_maybe_stop_tx(struct net_device *netdev,
  2643. struct e1000_tx_ring *tx_ring, int size)
  2644. {
  2645. if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
  2646. return 0;
  2647. return __e1000_maybe_stop_tx(netdev, size);
  2648. }
  2649. #define TXD_USE_COUNT(S, X) (((S) + ((1 << (X)) - 1)) >> (X))
  2650. static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
  2651. struct net_device *netdev)
  2652. {
  2653. struct e1000_adapter *adapter = netdev_priv(netdev);
  2654. struct e1000_hw *hw = &adapter->hw;
  2655. struct e1000_tx_ring *tx_ring;
  2656. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2657. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2658. unsigned int tx_flags = 0;
  2659. unsigned int len = skb_headlen(skb);
  2660. unsigned int nr_frags;
  2661. unsigned int mss;
  2662. int count = 0;
  2663. int tso;
  2664. unsigned int f;
  2665. __be16 protocol = vlan_get_protocol(skb);
  2666. /* This goes back to the question of how to logically map a Tx queue
  2667. * to a flow. Right now, performance is impacted slightly negatively
  2668. * if using multiple Tx queues. If the stack breaks away from a
  2669. * single qdisc implementation, we can look at this again.
  2670. */
  2671. tx_ring = adapter->tx_ring;
  2672. /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
  2673. * packets may get corrupted during padding by HW.
  2674. * To WA this issue, pad all small packets manually.
  2675. */
  2676. if (eth_skb_pad(skb))
  2677. return NETDEV_TX_OK;
  2678. mss = skb_shinfo(skb)->gso_size;
  2679. /* The controller does a simple calculation to
  2680. * make sure there is enough room in the FIFO before
  2681. * initiating the DMA for each buffer. The calc is:
  2682. * 4 = ceil(buffer len/mss). To make sure we don't
  2683. * overrun the FIFO, adjust the max buffer len if mss
  2684. * drops.
  2685. */
  2686. if (mss) {
  2687. u8 hdr_len;
  2688. max_per_txd = min(mss << 2, max_per_txd);
  2689. max_txd_pwr = fls(max_per_txd) - 1;
  2690. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  2691. if (skb->data_len && hdr_len == len) {
  2692. switch (hw->mac_type) {
  2693. case e1000_82544: {
  2694. unsigned int pull_size;
  2695. /* Make sure we have room to chop off 4 bytes,
  2696. * and that the end alignment will work out to
  2697. * this hardware's requirements
  2698. * NOTE: this is a TSO only workaround
  2699. * if end byte alignment not correct move us
  2700. * into the next dword
  2701. */
  2702. if ((unsigned long)(skb_tail_pointer(skb) - 1)
  2703. & 4)
  2704. break;
  2705. /* fall through */
  2706. pull_size = min((unsigned int)4, skb->data_len);
  2707. if (!__pskb_pull_tail(skb, pull_size)) {
  2708. e_err(drv, "__pskb_pull_tail "
  2709. "failed.\n");
  2710. dev_kfree_skb_any(skb);
  2711. return NETDEV_TX_OK;
  2712. }
  2713. len = skb_headlen(skb);
  2714. break;
  2715. }
  2716. default:
  2717. /* do nothing */
  2718. break;
  2719. }
  2720. }
  2721. }
  2722. /* reserve a descriptor for the offload context */
  2723. if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
  2724. count++;
  2725. count++;
  2726. /* Controller Erratum workaround */
  2727. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2728. count++;
  2729. count += TXD_USE_COUNT(len, max_txd_pwr);
  2730. if (adapter->pcix_82544)
  2731. count++;
  2732. /* work-around for errata 10 and it applies to all controllers
  2733. * in PCI-X mode, so add one more descriptor to the count
  2734. */
  2735. if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
  2736. (len > 2015)))
  2737. count++;
  2738. nr_frags = skb_shinfo(skb)->nr_frags;
  2739. for (f = 0; f < nr_frags; f++)
  2740. count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
  2741. max_txd_pwr);
  2742. if (adapter->pcix_82544)
  2743. count += nr_frags;
  2744. /* need: count + 2 desc gap to keep tail from touching
  2745. * head, otherwise try next time
  2746. */
  2747. if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
  2748. return NETDEV_TX_BUSY;
  2749. if (unlikely((hw->mac_type == e1000_82547) &&
  2750. (e1000_82547_fifo_workaround(adapter, skb)))) {
  2751. netif_stop_queue(netdev);
  2752. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2753. schedule_delayed_work(&adapter->fifo_stall_task, 1);
  2754. return NETDEV_TX_BUSY;
  2755. }
  2756. if (skb_vlan_tag_present(skb)) {
  2757. tx_flags |= E1000_TX_FLAGS_VLAN;
  2758. tx_flags |= (skb_vlan_tag_get(skb) <<
  2759. E1000_TX_FLAGS_VLAN_SHIFT);
  2760. }
  2761. first = tx_ring->next_to_use;
  2762. tso = e1000_tso(adapter, tx_ring, skb, protocol);
  2763. if (tso < 0) {
  2764. dev_kfree_skb_any(skb);
  2765. return NETDEV_TX_OK;
  2766. }
  2767. if (likely(tso)) {
  2768. if (likely(hw->mac_type != e1000_82544))
  2769. tx_ring->last_tx_tso = true;
  2770. tx_flags |= E1000_TX_FLAGS_TSO;
  2771. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb, protocol)))
  2772. tx_flags |= E1000_TX_FLAGS_CSUM;
  2773. if (protocol == htons(ETH_P_IP))
  2774. tx_flags |= E1000_TX_FLAGS_IPV4;
  2775. if (unlikely(skb->no_fcs))
  2776. tx_flags |= E1000_TX_FLAGS_NO_FCS;
  2777. count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
  2778. nr_frags, mss);
  2779. if (count) {
  2780. /* The descriptors needed is higher than other Intel drivers
  2781. * due to a number of workarounds. The breakdown is below:
  2782. * Data descriptors: MAX_SKB_FRAGS + 1
  2783. * Context Descriptor: 1
  2784. * Keep head from touching tail: 2
  2785. * Workarounds: 3
  2786. */
  2787. int desc_needed = MAX_SKB_FRAGS + 7;
  2788. netdev_sent_queue(netdev, skb->len);
  2789. skb_tx_timestamp(skb);
  2790. e1000_tx_queue(adapter, tx_ring, tx_flags, count);
  2791. /* 82544 potentially requires twice as many data descriptors
  2792. * in order to guarantee buffers don't end on evenly-aligned
  2793. * dwords
  2794. */
  2795. if (adapter->pcix_82544)
  2796. desc_needed += MAX_SKB_FRAGS + 1;
  2797. /* Make sure there is space in the ring for the next send. */
  2798. e1000_maybe_stop_tx(netdev, tx_ring, desc_needed);
  2799. if (!skb->xmit_more ||
  2800. netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
  2801. writel(tx_ring->next_to_use, hw->hw_addr + tx_ring->tdt);
  2802. /* we need this if more than one processor can write to
  2803. * our tail at a time, it synchronizes IO on IA64/Altix
  2804. * systems
  2805. */
  2806. mmiowb();
  2807. }
  2808. } else {
  2809. dev_kfree_skb_any(skb);
  2810. tx_ring->buffer_info[first].time_stamp = 0;
  2811. tx_ring->next_to_use = first;
  2812. }
  2813. return NETDEV_TX_OK;
  2814. }
  2815. #define NUM_REGS 38 /* 1 based count */
  2816. static void e1000_regdump(struct e1000_adapter *adapter)
  2817. {
  2818. struct e1000_hw *hw = &adapter->hw;
  2819. u32 regs[NUM_REGS];
  2820. u32 *regs_buff = regs;
  2821. int i = 0;
  2822. static const char * const reg_name[] = {
  2823. "CTRL", "STATUS",
  2824. "RCTL", "RDLEN", "RDH", "RDT", "RDTR",
  2825. "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT",
  2826. "TIDV", "TXDCTL", "TADV", "TARC0",
  2827. "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1",
  2828. "TXDCTL1", "TARC1",
  2829. "CTRL_EXT", "ERT", "RDBAL", "RDBAH",
  2830. "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC",
  2831. "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC"
  2832. };
  2833. regs_buff[0] = er32(CTRL);
  2834. regs_buff[1] = er32(STATUS);
  2835. regs_buff[2] = er32(RCTL);
  2836. regs_buff[3] = er32(RDLEN);
  2837. regs_buff[4] = er32(RDH);
  2838. regs_buff[5] = er32(RDT);
  2839. regs_buff[6] = er32(RDTR);
  2840. regs_buff[7] = er32(TCTL);
  2841. regs_buff[8] = er32(TDBAL);
  2842. regs_buff[9] = er32(TDBAH);
  2843. regs_buff[10] = er32(TDLEN);
  2844. regs_buff[11] = er32(TDH);
  2845. regs_buff[12] = er32(TDT);
  2846. regs_buff[13] = er32(TIDV);
  2847. regs_buff[14] = er32(TXDCTL);
  2848. regs_buff[15] = er32(TADV);
  2849. regs_buff[16] = er32(TARC0);
  2850. regs_buff[17] = er32(TDBAL1);
  2851. regs_buff[18] = er32(TDBAH1);
  2852. regs_buff[19] = er32(TDLEN1);
  2853. regs_buff[20] = er32(TDH1);
  2854. regs_buff[21] = er32(TDT1);
  2855. regs_buff[22] = er32(TXDCTL1);
  2856. regs_buff[23] = er32(TARC1);
  2857. regs_buff[24] = er32(CTRL_EXT);
  2858. regs_buff[25] = er32(ERT);
  2859. regs_buff[26] = er32(RDBAL0);
  2860. regs_buff[27] = er32(RDBAH0);
  2861. regs_buff[28] = er32(TDFH);
  2862. regs_buff[29] = er32(TDFT);
  2863. regs_buff[30] = er32(TDFHS);
  2864. regs_buff[31] = er32(TDFTS);
  2865. regs_buff[32] = er32(TDFPC);
  2866. regs_buff[33] = er32(RDFH);
  2867. regs_buff[34] = er32(RDFT);
  2868. regs_buff[35] = er32(RDFHS);
  2869. regs_buff[36] = er32(RDFTS);
  2870. regs_buff[37] = er32(RDFPC);
  2871. pr_info("Register dump\n");
  2872. for (i = 0; i < NUM_REGS; i++)
  2873. pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]);
  2874. }
  2875. /*
  2876. * e1000_dump: Print registers, tx ring and rx ring
  2877. */
  2878. static void e1000_dump(struct e1000_adapter *adapter)
  2879. {
  2880. /* this code doesn't handle multiple rings */
  2881. struct e1000_tx_ring *tx_ring = adapter->tx_ring;
  2882. struct e1000_rx_ring *rx_ring = adapter->rx_ring;
  2883. int i;
  2884. if (!netif_msg_hw(adapter))
  2885. return;
  2886. /* Print Registers */
  2887. e1000_regdump(adapter);
  2888. /* transmit dump */
  2889. pr_info("TX Desc ring0 dump\n");
  2890. /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
  2891. *
  2892. * Legacy Transmit Descriptor
  2893. * +--------------------------------------------------------------+
  2894. * 0 | Buffer Address [63:0] (Reserved on Write Back) |
  2895. * +--------------------------------------------------------------+
  2896. * 8 | Special | CSS | Status | CMD | CSO | Length |
  2897. * +--------------------------------------------------------------+
  2898. * 63 48 47 36 35 32 31 24 23 16 15 0
  2899. *
  2900. * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
  2901. * 63 48 47 40 39 32 31 16 15 8 7 0
  2902. * +----------------------------------------------------------------+
  2903. * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
  2904. * +----------------------------------------------------------------+
  2905. * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
  2906. * +----------------------------------------------------------------+
  2907. * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
  2908. *
  2909. * Extended Data Descriptor (DTYP=0x1)
  2910. * +----------------------------------------------------------------+
  2911. * 0 | Buffer Address [63:0] |
  2912. * +----------------------------------------------------------------+
  2913. * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
  2914. * +----------------------------------------------------------------+
  2915. * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
  2916. */
  2917. pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n");
  2918. pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n");
  2919. if (!netif_msg_tx_done(adapter))
  2920. goto rx_ring_summary;
  2921. for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
  2922. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
  2923. struct e1000_tx_buffer *buffer_info = &tx_ring->buffer_info[i];
  2924. struct my_u { __le64 a; __le64 b; };
  2925. struct my_u *u = (struct my_u *)tx_desc;
  2926. const char *type;
  2927. if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
  2928. type = "NTC/U";
  2929. else if (i == tx_ring->next_to_use)
  2930. type = "NTU";
  2931. else if (i == tx_ring->next_to_clean)
  2932. type = "NTC";
  2933. else
  2934. type = "";
  2935. pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n",
  2936. ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i,
  2937. le64_to_cpu(u->a), le64_to_cpu(u->b),
  2938. (u64)buffer_info->dma, buffer_info->length,
  2939. buffer_info->next_to_watch,
  2940. (u64)buffer_info->time_stamp, buffer_info->skb, type);
  2941. }
  2942. rx_ring_summary:
  2943. /* receive dump */
  2944. pr_info("\nRX Desc ring dump\n");
  2945. /* Legacy Receive Descriptor Format
  2946. *
  2947. * +-----------------------------------------------------+
  2948. * | Buffer Address [63:0] |
  2949. * +-----------------------------------------------------+
  2950. * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
  2951. * +-----------------------------------------------------+
  2952. * 63 48 47 40 39 32 31 16 15 0
  2953. */
  2954. pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n");
  2955. if (!netif_msg_rx_status(adapter))
  2956. goto exit;
  2957. for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
  2958. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
  2959. struct e1000_rx_buffer *buffer_info = &rx_ring->buffer_info[i];
  2960. struct my_u { __le64 a; __le64 b; };
  2961. struct my_u *u = (struct my_u *)rx_desc;
  2962. const char *type;
  2963. if (i == rx_ring->next_to_use)
  2964. type = "NTU";
  2965. else if (i == rx_ring->next_to_clean)
  2966. type = "NTC";
  2967. else
  2968. type = "";
  2969. pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n",
  2970. i, le64_to_cpu(u->a), le64_to_cpu(u->b),
  2971. (u64)buffer_info->dma, buffer_info->rxbuf.data, type);
  2972. } /* for */
  2973. /* dump the descriptor caches */
  2974. /* rx */
  2975. pr_info("Rx descriptor cache in 64bit format\n");
  2976. for (i = 0x6000; i <= 0x63FF ; i += 0x10) {
  2977. pr_info("R%04X: %08X|%08X %08X|%08X\n",
  2978. i,
  2979. readl(adapter->hw.hw_addr + i+4),
  2980. readl(adapter->hw.hw_addr + i),
  2981. readl(adapter->hw.hw_addr + i+12),
  2982. readl(adapter->hw.hw_addr + i+8));
  2983. }
  2984. /* tx */
  2985. pr_info("Tx descriptor cache in 64bit format\n");
  2986. for (i = 0x7000; i <= 0x73FF ; i += 0x10) {
  2987. pr_info("T%04X: %08X|%08X %08X|%08X\n",
  2988. i,
  2989. readl(adapter->hw.hw_addr + i+4),
  2990. readl(adapter->hw.hw_addr + i),
  2991. readl(adapter->hw.hw_addr + i+12),
  2992. readl(adapter->hw.hw_addr + i+8));
  2993. }
  2994. exit:
  2995. return;
  2996. }
  2997. /**
  2998. * e1000_tx_timeout - Respond to a Tx Hang
  2999. * @netdev: network interface device structure
  3000. **/
  3001. static void e1000_tx_timeout(struct net_device *netdev)
  3002. {
  3003. struct e1000_adapter *adapter = netdev_priv(netdev);
  3004. /* Do the reset outside of interrupt context */
  3005. adapter->tx_timeout_count++;
  3006. schedule_work(&adapter->reset_task);
  3007. }
  3008. static void e1000_reset_task(struct work_struct *work)
  3009. {
  3010. struct e1000_adapter *adapter =
  3011. container_of(work, struct e1000_adapter, reset_task);
  3012. e_err(drv, "Reset adapter\n");
  3013. e1000_reinit_locked(adapter);
  3014. }
  3015. /**
  3016. * e1000_change_mtu - Change the Maximum Transfer Unit
  3017. * @netdev: network interface device structure
  3018. * @new_mtu: new value for maximum frame size
  3019. *
  3020. * Returns 0 on success, negative on failure
  3021. **/
  3022. static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
  3023. {
  3024. struct e1000_adapter *adapter = netdev_priv(netdev);
  3025. struct e1000_hw *hw = &adapter->hw;
  3026. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
  3027. /* Adapter-specific max frame size limits. */
  3028. switch (hw->mac_type) {
  3029. case e1000_undefined ... e1000_82542_rev2_1:
  3030. if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
  3031. e_err(probe, "Jumbo Frames not supported.\n");
  3032. return -EINVAL;
  3033. }
  3034. break;
  3035. default:
  3036. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  3037. break;
  3038. }
  3039. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  3040. msleep(1);
  3041. /* e1000_down has a dependency on max_frame_size */
  3042. hw->max_frame_size = max_frame;
  3043. if (netif_running(netdev)) {
  3044. /* prevent buffers from being reallocated */
  3045. adapter->alloc_rx_buf = e1000_alloc_dummy_rx_buffers;
  3046. e1000_down(adapter);
  3047. }
  3048. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  3049. * means we reserve 2 more, this pushes us to allocate from the next
  3050. * larger slab size.
  3051. * i.e. RXBUFFER_2048 --> size-4096 slab
  3052. * however with the new *_jumbo_rx* routines, jumbo receives will use
  3053. * fragmented skbs
  3054. */
  3055. if (max_frame <= E1000_RXBUFFER_2048)
  3056. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  3057. else
  3058. #if (PAGE_SIZE >= E1000_RXBUFFER_16384)
  3059. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  3060. #elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
  3061. adapter->rx_buffer_len = PAGE_SIZE;
  3062. #endif
  3063. /* adjust allocation if LPE protects us, and we aren't using SBP */
  3064. if (!hw->tbi_compatibility_on &&
  3065. ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
  3066. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  3067. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  3068. pr_info("%s changing MTU from %d to %d\n",
  3069. netdev->name, netdev->mtu, new_mtu);
  3070. netdev->mtu = new_mtu;
  3071. if (netif_running(netdev))
  3072. e1000_up(adapter);
  3073. else
  3074. e1000_reset(adapter);
  3075. clear_bit(__E1000_RESETTING, &adapter->flags);
  3076. return 0;
  3077. }
  3078. /**
  3079. * e1000_update_stats - Update the board statistics counters
  3080. * @adapter: board private structure
  3081. **/
  3082. void e1000_update_stats(struct e1000_adapter *adapter)
  3083. {
  3084. struct net_device *netdev = adapter->netdev;
  3085. struct e1000_hw *hw = &adapter->hw;
  3086. struct pci_dev *pdev = adapter->pdev;
  3087. unsigned long flags;
  3088. u16 phy_tmp;
  3089. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  3090. /* Prevent stats update while adapter is being reset, or if the pci
  3091. * connection is down.
  3092. */
  3093. if (adapter->link_speed == 0)
  3094. return;
  3095. if (pci_channel_offline(pdev))
  3096. return;
  3097. spin_lock_irqsave(&adapter->stats_lock, flags);
  3098. /* these counters are modified from e1000_tbi_adjust_stats,
  3099. * called from the interrupt context, so they must only
  3100. * be written while holding adapter->stats_lock
  3101. */
  3102. adapter->stats.crcerrs += er32(CRCERRS);
  3103. adapter->stats.gprc += er32(GPRC);
  3104. adapter->stats.gorcl += er32(GORCL);
  3105. adapter->stats.gorch += er32(GORCH);
  3106. adapter->stats.bprc += er32(BPRC);
  3107. adapter->stats.mprc += er32(MPRC);
  3108. adapter->stats.roc += er32(ROC);
  3109. adapter->stats.prc64 += er32(PRC64);
  3110. adapter->stats.prc127 += er32(PRC127);
  3111. adapter->stats.prc255 += er32(PRC255);
  3112. adapter->stats.prc511 += er32(PRC511);
  3113. adapter->stats.prc1023 += er32(PRC1023);
  3114. adapter->stats.prc1522 += er32(PRC1522);
  3115. adapter->stats.symerrs += er32(SYMERRS);
  3116. adapter->stats.mpc += er32(MPC);
  3117. adapter->stats.scc += er32(SCC);
  3118. adapter->stats.ecol += er32(ECOL);
  3119. adapter->stats.mcc += er32(MCC);
  3120. adapter->stats.latecol += er32(LATECOL);
  3121. adapter->stats.dc += er32(DC);
  3122. adapter->stats.sec += er32(SEC);
  3123. adapter->stats.rlec += er32(RLEC);
  3124. adapter->stats.xonrxc += er32(XONRXC);
  3125. adapter->stats.xontxc += er32(XONTXC);
  3126. adapter->stats.xoffrxc += er32(XOFFRXC);
  3127. adapter->stats.xofftxc += er32(XOFFTXC);
  3128. adapter->stats.fcruc += er32(FCRUC);
  3129. adapter->stats.gptc += er32(GPTC);
  3130. adapter->stats.gotcl += er32(GOTCL);
  3131. adapter->stats.gotch += er32(GOTCH);
  3132. adapter->stats.rnbc += er32(RNBC);
  3133. adapter->stats.ruc += er32(RUC);
  3134. adapter->stats.rfc += er32(RFC);
  3135. adapter->stats.rjc += er32(RJC);
  3136. adapter->stats.torl += er32(TORL);
  3137. adapter->stats.torh += er32(TORH);
  3138. adapter->stats.totl += er32(TOTL);
  3139. adapter->stats.toth += er32(TOTH);
  3140. adapter->stats.tpr += er32(TPR);
  3141. adapter->stats.ptc64 += er32(PTC64);
  3142. adapter->stats.ptc127 += er32(PTC127);
  3143. adapter->stats.ptc255 += er32(PTC255);
  3144. adapter->stats.ptc511 += er32(PTC511);
  3145. adapter->stats.ptc1023 += er32(PTC1023);
  3146. adapter->stats.ptc1522 += er32(PTC1522);
  3147. adapter->stats.mptc += er32(MPTC);
  3148. adapter->stats.bptc += er32(BPTC);
  3149. /* used for adaptive IFS */
  3150. hw->tx_packet_delta = er32(TPT);
  3151. adapter->stats.tpt += hw->tx_packet_delta;
  3152. hw->collision_delta = er32(COLC);
  3153. adapter->stats.colc += hw->collision_delta;
  3154. if (hw->mac_type >= e1000_82543) {
  3155. adapter->stats.algnerrc += er32(ALGNERRC);
  3156. adapter->stats.rxerrc += er32(RXERRC);
  3157. adapter->stats.tncrs += er32(TNCRS);
  3158. adapter->stats.cexterr += er32(CEXTERR);
  3159. adapter->stats.tsctc += er32(TSCTC);
  3160. adapter->stats.tsctfc += er32(TSCTFC);
  3161. }
  3162. /* Fill out the OS statistics structure */
  3163. netdev->stats.multicast = adapter->stats.mprc;
  3164. netdev->stats.collisions = adapter->stats.colc;
  3165. /* Rx Errors */
  3166. /* RLEC on some newer hardware can be incorrect so build
  3167. * our own version based on RUC and ROC
  3168. */
  3169. netdev->stats.rx_errors = adapter->stats.rxerrc +
  3170. adapter->stats.crcerrs + adapter->stats.algnerrc +
  3171. adapter->stats.ruc + adapter->stats.roc +
  3172. adapter->stats.cexterr;
  3173. adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
  3174. netdev->stats.rx_length_errors = adapter->stats.rlerrc;
  3175. netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
  3176. netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
  3177. netdev->stats.rx_missed_errors = adapter->stats.mpc;
  3178. /* Tx Errors */
  3179. adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
  3180. netdev->stats.tx_errors = adapter->stats.txerrc;
  3181. netdev->stats.tx_aborted_errors = adapter->stats.ecol;
  3182. netdev->stats.tx_window_errors = adapter->stats.latecol;
  3183. netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
  3184. if (hw->bad_tx_carr_stats_fd &&
  3185. adapter->link_duplex == FULL_DUPLEX) {
  3186. netdev->stats.tx_carrier_errors = 0;
  3187. adapter->stats.tncrs = 0;
  3188. }
  3189. /* Tx Dropped needs to be maintained elsewhere */
  3190. /* Phy Stats */
  3191. if (hw->media_type == e1000_media_type_copper) {
  3192. if ((adapter->link_speed == SPEED_1000) &&
  3193. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  3194. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  3195. adapter->phy_stats.idle_errors += phy_tmp;
  3196. }
  3197. if ((hw->mac_type <= e1000_82546) &&
  3198. (hw->phy_type == e1000_phy_m88) &&
  3199. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  3200. adapter->phy_stats.receive_errors += phy_tmp;
  3201. }
  3202. /* Management Stats */
  3203. if (hw->has_smbus) {
  3204. adapter->stats.mgptc += er32(MGTPTC);
  3205. adapter->stats.mgprc += er32(MGTPRC);
  3206. adapter->stats.mgpdc += er32(MGTPDC);
  3207. }
  3208. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3209. }
  3210. /**
  3211. * e1000_intr - Interrupt Handler
  3212. * @irq: interrupt number
  3213. * @data: pointer to a network interface device structure
  3214. **/
  3215. static irqreturn_t e1000_intr(int irq, void *data)
  3216. {
  3217. struct net_device *netdev = data;
  3218. struct e1000_adapter *adapter = netdev_priv(netdev);
  3219. struct e1000_hw *hw = &adapter->hw;
  3220. u32 icr = er32(ICR);
  3221. if (unlikely((!icr)))
  3222. return IRQ_NONE; /* Not our interrupt */
  3223. /* we might have caused the interrupt, but the above
  3224. * read cleared it, and just in case the driver is
  3225. * down there is nothing to do so return handled
  3226. */
  3227. if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
  3228. return IRQ_HANDLED;
  3229. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  3230. hw->get_link_status = 1;
  3231. /* guard against interrupt when we're going down */
  3232. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3233. schedule_delayed_work(&adapter->watchdog_task, 1);
  3234. }
  3235. /* disable interrupts, without the synchronize_irq bit */
  3236. ew32(IMC, ~0);
  3237. E1000_WRITE_FLUSH();
  3238. if (likely(napi_schedule_prep(&adapter->napi))) {
  3239. adapter->total_tx_bytes = 0;
  3240. adapter->total_tx_packets = 0;
  3241. adapter->total_rx_bytes = 0;
  3242. adapter->total_rx_packets = 0;
  3243. __napi_schedule(&adapter->napi);
  3244. } else {
  3245. /* this really should not happen! if it does it is basically a
  3246. * bug, but not a hard error, so enable ints and continue
  3247. */
  3248. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3249. e1000_irq_enable(adapter);
  3250. }
  3251. return IRQ_HANDLED;
  3252. }
  3253. /**
  3254. * e1000_clean - NAPI Rx polling callback
  3255. * @adapter: board private structure
  3256. **/
  3257. static int e1000_clean(struct napi_struct *napi, int budget)
  3258. {
  3259. struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
  3260. napi);
  3261. int tx_clean_complete = 0, work_done = 0;
  3262. tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
  3263. adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
  3264. if (!tx_clean_complete)
  3265. work_done = budget;
  3266. /* If budget not fully consumed, exit the polling mode */
  3267. if (work_done < budget) {
  3268. if (likely(adapter->itr_setting & 3))
  3269. e1000_set_itr(adapter);
  3270. napi_complete_done(napi, work_done);
  3271. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3272. e1000_irq_enable(adapter);
  3273. }
  3274. return work_done;
  3275. }
  3276. /**
  3277. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  3278. * @adapter: board private structure
  3279. **/
  3280. static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
  3281. struct e1000_tx_ring *tx_ring)
  3282. {
  3283. struct e1000_hw *hw = &adapter->hw;
  3284. struct net_device *netdev = adapter->netdev;
  3285. struct e1000_tx_desc *tx_desc, *eop_desc;
  3286. struct e1000_tx_buffer *buffer_info;
  3287. unsigned int i, eop;
  3288. unsigned int count = 0;
  3289. unsigned int total_tx_bytes = 0, total_tx_packets = 0;
  3290. unsigned int bytes_compl = 0, pkts_compl = 0;
  3291. i = tx_ring->next_to_clean;
  3292. eop = tx_ring->buffer_info[i].next_to_watch;
  3293. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3294. while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
  3295. (count < tx_ring->count)) {
  3296. bool cleaned = false;
  3297. dma_rmb(); /* read buffer_info after eop_desc */
  3298. for ( ; !cleaned; count++) {
  3299. tx_desc = E1000_TX_DESC(*tx_ring, i);
  3300. buffer_info = &tx_ring->buffer_info[i];
  3301. cleaned = (i == eop);
  3302. if (cleaned) {
  3303. total_tx_packets += buffer_info->segs;
  3304. total_tx_bytes += buffer_info->bytecount;
  3305. if (buffer_info->skb) {
  3306. bytes_compl += buffer_info->skb->len;
  3307. pkts_compl++;
  3308. }
  3309. }
  3310. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  3311. tx_desc->upper.data = 0;
  3312. if (unlikely(++i == tx_ring->count))
  3313. i = 0;
  3314. }
  3315. eop = tx_ring->buffer_info[i].next_to_watch;
  3316. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3317. }
  3318. /* Synchronize with E1000_DESC_UNUSED called from e1000_xmit_frame,
  3319. * which will reuse the cleaned buffers.
  3320. */
  3321. smp_store_release(&tx_ring->next_to_clean, i);
  3322. netdev_completed_queue(netdev, pkts_compl, bytes_compl);
  3323. #define TX_WAKE_THRESHOLD 32
  3324. if (unlikely(count && netif_carrier_ok(netdev) &&
  3325. E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
  3326. /* Make sure that anybody stopping the queue after this
  3327. * sees the new next_to_clean.
  3328. */
  3329. smp_mb();
  3330. if (netif_queue_stopped(netdev) &&
  3331. !(test_bit(__E1000_DOWN, &adapter->flags))) {
  3332. netif_wake_queue(netdev);
  3333. ++adapter->restart_queue;
  3334. }
  3335. }
  3336. if (adapter->detect_tx_hung) {
  3337. /* Detect a transmit hang in hardware, this serializes the
  3338. * check with the clearing of time_stamp and movement of i
  3339. */
  3340. adapter->detect_tx_hung = false;
  3341. if (tx_ring->buffer_info[eop].time_stamp &&
  3342. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3343. (adapter->tx_timeout_factor * HZ)) &&
  3344. !(er32(STATUS) & E1000_STATUS_TXOFF)) {
  3345. /* detected Tx unit hang */
  3346. e_err(drv, "Detected Tx Unit Hang\n"
  3347. " Tx Queue <%lu>\n"
  3348. " TDH <%x>\n"
  3349. " TDT <%x>\n"
  3350. " next_to_use <%x>\n"
  3351. " next_to_clean <%x>\n"
  3352. "buffer_info[next_to_clean]\n"
  3353. " time_stamp <%lx>\n"
  3354. " next_to_watch <%x>\n"
  3355. " jiffies <%lx>\n"
  3356. " next_to_watch.status <%x>\n",
  3357. (unsigned long)(tx_ring - adapter->tx_ring),
  3358. readl(hw->hw_addr + tx_ring->tdh),
  3359. readl(hw->hw_addr + tx_ring->tdt),
  3360. tx_ring->next_to_use,
  3361. tx_ring->next_to_clean,
  3362. tx_ring->buffer_info[eop].time_stamp,
  3363. eop,
  3364. jiffies,
  3365. eop_desc->upper.fields.status);
  3366. e1000_dump(adapter);
  3367. netif_stop_queue(netdev);
  3368. }
  3369. }
  3370. adapter->total_tx_bytes += total_tx_bytes;
  3371. adapter->total_tx_packets += total_tx_packets;
  3372. netdev->stats.tx_bytes += total_tx_bytes;
  3373. netdev->stats.tx_packets += total_tx_packets;
  3374. return count < tx_ring->count;
  3375. }
  3376. /**
  3377. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3378. * @adapter: board private structure
  3379. * @status_err: receive descriptor status and error fields
  3380. * @csum: receive descriptor csum field
  3381. * @sk_buff: socket buffer with received data
  3382. **/
  3383. static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
  3384. u32 csum, struct sk_buff *skb)
  3385. {
  3386. struct e1000_hw *hw = &adapter->hw;
  3387. u16 status = (u16)status_err;
  3388. u8 errors = (u8)(status_err >> 24);
  3389. skb_checksum_none_assert(skb);
  3390. /* 82543 or newer only */
  3391. if (unlikely(hw->mac_type < e1000_82543))
  3392. return;
  3393. /* Ignore Checksum bit is set */
  3394. if (unlikely(status & E1000_RXD_STAT_IXSM))
  3395. return;
  3396. /* TCP/UDP checksum error bit is set */
  3397. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3398. /* let the stack verify checksum errors */
  3399. adapter->hw_csum_err++;
  3400. return;
  3401. }
  3402. /* TCP/UDP Checksum has not been calculated */
  3403. if (!(status & E1000_RXD_STAT_TCPCS))
  3404. return;
  3405. /* It must be a TCP or UDP packet with a valid checksum */
  3406. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3407. /* TCP checksum is good */
  3408. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3409. }
  3410. adapter->hw_csum_good++;
  3411. }
  3412. /**
  3413. * e1000_consume_page - helper function for jumbo Rx path
  3414. **/
  3415. static void e1000_consume_page(struct e1000_rx_buffer *bi, struct sk_buff *skb,
  3416. u16 length)
  3417. {
  3418. bi->rxbuf.page = NULL;
  3419. skb->len += length;
  3420. skb->data_len += length;
  3421. skb->truesize += PAGE_SIZE;
  3422. }
  3423. /**
  3424. * e1000_receive_skb - helper function to handle rx indications
  3425. * @adapter: board private structure
  3426. * @status: descriptor status field as written by hardware
  3427. * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
  3428. * @skb: pointer to sk_buff to be indicated to stack
  3429. */
  3430. static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
  3431. __le16 vlan, struct sk_buff *skb)
  3432. {
  3433. skb->protocol = eth_type_trans(skb, adapter->netdev);
  3434. if (status & E1000_RXD_STAT_VP) {
  3435. u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
  3436. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
  3437. }
  3438. napi_gro_receive(&adapter->napi, skb);
  3439. }
  3440. /**
  3441. * e1000_tbi_adjust_stats
  3442. * @hw: Struct containing variables accessed by shared code
  3443. * @frame_len: The length of the frame in question
  3444. * @mac_addr: The Ethernet destination address of the frame in question
  3445. *
  3446. * Adjusts the statistic counters when a frame is accepted by TBI_ACCEPT
  3447. */
  3448. static void e1000_tbi_adjust_stats(struct e1000_hw *hw,
  3449. struct e1000_hw_stats *stats,
  3450. u32 frame_len, const u8 *mac_addr)
  3451. {
  3452. u64 carry_bit;
  3453. /* First adjust the frame length. */
  3454. frame_len--;
  3455. /* We need to adjust the statistics counters, since the hardware
  3456. * counters overcount this packet as a CRC error and undercount
  3457. * the packet as a good packet
  3458. */
  3459. /* This packet should not be counted as a CRC error. */
  3460. stats->crcerrs--;
  3461. /* This packet does count as a Good Packet Received. */
  3462. stats->gprc++;
  3463. /* Adjust the Good Octets received counters */
  3464. carry_bit = 0x80000000 & stats->gorcl;
  3465. stats->gorcl += frame_len;
  3466. /* If the high bit of Gorcl (the low 32 bits of the Good Octets
  3467. * Received Count) was one before the addition,
  3468. * AND it is zero after, then we lost the carry out,
  3469. * need to add one to Gorch (Good Octets Received Count High).
  3470. * This could be simplified if all environments supported
  3471. * 64-bit integers.
  3472. */
  3473. if (carry_bit && ((stats->gorcl & 0x80000000) == 0))
  3474. stats->gorch++;
  3475. /* Is this a broadcast or multicast? Check broadcast first,
  3476. * since the test for a multicast frame will test positive on
  3477. * a broadcast frame.
  3478. */
  3479. if (is_broadcast_ether_addr(mac_addr))
  3480. stats->bprc++;
  3481. else if (is_multicast_ether_addr(mac_addr))
  3482. stats->mprc++;
  3483. if (frame_len == hw->max_frame_size) {
  3484. /* In this case, the hardware has overcounted the number of
  3485. * oversize frames.
  3486. */
  3487. if (stats->roc > 0)
  3488. stats->roc--;
  3489. }
  3490. /* Adjust the bin counters when the extra byte put the frame in the
  3491. * wrong bin. Remember that the frame_len was adjusted above.
  3492. */
  3493. if (frame_len == 64) {
  3494. stats->prc64++;
  3495. stats->prc127--;
  3496. } else if (frame_len == 127) {
  3497. stats->prc127++;
  3498. stats->prc255--;
  3499. } else if (frame_len == 255) {
  3500. stats->prc255++;
  3501. stats->prc511--;
  3502. } else if (frame_len == 511) {
  3503. stats->prc511++;
  3504. stats->prc1023--;
  3505. } else if (frame_len == 1023) {
  3506. stats->prc1023++;
  3507. stats->prc1522--;
  3508. } else if (frame_len == 1522) {
  3509. stats->prc1522++;
  3510. }
  3511. }
  3512. static bool e1000_tbi_should_accept(struct e1000_adapter *adapter,
  3513. u8 status, u8 errors,
  3514. u32 length, const u8 *data)
  3515. {
  3516. struct e1000_hw *hw = &adapter->hw;
  3517. u8 last_byte = *(data + length - 1);
  3518. if (TBI_ACCEPT(hw, status, errors, length, last_byte)) {
  3519. unsigned long irq_flags;
  3520. spin_lock_irqsave(&adapter->stats_lock, irq_flags);
  3521. e1000_tbi_adjust_stats(hw, &adapter->stats, length, data);
  3522. spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
  3523. return true;
  3524. }
  3525. return false;
  3526. }
  3527. static struct sk_buff *e1000_alloc_rx_skb(struct e1000_adapter *adapter,
  3528. unsigned int bufsz)
  3529. {
  3530. struct sk_buff *skb = napi_alloc_skb(&adapter->napi, bufsz);
  3531. if (unlikely(!skb))
  3532. adapter->alloc_rx_buff_failed++;
  3533. return skb;
  3534. }
  3535. /**
  3536. * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
  3537. * @adapter: board private structure
  3538. * @rx_ring: ring to clean
  3539. * @work_done: amount of napi work completed this call
  3540. * @work_to_do: max amount of work allowed for this call to do
  3541. *
  3542. * the return value indicates whether actual cleaning was done, there
  3543. * is no guarantee that everything was cleaned
  3544. */
  3545. static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
  3546. struct e1000_rx_ring *rx_ring,
  3547. int *work_done, int work_to_do)
  3548. {
  3549. struct net_device *netdev = adapter->netdev;
  3550. struct pci_dev *pdev = adapter->pdev;
  3551. struct e1000_rx_desc *rx_desc, *next_rxd;
  3552. struct e1000_rx_buffer *buffer_info, *next_buffer;
  3553. u32 length;
  3554. unsigned int i;
  3555. int cleaned_count = 0;
  3556. bool cleaned = false;
  3557. unsigned int total_rx_bytes = 0, total_rx_packets = 0;
  3558. i = rx_ring->next_to_clean;
  3559. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3560. buffer_info = &rx_ring->buffer_info[i];
  3561. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3562. struct sk_buff *skb;
  3563. u8 status;
  3564. if (*work_done >= work_to_do)
  3565. break;
  3566. (*work_done)++;
  3567. dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
  3568. status = rx_desc->status;
  3569. if (++i == rx_ring->count)
  3570. i = 0;
  3571. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3572. prefetch(next_rxd);
  3573. next_buffer = &rx_ring->buffer_info[i];
  3574. cleaned = true;
  3575. cleaned_count++;
  3576. dma_unmap_page(&pdev->dev, buffer_info->dma,
  3577. adapter->rx_buffer_len, DMA_FROM_DEVICE);
  3578. buffer_info->dma = 0;
  3579. length = le16_to_cpu(rx_desc->length);
  3580. /* errors is only valid for DD + EOP descriptors */
  3581. if (unlikely((status & E1000_RXD_STAT_EOP) &&
  3582. (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
  3583. u8 *mapped = page_address(buffer_info->rxbuf.page);
  3584. if (e1000_tbi_should_accept(adapter, status,
  3585. rx_desc->errors,
  3586. length, mapped)) {
  3587. length--;
  3588. } else if (netdev->features & NETIF_F_RXALL) {
  3589. goto process_skb;
  3590. } else {
  3591. /* an error means any chain goes out the window
  3592. * too
  3593. */
  3594. if (rx_ring->rx_skb_top)
  3595. dev_kfree_skb(rx_ring->rx_skb_top);
  3596. rx_ring->rx_skb_top = NULL;
  3597. goto next_desc;
  3598. }
  3599. }
  3600. #define rxtop rx_ring->rx_skb_top
  3601. process_skb:
  3602. if (!(status & E1000_RXD_STAT_EOP)) {
  3603. /* this descriptor is only the beginning (or middle) */
  3604. if (!rxtop) {
  3605. /* this is the beginning of a chain */
  3606. rxtop = napi_get_frags(&adapter->napi);
  3607. if (!rxtop)
  3608. break;
  3609. skb_fill_page_desc(rxtop, 0,
  3610. buffer_info->rxbuf.page,
  3611. 0, length);
  3612. } else {
  3613. /* this is the middle of a chain */
  3614. skb_fill_page_desc(rxtop,
  3615. skb_shinfo(rxtop)->nr_frags,
  3616. buffer_info->rxbuf.page, 0, length);
  3617. }
  3618. e1000_consume_page(buffer_info, rxtop, length);
  3619. goto next_desc;
  3620. } else {
  3621. if (rxtop) {
  3622. /* end of the chain */
  3623. skb_fill_page_desc(rxtop,
  3624. skb_shinfo(rxtop)->nr_frags,
  3625. buffer_info->rxbuf.page, 0, length);
  3626. skb = rxtop;
  3627. rxtop = NULL;
  3628. e1000_consume_page(buffer_info, skb, length);
  3629. } else {
  3630. struct page *p;
  3631. /* no chain, got EOP, this buf is the packet
  3632. * copybreak to save the put_page/alloc_page
  3633. */
  3634. p = buffer_info->rxbuf.page;
  3635. if (length <= copybreak) {
  3636. u8 *vaddr;
  3637. if (likely(!(netdev->features & NETIF_F_RXFCS)))
  3638. length -= 4;
  3639. skb = e1000_alloc_rx_skb(adapter,
  3640. length);
  3641. if (!skb)
  3642. break;
  3643. vaddr = kmap_atomic(p);
  3644. memcpy(skb_tail_pointer(skb), vaddr,
  3645. length);
  3646. kunmap_atomic(vaddr);
  3647. /* re-use the page, so don't erase
  3648. * buffer_info->rxbuf.page
  3649. */
  3650. skb_put(skb, length);
  3651. e1000_rx_checksum(adapter,
  3652. status | rx_desc->errors << 24,
  3653. le16_to_cpu(rx_desc->csum), skb);
  3654. total_rx_bytes += skb->len;
  3655. total_rx_packets++;
  3656. e1000_receive_skb(adapter, status,
  3657. rx_desc->special, skb);
  3658. goto next_desc;
  3659. } else {
  3660. skb = napi_get_frags(&adapter->napi);
  3661. if (!skb) {
  3662. adapter->alloc_rx_buff_failed++;
  3663. break;
  3664. }
  3665. skb_fill_page_desc(skb, 0, p, 0,
  3666. length);
  3667. e1000_consume_page(buffer_info, skb,
  3668. length);
  3669. }
  3670. }
  3671. }
  3672. /* Receive Checksum Offload XXX recompute due to CRC strip? */
  3673. e1000_rx_checksum(adapter,
  3674. (u32)(status) |
  3675. ((u32)(rx_desc->errors) << 24),
  3676. le16_to_cpu(rx_desc->csum), skb);
  3677. total_rx_bytes += (skb->len - 4); /* don't count FCS */
  3678. if (likely(!(netdev->features & NETIF_F_RXFCS)))
  3679. pskb_trim(skb, skb->len - 4);
  3680. total_rx_packets++;
  3681. if (status & E1000_RXD_STAT_VP) {
  3682. __le16 vlan = rx_desc->special;
  3683. u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
  3684. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
  3685. }
  3686. napi_gro_frags(&adapter->napi);
  3687. next_desc:
  3688. rx_desc->status = 0;
  3689. /* return some buffers to hardware, one at a time is too slow */
  3690. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3691. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3692. cleaned_count = 0;
  3693. }
  3694. /* use prefetched values */
  3695. rx_desc = next_rxd;
  3696. buffer_info = next_buffer;
  3697. }
  3698. rx_ring->next_to_clean = i;
  3699. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3700. if (cleaned_count)
  3701. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3702. adapter->total_rx_packets += total_rx_packets;
  3703. adapter->total_rx_bytes += total_rx_bytes;
  3704. netdev->stats.rx_bytes += total_rx_bytes;
  3705. netdev->stats.rx_packets += total_rx_packets;
  3706. return cleaned;
  3707. }
  3708. /* this should improve performance for small packets with large amounts
  3709. * of reassembly being done in the stack
  3710. */
  3711. static struct sk_buff *e1000_copybreak(struct e1000_adapter *adapter,
  3712. struct e1000_rx_buffer *buffer_info,
  3713. u32 length, const void *data)
  3714. {
  3715. struct sk_buff *skb;
  3716. if (length > copybreak)
  3717. return NULL;
  3718. skb = e1000_alloc_rx_skb(adapter, length);
  3719. if (!skb)
  3720. return NULL;
  3721. dma_sync_single_for_cpu(&adapter->pdev->dev, buffer_info->dma,
  3722. length, DMA_FROM_DEVICE);
  3723. skb_put_data(skb, data, length);
  3724. return skb;
  3725. }
  3726. /**
  3727. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3728. * @adapter: board private structure
  3729. * @rx_ring: ring to clean
  3730. * @work_done: amount of napi work completed this call
  3731. * @work_to_do: max amount of work allowed for this call to do
  3732. */
  3733. static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3734. struct e1000_rx_ring *rx_ring,
  3735. int *work_done, int work_to_do)
  3736. {
  3737. struct net_device *netdev = adapter->netdev;
  3738. struct pci_dev *pdev = adapter->pdev;
  3739. struct e1000_rx_desc *rx_desc, *next_rxd;
  3740. struct e1000_rx_buffer *buffer_info, *next_buffer;
  3741. u32 length;
  3742. unsigned int i;
  3743. int cleaned_count = 0;
  3744. bool cleaned = false;
  3745. unsigned int total_rx_bytes = 0, total_rx_packets = 0;
  3746. i = rx_ring->next_to_clean;
  3747. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3748. buffer_info = &rx_ring->buffer_info[i];
  3749. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3750. struct sk_buff *skb;
  3751. u8 *data;
  3752. u8 status;
  3753. if (*work_done >= work_to_do)
  3754. break;
  3755. (*work_done)++;
  3756. dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
  3757. status = rx_desc->status;
  3758. length = le16_to_cpu(rx_desc->length);
  3759. data = buffer_info->rxbuf.data;
  3760. prefetch(data);
  3761. skb = e1000_copybreak(adapter, buffer_info, length, data);
  3762. if (!skb) {
  3763. unsigned int frag_len = e1000_frag_len(adapter);
  3764. skb = build_skb(data - E1000_HEADROOM, frag_len);
  3765. if (!skb) {
  3766. adapter->alloc_rx_buff_failed++;
  3767. break;
  3768. }
  3769. skb_reserve(skb, E1000_HEADROOM);
  3770. dma_unmap_single(&pdev->dev, buffer_info->dma,
  3771. adapter->rx_buffer_len,
  3772. DMA_FROM_DEVICE);
  3773. buffer_info->dma = 0;
  3774. buffer_info->rxbuf.data = NULL;
  3775. }
  3776. if (++i == rx_ring->count)
  3777. i = 0;
  3778. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3779. prefetch(next_rxd);
  3780. next_buffer = &rx_ring->buffer_info[i];
  3781. cleaned = true;
  3782. cleaned_count++;
  3783. /* !EOP means multiple descriptors were used to store a single
  3784. * packet, if thats the case we need to toss it. In fact, we
  3785. * to toss every packet with the EOP bit clear and the next
  3786. * frame that _does_ have the EOP bit set, as it is by
  3787. * definition only a frame fragment
  3788. */
  3789. if (unlikely(!(status & E1000_RXD_STAT_EOP)))
  3790. adapter->discarding = true;
  3791. if (adapter->discarding) {
  3792. /* All receives must fit into a single buffer */
  3793. netdev_dbg(netdev, "Receive packet consumed multiple buffers\n");
  3794. dev_kfree_skb(skb);
  3795. if (status & E1000_RXD_STAT_EOP)
  3796. adapter->discarding = false;
  3797. goto next_desc;
  3798. }
  3799. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3800. if (e1000_tbi_should_accept(adapter, status,
  3801. rx_desc->errors,
  3802. length, data)) {
  3803. length--;
  3804. } else if (netdev->features & NETIF_F_RXALL) {
  3805. goto process_skb;
  3806. } else {
  3807. dev_kfree_skb(skb);
  3808. goto next_desc;
  3809. }
  3810. }
  3811. process_skb:
  3812. total_rx_bytes += (length - 4); /* don't count FCS */
  3813. total_rx_packets++;
  3814. if (likely(!(netdev->features & NETIF_F_RXFCS)))
  3815. /* adjust length to remove Ethernet CRC, this must be
  3816. * done after the TBI_ACCEPT workaround above
  3817. */
  3818. length -= 4;
  3819. if (buffer_info->rxbuf.data == NULL)
  3820. skb_put(skb, length);
  3821. else /* copybreak skb */
  3822. skb_trim(skb, length);
  3823. /* Receive Checksum Offload */
  3824. e1000_rx_checksum(adapter,
  3825. (u32)(status) |
  3826. ((u32)(rx_desc->errors) << 24),
  3827. le16_to_cpu(rx_desc->csum), skb);
  3828. e1000_receive_skb(adapter, status, rx_desc->special, skb);
  3829. next_desc:
  3830. rx_desc->status = 0;
  3831. /* return some buffers to hardware, one at a time is too slow */
  3832. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3833. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3834. cleaned_count = 0;
  3835. }
  3836. /* use prefetched values */
  3837. rx_desc = next_rxd;
  3838. buffer_info = next_buffer;
  3839. }
  3840. rx_ring->next_to_clean = i;
  3841. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3842. if (cleaned_count)
  3843. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3844. adapter->total_rx_packets += total_rx_packets;
  3845. adapter->total_rx_bytes += total_rx_bytes;
  3846. netdev->stats.rx_bytes += total_rx_bytes;
  3847. netdev->stats.rx_packets += total_rx_packets;
  3848. return cleaned;
  3849. }
  3850. /**
  3851. * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
  3852. * @adapter: address of board private structure
  3853. * @rx_ring: pointer to receive ring structure
  3854. * @cleaned_count: number of buffers to allocate this pass
  3855. **/
  3856. static void
  3857. e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
  3858. struct e1000_rx_ring *rx_ring, int cleaned_count)
  3859. {
  3860. struct pci_dev *pdev = adapter->pdev;
  3861. struct e1000_rx_desc *rx_desc;
  3862. struct e1000_rx_buffer *buffer_info;
  3863. unsigned int i;
  3864. i = rx_ring->next_to_use;
  3865. buffer_info = &rx_ring->buffer_info[i];
  3866. while (cleaned_count--) {
  3867. /* allocate a new page if necessary */
  3868. if (!buffer_info->rxbuf.page) {
  3869. buffer_info->rxbuf.page = alloc_page(GFP_ATOMIC);
  3870. if (unlikely(!buffer_info->rxbuf.page)) {
  3871. adapter->alloc_rx_buff_failed++;
  3872. break;
  3873. }
  3874. }
  3875. if (!buffer_info->dma) {
  3876. buffer_info->dma = dma_map_page(&pdev->dev,
  3877. buffer_info->rxbuf.page, 0,
  3878. adapter->rx_buffer_len,
  3879. DMA_FROM_DEVICE);
  3880. if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
  3881. put_page(buffer_info->rxbuf.page);
  3882. buffer_info->rxbuf.page = NULL;
  3883. buffer_info->dma = 0;
  3884. adapter->alloc_rx_buff_failed++;
  3885. break;
  3886. }
  3887. }
  3888. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3889. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3890. if (unlikely(++i == rx_ring->count))
  3891. i = 0;
  3892. buffer_info = &rx_ring->buffer_info[i];
  3893. }
  3894. if (likely(rx_ring->next_to_use != i)) {
  3895. rx_ring->next_to_use = i;
  3896. if (unlikely(i-- == 0))
  3897. i = (rx_ring->count - 1);
  3898. /* Force memory writes to complete before letting h/w
  3899. * know there are new descriptors to fetch. (Only
  3900. * applicable for weak-ordered memory model archs,
  3901. * such as IA-64).
  3902. */
  3903. wmb();
  3904. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3905. }
  3906. }
  3907. /**
  3908. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3909. * @adapter: address of board private structure
  3910. **/
  3911. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3912. struct e1000_rx_ring *rx_ring,
  3913. int cleaned_count)
  3914. {
  3915. struct e1000_hw *hw = &adapter->hw;
  3916. struct pci_dev *pdev = adapter->pdev;
  3917. struct e1000_rx_desc *rx_desc;
  3918. struct e1000_rx_buffer *buffer_info;
  3919. unsigned int i;
  3920. unsigned int bufsz = adapter->rx_buffer_len;
  3921. i = rx_ring->next_to_use;
  3922. buffer_info = &rx_ring->buffer_info[i];
  3923. while (cleaned_count--) {
  3924. void *data;
  3925. if (buffer_info->rxbuf.data)
  3926. goto skip;
  3927. data = e1000_alloc_frag(adapter);
  3928. if (!data) {
  3929. /* Better luck next round */
  3930. adapter->alloc_rx_buff_failed++;
  3931. break;
  3932. }
  3933. /* Fix for errata 23, can't cross 64kB boundary */
  3934. if (!e1000_check_64k_bound(adapter, data, bufsz)) {
  3935. void *olddata = data;
  3936. e_err(rx_err, "skb align check failed: %u bytes at "
  3937. "%p\n", bufsz, data);
  3938. /* Try again, without freeing the previous */
  3939. data = e1000_alloc_frag(adapter);
  3940. /* Failed allocation, critical failure */
  3941. if (!data) {
  3942. skb_free_frag(olddata);
  3943. adapter->alloc_rx_buff_failed++;
  3944. break;
  3945. }
  3946. if (!e1000_check_64k_bound(adapter, data, bufsz)) {
  3947. /* give up */
  3948. skb_free_frag(data);
  3949. skb_free_frag(olddata);
  3950. adapter->alloc_rx_buff_failed++;
  3951. break;
  3952. }
  3953. /* Use new allocation */
  3954. skb_free_frag(olddata);
  3955. }
  3956. buffer_info->dma = dma_map_single(&pdev->dev,
  3957. data,
  3958. adapter->rx_buffer_len,
  3959. DMA_FROM_DEVICE);
  3960. if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
  3961. skb_free_frag(data);
  3962. buffer_info->dma = 0;
  3963. adapter->alloc_rx_buff_failed++;
  3964. break;
  3965. }
  3966. /* XXX if it was allocated cleanly it will never map to a
  3967. * boundary crossing
  3968. */
  3969. /* Fix for errata 23, can't cross 64kB boundary */
  3970. if (!e1000_check_64k_bound(adapter,
  3971. (void *)(unsigned long)buffer_info->dma,
  3972. adapter->rx_buffer_len)) {
  3973. e_err(rx_err, "dma align check failed: %u bytes at "
  3974. "%p\n", adapter->rx_buffer_len,
  3975. (void *)(unsigned long)buffer_info->dma);
  3976. dma_unmap_single(&pdev->dev, buffer_info->dma,
  3977. adapter->rx_buffer_len,
  3978. DMA_FROM_DEVICE);
  3979. skb_free_frag(data);
  3980. buffer_info->rxbuf.data = NULL;
  3981. buffer_info->dma = 0;
  3982. adapter->alloc_rx_buff_failed++;
  3983. break;
  3984. }
  3985. buffer_info->rxbuf.data = data;
  3986. skip:
  3987. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3988. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3989. if (unlikely(++i == rx_ring->count))
  3990. i = 0;
  3991. buffer_info = &rx_ring->buffer_info[i];
  3992. }
  3993. if (likely(rx_ring->next_to_use != i)) {
  3994. rx_ring->next_to_use = i;
  3995. if (unlikely(i-- == 0))
  3996. i = (rx_ring->count - 1);
  3997. /* Force memory writes to complete before letting h/w
  3998. * know there are new descriptors to fetch. (Only
  3999. * applicable for weak-ordered memory model archs,
  4000. * such as IA-64).
  4001. */
  4002. wmb();
  4003. writel(i, hw->hw_addr + rx_ring->rdt);
  4004. }
  4005. }
  4006. /**
  4007. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  4008. * @adapter:
  4009. **/
  4010. static void e1000_smartspeed(struct e1000_adapter *adapter)
  4011. {
  4012. struct e1000_hw *hw = &adapter->hw;
  4013. u16 phy_status;
  4014. u16 phy_ctrl;
  4015. if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
  4016. !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
  4017. return;
  4018. if (adapter->smartspeed == 0) {
  4019. /* If Master/Slave config fault is asserted twice,
  4020. * we assume back-to-back
  4021. */
  4022. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
  4023. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT))
  4024. return;
  4025. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
  4026. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT))
  4027. return;
  4028. e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
  4029. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  4030. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  4031. e1000_write_phy_reg(hw, PHY_1000T_CTRL,
  4032. phy_ctrl);
  4033. adapter->smartspeed++;
  4034. if (!e1000_phy_setup_autoneg(hw) &&
  4035. !e1000_read_phy_reg(hw, PHY_CTRL,
  4036. &phy_ctrl)) {
  4037. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  4038. MII_CR_RESTART_AUTO_NEG);
  4039. e1000_write_phy_reg(hw, PHY_CTRL,
  4040. phy_ctrl);
  4041. }
  4042. }
  4043. return;
  4044. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  4045. /* If still no link, perhaps using 2/3 pair cable */
  4046. e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
  4047. phy_ctrl |= CR_1000T_MS_ENABLE;
  4048. e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
  4049. if (!e1000_phy_setup_autoneg(hw) &&
  4050. !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
  4051. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  4052. MII_CR_RESTART_AUTO_NEG);
  4053. e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
  4054. }
  4055. }
  4056. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  4057. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  4058. adapter->smartspeed = 0;
  4059. }
  4060. /**
  4061. * e1000_ioctl -
  4062. * @netdev:
  4063. * @ifreq:
  4064. * @cmd:
  4065. **/
  4066. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  4067. {
  4068. switch (cmd) {
  4069. case SIOCGMIIPHY:
  4070. case SIOCGMIIREG:
  4071. case SIOCSMIIREG:
  4072. return e1000_mii_ioctl(netdev, ifr, cmd);
  4073. default:
  4074. return -EOPNOTSUPP;
  4075. }
  4076. }
  4077. /**
  4078. * e1000_mii_ioctl -
  4079. * @netdev:
  4080. * @ifreq:
  4081. * @cmd:
  4082. **/
  4083. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  4084. int cmd)
  4085. {
  4086. struct e1000_adapter *adapter = netdev_priv(netdev);
  4087. struct e1000_hw *hw = &adapter->hw;
  4088. struct mii_ioctl_data *data = if_mii(ifr);
  4089. int retval;
  4090. u16 mii_reg;
  4091. unsigned long flags;
  4092. if (hw->media_type != e1000_media_type_copper)
  4093. return -EOPNOTSUPP;
  4094. switch (cmd) {
  4095. case SIOCGMIIPHY:
  4096. data->phy_id = hw->phy_addr;
  4097. break;
  4098. case SIOCGMIIREG:
  4099. spin_lock_irqsave(&adapter->stats_lock, flags);
  4100. if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
  4101. &data->val_out)) {
  4102. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4103. return -EIO;
  4104. }
  4105. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4106. break;
  4107. case SIOCSMIIREG:
  4108. if (data->reg_num & ~(0x1F))
  4109. return -EFAULT;
  4110. mii_reg = data->val_in;
  4111. spin_lock_irqsave(&adapter->stats_lock, flags);
  4112. if (e1000_write_phy_reg(hw, data->reg_num,
  4113. mii_reg)) {
  4114. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4115. return -EIO;
  4116. }
  4117. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4118. if (hw->media_type == e1000_media_type_copper) {
  4119. switch (data->reg_num) {
  4120. case PHY_CTRL:
  4121. if (mii_reg & MII_CR_POWER_DOWN)
  4122. break;
  4123. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  4124. hw->autoneg = 1;
  4125. hw->autoneg_advertised = 0x2F;
  4126. } else {
  4127. u32 speed;
  4128. if (mii_reg & 0x40)
  4129. speed = SPEED_1000;
  4130. else if (mii_reg & 0x2000)
  4131. speed = SPEED_100;
  4132. else
  4133. speed = SPEED_10;
  4134. retval = e1000_set_spd_dplx(
  4135. adapter, speed,
  4136. ((mii_reg & 0x100)
  4137. ? DUPLEX_FULL :
  4138. DUPLEX_HALF));
  4139. if (retval)
  4140. return retval;
  4141. }
  4142. if (netif_running(adapter->netdev))
  4143. e1000_reinit_locked(adapter);
  4144. else
  4145. e1000_reset(adapter);
  4146. break;
  4147. case M88E1000_PHY_SPEC_CTRL:
  4148. case M88E1000_EXT_PHY_SPEC_CTRL:
  4149. if (e1000_phy_reset(hw))
  4150. return -EIO;
  4151. break;
  4152. }
  4153. } else {
  4154. switch (data->reg_num) {
  4155. case PHY_CTRL:
  4156. if (mii_reg & MII_CR_POWER_DOWN)
  4157. break;
  4158. if (netif_running(adapter->netdev))
  4159. e1000_reinit_locked(adapter);
  4160. else
  4161. e1000_reset(adapter);
  4162. break;
  4163. }
  4164. }
  4165. break;
  4166. default:
  4167. return -EOPNOTSUPP;
  4168. }
  4169. return E1000_SUCCESS;
  4170. }
  4171. void e1000_pci_set_mwi(struct e1000_hw *hw)
  4172. {
  4173. struct e1000_adapter *adapter = hw->back;
  4174. int ret_val = pci_set_mwi(adapter->pdev);
  4175. if (ret_val)
  4176. e_err(probe, "Error in setting MWI\n");
  4177. }
  4178. void e1000_pci_clear_mwi(struct e1000_hw *hw)
  4179. {
  4180. struct e1000_adapter *adapter = hw->back;
  4181. pci_clear_mwi(adapter->pdev);
  4182. }
  4183. int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
  4184. {
  4185. struct e1000_adapter *adapter = hw->back;
  4186. return pcix_get_mmrbc(adapter->pdev);
  4187. }
  4188. void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
  4189. {
  4190. struct e1000_adapter *adapter = hw->back;
  4191. pcix_set_mmrbc(adapter->pdev, mmrbc);
  4192. }
  4193. void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
  4194. {
  4195. outl(value, port);
  4196. }
  4197. static bool e1000_vlan_used(struct e1000_adapter *adapter)
  4198. {
  4199. u16 vid;
  4200. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  4201. return true;
  4202. return false;
  4203. }
  4204. static void __e1000_vlan_mode(struct e1000_adapter *adapter,
  4205. netdev_features_t features)
  4206. {
  4207. struct e1000_hw *hw = &adapter->hw;
  4208. u32 ctrl;
  4209. ctrl = er32(CTRL);
  4210. if (features & NETIF_F_HW_VLAN_CTAG_RX) {
  4211. /* enable VLAN tag insert/strip */
  4212. ctrl |= E1000_CTRL_VME;
  4213. } else {
  4214. /* disable VLAN tag insert/strip */
  4215. ctrl &= ~E1000_CTRL_VME;
  4216. }
  4217. ew32(CTRL, ctrl);
  4218. }
  4219. static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
  4220. bool filter_on)
  4221. {
  4222. struct e1000_hw *hw = &adapter->hw;
  4223. u32 rctl;
  4224. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4225. e1000_irq_disable(adapter);
  4226. __e1000_vlan_mode(adapter, adapter->netdev->features);
  4227. if (filter_on) {
  4228. /* enable VLAN receive filtering */
  4229. rctl = er32(RCTL);
  4230. rctl &= ~E1000_RCTL_CFIEN;
  4231. if (!(adapter->netdev->flags & IFF_PROMISC))
  4232. rctl |= E1000_RCTL_VFE;
  4233. ew32(RCTL, rctl);
  4234. e1000_update_mng_vlan(adapter);
  4235. } else {
  4236. /* disable VLAN receive filtering */
  4237. rctl = er32(RCTL);
  4238. rctl &= ~E1000_RCTL_VFE;
  4239. ew32(RCTL, rctl);
  4240. }
  4241. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4242. e1000_irq_enable(adapter);
  4243. }
  4244. static void e1000_vlan_mode(struct net_device *netdev,
  4245. netdev_features_t features)
  4246. {
  4247. struct e1000_adapter *adapter = netdev_priv(netdev);
  4248. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4249. e1000_irq_disable(adapter);
  4250. __e1000_vlan_mode(adapter, features);
  4251. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4252. e1000_irq_enable(adapter);
  4253. }
  4254. static int e1000_vlan_rx_add_vid(struct net_device *netdev,
  4255. __be16 proto, u16 vid)
  4256. {
  4257. struct e1000_adapter *adapter = netdev_priv(netdev);
  4258. struct e1000_hw *hw = &adapter->hw;
  4259. u32 vfta, index;
  4260. if ((hw->mng_cookie.status &
  4261. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  4262. (vid == adapter->mng_vlan_id))
  4263. return 0;
  4264. if (!e1000_vlan_used(adapter))
  4265. e1000_vlan_filter_on_off(adapter, true);
  4266. /* add VID to filter table */
  4267. index = (vid >> 5) & 0x7F;
  4268. vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
  4269. vfta |= (1 << (vid & 0x1F));
  4270. e1000_write_vfta(hw, index, vfta);
  4271. set_bit(vid, adapter->active_vlans);
  4272. return 0;
  4273. }
  4274. static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
  4275. __be16 proto, u16 vid)
  4276. {
  4277. struct e1000_adapter *adapter = netdev_priv(netdev);
  4278. struct e1000_hw *hw = &adapter->hw;
  4279. u32 vfta, index;
  4280. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4281. e1000_irq_disable(adapter);
  4282. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4283. e1000_irq_enable(adapter);
  4284. /* remove VID from filter table */
  4285. index = (vid >> 5) & 0x7F;
  4286. vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
  4287. vfta &= ~(1 << (vid & 0x1F));
  4288. e1000_write_vfta(hw, index, vfta);
  4289. clear_bit(vid, adapter->active_vlans);
  4290. if (!e1000_vlan_used(adapter))
  4291. e1000_vlan_filter_on_off(adapter, false);
  4292. return 0;
  4293. }
  4294. static void e1000_restore_vlan(struct e1000_adapter *adapter)
  4295. {
  4296. u16 vid;
  4297. if (!e1000_vlan_used(adapter))
  4298. return;
  4299. e1000_vlan_filter_on_off(adapter, true);
  4300. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  4301. e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
  4302. }
  4303. int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
  4304. {
  4305. struct e1000_hw *hw = &adapter->hw;
  4306. hw->autoneg = 0;
  4307. /* Make sure dplx is at most 1 bit and lsb of speed is not set
  4308. * for the switch() below to work
  4309. */
  4310. if ((spd & 1) || (dplx & ~1))
  4311. goto err_inval;
  4312. /* Fiber NICs only allow 1000 gbps Full duplex */
  4313. if ((hw->media_type == e1000_media_type_fiber) &&
  4314. spd != SPEED_1000 &&
  4315. dplx != DUPLEX_FULL)
  4316. goto err_inval;
  4317. switch (spd + dplx) {
  4318. case SPEED_10 + DUPLEX_HALF:
  4319. hw->forced_speed_duplex = e1000_10_half;
  4320. break;
  4321. case SPEED_10 + DUPLEX_FULL:
  4322. hw->forced_speed_duplex = e1000_10_full;
  4323. break;
  4324. case SPEED_100 + DUPLEX_HALF:
  4325. hw->forced_speed_duplex = e1000_100_half;
  4326. break;
  4327. case SPEED_100 + DUPLEX_FULL:
  4328. hw->forced_speed_duplex = e1000_100_full;
  4329. break;
  4330. case SPEED_1000 + DUPLEX_FULL:
  4331. hw->autoneg = 1;
  4332. hw->autoneg_advertised = ADVERTISE_1000_FULL;
  4333. break;
  4334. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  4335. default:
  4336. goto err_inval;
  4337. }
  4338. /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
  4339. hw->mdix = AUTO_ALL_MODES;
  4340. return 0;
  4341. err_inval:
  4342. e_err(probe, "Unsupported Speed/Duplex configuration\n");
  4343. return -EINVAL;
  4344. }
  4345. static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
  4346. {
  4347. struct net_device *netdev = pci_get_drvdata(pdev);
  4348. struct e1000_adapter *adapter = netdev_priv(netdev);
  4349. struct e1000_hw *hw = &adapter->hw;
  4350. u32 ctrl, ctrl_ext, rctl, status;
  4351. u32 wufc = adapter->wol;
  4352. #ifdef CONFIG_PM
  4353. int retval = 0;
  4354. #endif
  4355. netif_device_detach(netdev);
  4356. if (netif_running(netdev)) {
  4357. int count = E1000_CHECK_RESET_COUNT;
  4358. while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
  4359. usleep_range(10000, 20000);
  4360. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  4361. e1000_down(adapter);
  4362. }
  4363. #ifdef CONFIG_PM
  4364. retval = pci_save_state(pdev);
  4365. if (retval)
  4366. return retval;
  4367. #endif
  4368. status = er32(STATUS);
  4369. if (status & E1000_STATUS_LU)
  4370. wufc &= ~E1000_WUFC_LNKC;
  4371. if (wufc) {
  4372. e1000_setup_rctl(adapter);
  4373. e1000_set_rx_mode(netdev);
  4374. rctl = er32(RCTL);
  4375. /* turn on all-multi mode if wake on multicast is enabled */
  4376. if (wufc & E1000_WUFC_MC)
  4377. rctl |= E1000_RCTL_MPE;
  4378. /* enable receives in the hardware */
  4379. ew32(RCTL, rctl | E1000_RCTL_EN);
  4380. if (hw->mac_type >= e1000_82540) {
  4381. ctrl = er32(CTRL);
  4382. /* advertise wake from D3Cold */
  4383. #define E1000_CTRL_ADVD3WUC 0x00100000
  4384. /* phy power management enable */
  4385. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  4386. ctrl |= E1000_CTRL_ADVD3WUC |
  4387. E1000_CTRL_EN_PHY_PWR_MGMT;
  4388. ew32(CTRL, ctrl);
  4389. }
  4390. if (hw->media_type == e1000_media_type_fiber ||
  4391. hw->media_type == e1000_media_type_internal_serdes) {
  4392. /* keep the laser running in D3 */
  4393. ctrl_ext = er32(CTRL_EXT);
  4394. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  4395. ew32(CTRL_EXT, ctrl_ext);
  4396. }
  4397. ew32(WUC, E1000_WUC_PME_EN);
  4398. ew32(WUFC, wufc);
  4399. } else {
  4400. ew32(WUC, 0);
  4401. ew32(WUFC, 0);
  4402. }
  4403. e1000_release_manageability(adapter);
  4404. *enable_wake = !!wufc;
  4405. /* make sure adapter isn't asleep if manageability is enabled */
  4406. if (adapter->en_mng_pt)
  4407. *enable_wake = true;
  4408. if (netif_running(netdev))
  4409. e1000_free_irq(adapter);
  4410. if (!test_and_set_bit(__E1000_DISABLED, &adapter->flags))
  4411. pci_disable_device(pdev);
  4412. return 0;
  4413. }
  4414. #ifdef CONFIG_PM
  4415. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  4416. {
  4417. int retval;
  4418. bool wake;
  4419. retval = __e1000_shutdown(pdev, &wake);
  4420. if (retval)
  4421. return retval;
  4422. if (wake) {
  4423. pci_prepare_to_sleep(pdev);
  4424. } else {
  4425. pci_wake_from_d3(pdev, false);
  4426. pci_set_power_state(pdev, PCI_D3hot);
  4427. }
  4428. return 0;
  4429. }
  4430. static int e1000_resume(struct pci_dev *pdev)
  4431. {
  4432. struct net_device *netdev = pci_get_drvdata(pdev);
  4433. struct e1000_adapter *adapter = netdev_priv(netdev);
  4434. struct e1000_hw *hw = &adapter->hw;
  4435. u32 err;
  4436. pci_set_power_state(pdev, PCI_D0);
  4437. pci_restore_state(pdev);
  4438. pci_save_state(pdev);
  4439. if (adapter->need_ioport)
  4440. err = pci_enable_device(pdev);
  4441. else
  4442. err = pci_enable_device_mem(pdev);
  4443. if (err) {
  4444. pr_err("Cannot enable PCI device from suspend\n");
  4445. return err;
  4446. }
  4447. /* flush memory to make sure state is correct */
  4448. smp_mb__before_atomic();
  4449. clear_bit(__E1000_DISABLED, &adapter->flags);
  4450. pci_set_master(pdev);
  4451. pci_enable_wake(pdev, PCI_D3hot, 0);
  4452. pci_enable_wake(pdev, PCI_D3cold, 0);
  4453. if (netif_running(netdev)) {
  4454. err = e1000_request_irq(adapter);
  4455. if (err)
  4456. return err;
  4457. }
  4458. e1000_power_up_phy(adapter);
  4459. e1000_reset(adapter);
  4460. ew32(WUS, ~0);
  4461. e1000_init_manageability(adapter);
  4462. if (netif_running(netdev))
  4463. e1000_up(adapter);
  4464. netif_device_attach(netdev);
  4465. return 0;
  4466. }
  4467. #endif
  4468. static void e1000_shutdown(struct pci_dev *pdev)
  4469. {
  4470. bool wake;
  4471. __e1000_shutdown(pdev, &wake);
  4472. if (system_state == SYSTEM_POWER_OFF) {
  4473. pci_wake_from_d3(pdev, wake);
  4474. pci_set_power_state(pdev, PCI_D3hot);
  4475. }
  4476. }
  4477. #ifdef CONFIG_NET_POLL_CONTROLLER
  4478. /* Polling 'interrupt' - used by things like netconsole to send skbs
  4479. * without having to re-enable interrupts. It's not called while
  4480. * the interrupt routine is executing.
  4481. */
  4482. static void e1000_netpoll(struct net_device *netdev)
  4483. {
  4484. struct e1000_adapter *adapter = netdev_priv(netdev);
  4485. if (disable_hardirq(adapter->pdev->irq))
  4486. e1000_intr(adapter->pdev->irq, netdev);
  4487. enable_irq(adapter->pdev->irq);
  4488. }
  4489. #endif
  4490. /**
  4491. * e1000_io_error_detected - called when PCI error is detected
  4492. * @pdev: Pointer to PCI device
  4493. * @state: The current pci connection state
  4494. *
  4495. * This function is called after a PCI bus error affecting
  4496. * this device has been detected.
  4497. */
  4498. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  4499. pci_channel_state_t state)
  4500. {
  4501. struct net_device *netdev = pci_get_drvdata(pdev);
  4502. struct e1000_adapter *adapter = netdev_priv(netdev);
  4503. netif_device_detach(netdev);
  4504. if (state == pci_channel_io_perm_failure)
  4505. return PCI_ERS_RESULT_DISCONNECT;
  4506. if (netif_running(netdev))
  4507. e1000_down(adapter);
  4508. if (!test_and_set_bit(__E1000_DISABLED, &adapter->flags))
  4509. pci_disable_device(pdev);
  4510. /* Request a slot slot reset. */
  4511. return PCI_ERS_RESULT_NEED_RESET;
  4512. }
  4513. /**
  4514. * e1000_io_slot_reset - called after the pci bus has been reset.
  4515. * @pdev: Pointer to PCI device
  4516. *
  4517. * Restart the card from scratch, as if from a cold-boot. Implementation
  4518. * resembles the first-half of the e1000_resume routine.
  4519. */
  4520. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4521. {
  4522. struct net_device *netdev = pci_get_drvdata(pdev);
  4523. struct e1000_adapter *adapter = netdev_priv(netdev);
  4524. struct e1000_hw *hw = &adapter->hw;
  4525. int err;
  4526. if (adapter->need_ioport)
  4527. err = pci_enable_device(pdev);
  4528. else
  4529. err = pci_enable_device_mem(pdev);
  4530. if (err) {
  4531. pr_err("Cannot re-enable PCI device after reset.\n");
  4532. return PCI_ERS_RESULT_DISCONNECT;
  4533. }
  4534. /* flush memory to make sure state is correct */
  4535. smp_mb__before_atomic();
  4536. clear_bit(__E1000_DISABLED, &adapter->flags);
  4537. pci_set_master(pdev);
  4538. pci_enable_wake(pdev, PCI_D3hot, 0);
  4539. pci_enable_wake(pdev, PCI_D3cold, 0);
  4540. e1000_reset(adapter);
  4541. ew32(WUS, ~0);
  4542. return PCI_ERS_RESULT_RECOVERED;
  4543. }
  4544. /**
  4545. * e1000_io_resume - called when traffic can start flowing again.
  4546. * @pdev: Pointer to PCI device
  4547. *
  4548. * This callback is called when the error recovery driver tells us that
  4549. * its OK to resume normal operation. Implementation resembles the
  4550. * second-half of the e1000_resume routine.
  4551. */
  4552. static void e1000_io_resume(struct pci_dev *pdev)
  4553. {
  4554. struct net_device *netdev = pci_get_drvdata(pdev);
  4555. struct e1000_adapter *adapter = netdev_priv(netdev);
  4556. e1000_init_manageability(adapter);
  4557. if (netif_running(netdev)) {
  4558. if (e1000_up(adapter)) {
  4559. pr_info("can't bring device back up after reset\n");
  4560. return;
  4561. }
  4562. }
  4563. netif_device_attach(netdev);
  4564. }
  4565. /* e1000_main.c */