ark1668_vin.c 68 KB

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  1. /*
  2. * Arkmicro v4l2 driver
  3. *
  4. * Licensed under GPLv2 or later.
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/clkdev.h>
  8. #include <linux/clk-provider.h>
  9. #include <linux/delay.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/math64.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/of_graph.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/pm_runtime.h>
  17. #include <linux/regmap.h>
  18. #include <linux/videodev2.h>
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/mm.h>
  22. #include <linux/slab.h>
  23. #include <linux/fs.h>
  24. #include <linux/errno.h>
  25. #include <asm/uaccess.h>
  26. #include <linux/list.h>
  27. #include <linux/sched.h>
  28. #include <linux/poll.h>
  29. #include <linux/gpio.h>
  30. #include <asm/setup.h>
  31. #include <linux/dma-mapping.h>
  32. #include <media/v4l2-ctrls.h>
  33. #include <media/v4l2-device.h>
  34. #include <media/v4l2-event.h>
  35. #include <media/v4l2-image-sizes.h>
  36. #include <media/v4l2-ioctl.h>
  37. #include <media/v4l2-fwnode.h>
  38. #include <media/v4l2-subdev.h>
  39. #include <media/videobuf2-dma-contig.h>
  40. #include "ark1668_vin.h"
  41. extern int ark_itu656_display_init(int src_width, int src_height,int out_posx, int out_posy,int out_width, int out_height,int interlace);
  42. extern int ark_itu656_display_addr(unsigned int addr);
  43. extern int ark_itu656_display_uninit(void);
  44. extern int ark168vin_set_display(int layer, unsigned int cmd, void *arg);
  45. extern int ark_disp_set_layer_en(int layer_id, int enable);
  46. extern int ark_carback_get_status(void);
  47. extern int ark168vin_set_scal(int layer,int src_w, int src_h,int out_w,int out_h);
  48. extern void carback_first_enter(void);
  49. int dvr_enter_carback(void);
  50. int dvr_exit_carback(void);
  51. static void vin_start(struct dvr_dev *vin);
  52. static void vin_init(struct ark1668_vin_device *vin, struct vin_para *para);
  53. static void vin_stop(struct dvr_dev *vin);
  54. static void vin_exit(void);
  55. extern unsigned int g_screen_width;
  56. extern unsigned int g_screen_height;
  57. struct ark1668_vin_device* g_ark168_vin = NULL;
  58. static int vin_queue_setup(struct vb2_queue *vq,
  59. unsigned int *nbuffers, unsigned int *nplanes,
  60. unsigned int sizes[], struct device *alloc_devs[])
  61. {
  62. struct ark1668_vin_device* ark_vin = vb2_get_drv_priv(vq);
  63. unsigned int size = ark_vin->fmt.fmt.pix.sizeimage;
  64. if (*nplanes)
  65. return sizes[0] < size ? -EINVAL : 0;
  66. *nplanes = 1;
  67. sizes[0] = size;
  68. return 0;
  69. }
  70. static int vin_buffer_init(struct vb2_buffer *vb)
  71. {
  72. return 0;
  73. }
  74. static int vin_buffer_prepare(struct vb2_buffer *vb)
  75. {
  76. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  77. struct ark1668_vin_device* ark_vin = vb2_get_drv_priv(vb->vb2_queue);
  78. unsigned long size = ark_vin->fmt.fmt.pix.sizeimage;
  79. if (vb2_plane_size(vb, 0) < size) {
  80. v4l2_err(&ark_vin->v4l2_dev, "buffer too small (%lu < %lu)\n",
  81. vb2_plane_size(vb, 0), size);
  82. return -EINVAL;
  83. }
  84. vb2_set_plane_payload(vb, 0, size);
  85. vbuf->field = ark_vin->fmt.fmt.pix.field;
  86. return 0;
  87. }
  88. static void vin_config(void)
  89. {
  90. struct vin_para para = {0};
  91. struct ark_private_data *arkvin_priv = g_ark168_vin->pdata.g_arkvin_priv;
  92. para.source = DVR_SOURCE_AUX;
  93. if(!arkvin_priv->init){
  94. if(arkvin_priv->dvr_config() == 0){
  95. arkvin_priv->init = 1;
  96. }
  97. arkvin_priv->select_channel(arkvin_priv->channel);
  98. }
  99. para.width = vin_readl_lcd(ARK1668_LCDC_TIMING1) & 0xfff;
  100. para.height = vin_readl_lcd(ARK1668_LCDC_TIMING2) >> 10 & 0x7ff;
  101. spin_lock(&g_ark168_vin->dvr_dev->spin_lock);
  102. g_ark168_vin->dvr_dev->clock_scale_store = ((vin_readl_sys(ARK1668_SYS_DEVICE_CLK_CFG0) >> 24) & 0x0f);
  103. memcpy(&g_ark168_vin->dvr_dev->itu656in_back, &g_ark168_vin->dvr_dev->itu656in, sizeof(struct vin_para));
  104. g_ark168_vin->dvr_dev->carback_break = 0;
  105. if(arkvin_priv->get_progressive)
  106. para.progressive = arkvin_priv->get_progressive();
  107. vin_init(g_ark168_vin, &para);
  108. vin_start(g_ark168_vin->dvr_dev);
  109. g_ark168_vin->dvr_dev->enter_carback = 1;
  110. spin_unlock(&g_ark168_vin->dvr_dev->spin_lock);
  111. }
  112. static void vin_setaddr(struct ark1668_vin_device *vin)
  113. {
  114. struct v4l2_pix_format *pixfmt = &vin->fmt.fmt.pix;
  115. u32 sizeimage = pixfmt->sizeimage;
  116. dma_addr_t addr_dma;
  117. /* Get the physical address of the assigned BUF */
  118. addr_dma = vb2_dma_contig_plane_dma_addr(&vin->cur_frm->vb.vb2_buf, 0);
  119. ARKVIN_DBGPRTK("vin_setaddr addr_dma : %p\n",addr_dma);
  120. vin_writel(ARK1668_ITU656_DRAM_DEST1, addr_dma);
  121. }
  122. static int vin_start_streaming(struct vb2_queue *vq, unsigned int count)
  123. {
  124. struct ark1668_vin_device *vin = vb2_get_drv_priv(vq);
  125. unsigned long flags;
  126. g_ark168_vin->stream_flag = true;
  127. vin_config();
  128. spin_lock_irqsave(&vin->ark_queue_lock, flags);
  129. vin->sequence = 0;
  130. vin->stop = false;
  131. reinit_completion(&vin->comp);
  132. vin->cur_frm = list_first_entry(&vin->ark_queue,struct vin_buffer, list);
  133. ARKVIN_DBGPRTK("start_streaming->get out buf: %p\n",vin->cur_frm->vb.vb2_buf.planes[0].mem_priv);
  134. list_del(&vin->cur_frm->list);
  135. vin_setaddr(vin);
  136. spin_unlock_irqrestore(&vin->ark_queue_lock, flags);
  137. return 0;
  138. }
  139. static void vin_stop_streaming(struct vb2_queue *vq)
  140. {
  141. struct ark1668_vin_device* ark_vin = vb2_get_drv_priv(vq);
  142. struct vin_buffer *buf;
  143. unsigned long flags;
  144. ark_vin->stop = true;
  145. g_ark168_vin->stream_flag = false;
  146. vin_exit();
  147. /* Release all active buffers */
  148. spin_lock_irqsave(&ark_vin->ark_queue_lock, flags);
  149. if (unlikely(ark_vin->cur_frm)) {
  150. vb2_buffer_done(&ark_vin->cur_frm->vb.vb2_buf,
  151. VB2_BUF_STATE_ERROR);
  152. ark_vin->cur_frm = NULL;
  153. }
  154. list_for_each_entry(buf, &ark_vin->ark_queue, list)
  155. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  156. INIT_LIST_HEAD(&ark_vin->ark_queue);
  157. spin_unlock_irqrestore(&ark_vin->ark_queue_lock, flags);
  158. }
  159. static void vin_buffer_queue(struct vb2_buffer *vb)
  160. {
  161. ARKVIN_DBGPRTK("vin_buffer_queue add buf : %p\n",vb->planes[0].mem_priv);
  162. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  163. struct vin_buffer *buf = container_of(vbuf, struct vin_buffer, vb);
  164. struct ark1668_vin_device *vin = vb2_get_drv_priv(vb->vb2_queue);
  165. unsigned long flags;
  166. dma_addr_t addr_dma;
  167. addr_dma = vb2_dma_contig_plane_dma_addr(vb, 0);
  168. /*app buf physical address can be obtained directly from this variable */
  169. vb->planes[0].m.offset = addr_dma;
  170. ARKVIN_DBGPRTK("!vin->cur_frm = %d,list_empty(&vin->ark_queue)= %d,vb2_is_streaming(vb->vb2_queue) = %d\n",!vin->cur_frm,list_empty(&vin->ark_queue),vb2_is_streaming(vb->vb2_queue));
  171. spin_lock_irqsave(&vin->ark_queue_lock, flags);
  172. if (!vin->cur_frm && list_empty(&vin->ark_queue) && vb2_is_streaming(vb->vb2_queue)){
  173. vin->cur_frm = buf;
  174. vin_setaddr(vin);
  175. }
  176. else{
  177. /* add buf to list */
  178. list_add_tail(&buf->list, &vin->ark_queue);
  179. }
  180. spin_unlock_irqrestore(&vin->ark_queue_lock, flags);
  181. }
  182. static const struct vb2_ops vin_vb2_ops = {
  183. .queue_setup = vin_queue_setup,
  184. .buf_init = vin_buffer_init,
  185. .wait_prepare = vb2_ops_wait_prepare,
  186. .wait_finish = vb2_ops_wait_finish,
  187. .buf_prepare = vin_buffer_prepare,
  188. .start_streaming = vin_start_streaming,
  189. .stop_streaming = vin_stop_streaming,
  190. .buf_queue = vin_buffer_queue,
  191. };
  192. static int vin_querycap(struct file *file, void *priv,struct v4l2_capability *cap)
  193. {
  194. strcpy(cap->driver, ARK_VIN_NAME);
  195. strcpy(cap->card, "Ark videoin driver");
  196. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE;
  197. return 0;
  198. }
  199. static int vin_enum_fmt_vid_cap(struct file *file, void *priv,struct v4l2_fmtdesc *f)
  200. {
  201. u32 index = f->index;
  202. if (index >= 1)
  203. return -EINVAL;
  204. f->pixelformat = V4L2_PIX_FMT_VYUY;
  205. return 0;
  206. }
  207. static int vin_g_fmt_vid_cap(struct file *file, void *priv,struct v4l2_format *fmt)
  208. {
  209. struct ark1668_vin_device *vin = video_drvdata(file);
  210. *fmt = vin->fmt;
  211. return 0;
  212. }
  213. static int vin_try_fmt(struct ark1668_vin_device *vin, struct v4l2_format *f)
  214. {
  215. struct v4l2_pix_format *pixfmt = &f->fmt.pix;
  216. int ret;
  217. if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  218. return -EINVAL;
  219. pixfmt->width = CVBS_WIDTH;
  220. pixfmt->height = CVBS_HEIGHT;
  221. pixfmt->field = V4L2_FIELD_ANY;
  222. pixfmt->bytesperline = (pixfmt->width * 16) >> 3;
  223. pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height;
  224. ARKVIN_DBGPRTK("pixfmt->width = %d.\n",pixfmt->width);
  225. ARKVIN_DBGPRTK("pixfmt->height = %d.\n",pixfmt->height);
  226. ARKVIN_DBGPRTK("pixfmt->bytesperline = %d.\n",pixfmt->bytesperline);
  227. ARKVIN_DBGPRTK("pixfmt->sizeimage = %d.\n",pixfmt->sizeimage);
  228. return 0;
  229. }
  230. static int vin_set_fmt(struct ark1668_vin_device *vin, struct v4l2_format *f)
  231. {
  232. int ret;
  233. ret = vin_try_fmt(vin, f);
  234. if (ret)
  235. return ret;
  236. vin->fmt = *f;
  237. return 0;
  238. }
  239. static int vin_try_fmt_vid_cap(struct file *file, void *priv,struct v4l2_format *f)
  240. {
  241. struct ark1668_vin_device *ark_vin = video_drvdata(file);
  242. return vin_try_fmt(ark_vin, f);
  243. }
  244. static int vin_s_fmt_vid_cap(struct file *file, void *priv,struct v4l2_format *f)
  245. {
  246. struct ark1668_vin_device *ark_vin = video_drvdata(file);
  247. if (vb2_is_streaming(&ark_vin->vb2_vidq))
  248. return -EBUSY;
  249. return vin_set_fmt(ark_vin, f);
  250. }
  251. static int vin_enum_input(struct file *file, void *priv,struct v4l2_input *inp)
  252. {
  253. if (inp->index != 0)
  254. return -EINVAL;
  255. inp->type = V4L2_INPUT_TYPE_CAMERA;
  256. inp->std = 0;
  257. strcpy(inp->name, "Camera");
  258. return 0;
  259. }
  260. static int vin_g_input(struct file *file, void *priv, unsigned int *i)
  261. {
  262. *i = 0;
  263. return 0;
  264. }
  265. static int vin_s_input(struct file *file, void *priv, unsigned int i)
  266. {
  267. if (i > 0)
  268. return -EINVAL;
  269. return 0;
  270. }
  271. static long vin_ioctl_default(struct file *file, void *priv,
  272. bool valid_prio, unsigned int cmd, void *param)
  273. {
  274. struct dvr_dev *dvr_dev =g_ark168_vin->dvr_dev;
  275. struct vin_display_outpara *vout_para = (struct vin_display_outpara *)param;
  276. unsigned long error = 0;
  277. unsigned long flags;
  278. if(!dvr_dev){
  279. printk(KERN_ERR"%s error null device", __func__);
  280. return -ENXIO;
  281. }
  282. spin_lock_irqsave(&dvr_dev->spin_lock, flags);
  283. switch (cmd)
  284. {
  285. case VIN_SHOW_WINDOW:
  286. {
  287. ark168vin_set_display(vout_para->layer,VIN_SHOW_WINDOW,NULL);
  288. break;
  289. }
  290. case VIN_HIDE_WINDOW:
  291. {
  292. ark168vin_set_display(vout_para->layer,VIN_HIDE_WINDOW,NULL);
  293. break;
  294. }
  295. case VIN_SET_WINDOW_POS:
  296. {
  297. ark168vin_set_display(vout_para->layer,VIN_SET_WINDOW_POS,&vout_para->pos_data);
  298. break;
  299. }
  300. case VIN_SET_SOURCE_SIZE:
  301. {
  302. ark168vin_set_display(vout_para->layer,VIN_SET_SOURCE_SIZE,&vout_para->source_size);
  303. break;
  304. }
  305. case VIN_SET_LAYER_SIZE:
  306. {
  307. ark168vin_set_display(vout_para->layer,VIN_SET_LAYER_SIZE,&vout_para->layer_size);
  308. break;
  309. }
  310. case VIN_SET_WINDOW_FORMAT:
  311. {
  312. ark168vin_set_display(vout_para->layer,VIN_SET_WINDOW_FORMAT,&vout_para->format);
  313. break;
  314. }
  315. case VIN_SET_WINDOW_ADDR:
  316. {
  317. ark168vin_set_display(vout_para->layer,VIN_SET_WINDOW_ADDR,&vout_para->disp_addr);
  318. break;
  319. }
  320. case VIN_SET_WINDOW_SCALER:
  321. {
  322. ark168vin_set_display(vout_para->layer,VIN_SET_WINDOW_SCALER,&vout_para->scaler);
  323. break;
  324. }
  325. default:
  326. printk("%s: error cmd 0x%x\n", __func__, cmd);
  327. error = -EFAULT;
  328. goto end;
  329. }
  330. return 0;
  331. end:
  332. spin_unlock_irqrestore(&dvr_dev->spin_lock, flags);
  333. return error;
  334. }
  335. static int ark_fb_update_window_by_layer_id(int layer_id, struct arkfb_update_window *arg)
  336. {
  337. return 0;
  338. }
  339. static int ark_disp_set_tvenc_cfg(struct ark_disp_tvenc_cfg_arg *arg)
  340. {
  341. return 0;
  342. }
  343. static void ark_disp_set_tvout_next_oddfield_bufaddr(unsigned int addr)
  344. {
  345. }
  346. static void ark_disp_set_tvout_next_evenfield_bufaddr(unsigned int addr)
  347. {
  348. }
  349. static const struct v4l2_ioctl_ops vin_ioctl_ops = {
  350. .vidioc_querycap = vin_querycap,
  351. .vidioc_enum_fmt_vid_cap = vin_enum_fmt_vid_cap,
  352. .vidioc_g_fmt_vid_cap = vin_g_fmt_vid_cap,
  353. .vidioc_s_fmt_vid_cap = vin_s_fmt_vid_cap,
  354. .vidioc_try_fmt_vid_cap = vin_try_fmt_vid_cap,
  355. .vidioc_enum_input = vin_enum_input,
  356. .vidioc_g_input = vin_g_input,
  357. .vidioc_s_input = vin_s_input,
  358. .vidioc_reqbufs = vb2_ioctl_reqbufs,
  359. .vidioc_querybuf = vb2_ioctl_querybuf,
  360. .vidioc_qbuf = vb2_ioctl_qbuf,
  361. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  362. .vidioc_streamon = vb2_ioctl_streamon,
  363. .vidioc_streamoff = vb2_ioctl_streamoff,
  364. .vidioc_default = vin_ioctl_default,
  365. };
  366. static int vin_open(struct file *file)
  367. {
  368. struct ark1668_vin_device* ark_vin = video_drvdata(file);
  369. int ret;
  370. if (mutex_lock_interruptible(&ark_vin->lock))
  371. return -ERESTARTSYS;
  372. ret = v4l2_fh_open(file);
  373. if (ret < 0)
  374. goto unlock;
  375. if (!v4l2_fh_is_singular_file(file))
  376. goto unlock;
  377. unlock:
  378. mutex_unlock(&ark_vin->lock);
  379. return ret;
  380. }
  381. static int vin_release(struct file *file)
  382. {
  383. struct ark1668_vin_device* ark_vin = video_drvdata(file);
  384. bool fh_singular;
  385. int ret;
  386. mutex_lock(&ark_vin->lock);
  387. fh_singular = v4l2_fh_is_singular_file(file);
  388. ret = _vb2_fop_release(file, NULL);
  389. mutex_unlock(&ark_vin->lock);
  390. return 0;
  391. }
  392. static const struct v4l2_file_operations vin_fops = {
  393. .owner = THIS_MODULE,
  394. .open = vin_open,
  395. .release = vin_release,
  396. .unlocked_ioctl = video_ioctl2,
  397. .read = vb2_fop_read,
  398. .mmap = vb2_fop_mmap,
  399. .poll = vb2_fop_poll,
  400. };
  401. static int deinterlace_process (unsigned int deinterlace_size, unsigned int data_mode, unsigned int deinterlace_type,
  402. unsigned int deinterlace_field, unsigned int src_field_addr_0, unsigned int src_field_addr_1,unsigned int src_field_addr_2,
  403. unsigned int dst_y_addr, unsigned int dst_u_addr, unsigned int dst_v_addr)
  404. {
  405. unsigned int pixel_per_line;
  406. unsigned int total_line;
  407. unsigned int pn;
  408. unsigned int denoise_bypass;
  409. unsigned int stride;
  410. unsigned int only_wr_1_field;
  411. unsigned int field;
  412. unsigned int out_mode;
  413. unsigned int vary_level_th;
  414. int ret = DEINTERLACE_SUCCESS;
  415. unsigned int val;
  416. if(deinterlace_field != DEINTERLACE_FIELD_ODD
  417. && deinterlace_field != DEINTERLACE_FIELD_EVEN){
  418. printk("invalid deinterlace field (%d)\r\n", deinterlace_field);
  419. return DEINTERLACE_PARA_ERROR;
  420. }
  421. field = deinterlace_field;
  422. if(deinterlace_size == DEINTERLACE_LINE_SIZE_960H){
  423. pixel_per_line = 120 * (1 + data_mode);
  424. }else if(deinterlace_size == DEINTERLACE_LINE_SIZE_720H){
  425. pixel_per_line = 90 * (1 + data_mode);
  426. }else{
  427. printk("invalid deinterlace size (%d)\r\n", deinterlace_size);
  428. return DEINTERLACE_PARA_ERROR;
  429. }
  430. if(data_mode == DEINTERLACE_DATA_MODE_420){
  431. denoise_bypass = 1;
  432. stride = pixel_per_line;
  433. only_wr_1_field = 1;
  434. }else if(data_mode == DEINTERLACE_DATA_MODE_422){
  435. if(dst_y_addr == 0){
  436. printk("illegal deinterlace dst Y address\r\n");
  437. return DEINTERLACE_PARA_ERROR;
  438. }
  439. denoise_bypass = 1;
  440. stride = 0;
  441. only_wr_1_field = 0;
  442. }else{
  443. printk("invalid deinterlace data mode (%d)\r\n", data_mode);
  444. return DEINTERLACE_PARA_ERROR;
  445. }
  446. if(deinterlace_type == DEINTERLACE_TYPE_PAL){
  447. pn = 0;
  448. total_line = 288;
  449. vary_level_th = 0x800;
  450. }else if(deinterlace_type == DEINTERLACE_TYPE_NTSC){
  451. pn = 1;
  452. total_line = 240;
  453. vary_level_th = 0x8;
  454. }else{
  455. printk("invalid deinterlace type (%d)\r\n", deinterlace_type);
  456. return DEINTERLACE_PARA_ERROR;
  457. }
  458. out_mode = DEINTERLACE_DATA_MODE_422;
  459. val = (out_mode<<31)
  460. | (0x0 << 29)
  461. | (only_wr_1_field << 28) // field_1 only_wr_1_field
  462. | (pixel_per_line << 20) // pixel_pl
  463. | (total_line << 11) // total_line
  464. | (stride << 3) // stride
  465. | (data_mode << 2) // data_mode
  466. | (field << 1); // field
  467. vin_writel_dein(ARK1668_DEINTERLACE_CTRL0, val);
  468. val = (out_mode<<31)
  469. | (0x0 << 29)
  470. | (only_wr_1_field << 28) // field_1 only_wr_1_field
  471. | (pixel_per_line << 20) // pixel_pl
  472. | (total_line << 11) // total_line
  473. | (stride << 3) // stride
  474. | (data_mode << 2) // data_mode
  475. | (field << 1); // field
  476. vin_writel_dein(ARK1668_DEINTERLACE_CTRL0, val);
  477. val = (0x8 << 24 )
  478. |(vary_level_th << 8)
  479. |(0X8 << 0);
  480. vin_writel_dein(ARK1668_DEINTERLACE_CTRL1, val);
  481. val = 0x300A4230;
  482. vin_writel_dein(ARK1668_DEINTERLACE_CTRL2, val);
  483. // denoise bypass pn: 1:n display_motion line_intra global_cnt display_mv_0
  484. val = (0x07 << 16) //motion_ctrl_reg5\uff1a\u964d\u566a\u95e8\u9650
  485. | (denoise_bypass << 15)
  486. | (pn << 13)
  487. | (0x1 << 11)
  488. | (0x1 << 10)
  489. | (0x1 << 9)
  490. | (0x0 << 6)
  491. | (0x0 << 5)
  492. | (0x1 << 3)
  493. | (0x0 << 2) // max_ycbcr_ena :use for control the max control
  494. | (0x1 << 1)
  495. | (0x0 << 0);
  496. vin_writel_dein(ARK1668_DEINTERLACE_CTRL3, val);
  497. vin_writel_dein(ARK1668_DEINTERLACE_FILM_MODECTRL, (0x0 << 31));
  498. vin_writel_dein(ARK1668_DEINTERLACE_SADDR0, src_field_addr_0); // s0_0
  499. vin_writel_dein(ARK1668_DEINTERLACE_SADDR1, src_field_addr_1); // s1_0
  500. vin_writel_dein(ARK1668_DEINTERLACE_SADDR2, src_field_addr_2); // s2_0
  501. vin_writel_dein(ARK1668_DEINTERLACE_DADDRY, dst_y_addr); // dy_0 when filed = 1 ,data_mode = 0 then dy_0 = s0_0 , when filed = 0 ,data_mode = 0 then dy_0 = s2_0
  502. vin_writel_dein(ARK1668_DEINTERLACE_DADDRU, dst_u_addr); // du_0
  503. vin_writel_dein(ARK1668_DEINTERLACE_DADDRV, dst_v_addr); // dv_0
  504. // pingpong addr fetch
  505. vin_writel_dein(ARK1668_DEINTERLACE_ADDR_SWITCHMODE, 0x0);
  506. // \u6e05\u9664\u4e2d\u65ad
  507. vin_writel_dein(ARK1668_DEINTERLACE_INT_CLEAR, 0x3);
  508. // start de-interlace
  509. vin_writel_dein(ARK1668_DEINTERLACE_START, 0x1);
  510. return ret;
  511. }
  512. void mirror_paint_work(struct work_struct *work)
  513. {
  514. struct dvr_dev* dvr_dev = g_ark168_vin->dvr_dev;
  515. int width,height;
  516. int i,j;
  517. unsigned char *addr_src;
  518. unsigned char *addr_dest;
  519. unsigned short *psrc;
  520. unsigned short *pdest;
  521. unsigned int right_cut;
  522. unsigned int value;
  523. if(!dvr_dev->interlace) return;
  524. if(dvr_dev->mirror_type == MIRROR_TYPE_NONE) return;
  525. GetPingPongNextBuf(dvr_dev->write_mirror,ITU656_BUFFER_NUM);
  526. dvr_dev->buf_status[dvr_dev->write_mirror] &= ~ITU656_BUFFER_FULL_MIRROR;
  527. if (dvr_dev->system == PAL) {
  528. width = 720;
  529. height = 576;
  530. right_cut = 12;//must even ,as :2 ,4, 6..., set point to uy
  531. } else {
  532. width = 720;
  533. height = 480;
  534. right_cut = 12;//must even ,as :2 ,4, 6...,set point to uy
  535. }
  536. addr_src = (unsigned char *)dvr_dev->evenbuf_virtaddr[dvr_dev->write_mirror];
  537. addr_dest = (unsigned char *)dvr_dev->oddbuf_virtaddr[dvr_dev->write_mirror];
  538. dma_map_single(NULL,(void *)addr_src, width*height*2, DMA_FROM_DEVICE);
  539. //srcdata : vyuy vyuy....vyuy vyuy
  540. if(dvr_dev->mirror_type == MIRROR_TYPE_L2R){
  541. for(i = 0;i < height; i++){
  542. psrc = (unsigned short *)(addr_src + width*2*i + (width-1-right_cut)*2);
  543. pdest = (unsigned short *)(addr_dest + width*2*i);
  544. for(j = 0;j < width-right_cut; j++){
  545. *pdest = *psrc;
  546. pdest++;
  547. psrc--;
  548. }
  549. }
  550. }
  551. else if(dvr_dev->mirror_type == MIRROR_TYPE_U2D){
  552. for(i = 0;i < height; i++){
  553. psrc = (unsigned short *)(addr_src + width*2*i);
  554. pdest = (unsigned short *)(addr_dest + width*2*(height-1-i));
  555. memcpy(pdest,psrc,width*2);
  556. }
  557. }
  558. else if(dvr_dev->mirror_type == MIRROR_TYPE_L2R_U2D){
  559. for(i = 0;i < height; i++){
  560. psrc = (unsigned short *)(addr_src + width*2*i + (width-1-right_cut)*2);
  561. pdest = (unsigned short *)(addr_dest + width*2*(height-1-i));
  562. for(j = 0;j < width-right_cut; j++){
  563. *pdest = *psrc;
  564. pdest++;
  565. psrc--;
  566. }
  567. }
  568. }
  569. else{
  570. memcpy(addr_dest,addr_src,width*height*2);
  571. }
  572. //for mirror
  573. value = vin_readl_lcd(ARK1668_LCDC_VIDEO2_CTL);
  574. if(dvr_dev->mirror_type & MIRROR_TYPE_L2R) value |= (0x01<<17);
  575. else value &= ~(0x03<<17);
  576. vin_writel_lcd(ARK1668_LCDC_VIDEO2_CTL,value);
  577. dma_map_single(NULL,(void *)addr_dest, width*height*2, DMA_TO_DEVICE);
  578. dvr_dev->buf_status[dvr_dev->write_mirror] |= ITU656_BUFFER_FULL_LCD;
  579. }
  580. static void ark_vin_reg_uninit(void)
  581. {
  582. // Clock Off
  583. vin_writel_sys(ARK1668_SYS_PER_CLK_EN, vin_readl_sys(ARK1668_SYS_PER_CLK_EN)& ~(1 << 12));
  584. vin_writel_sys(ARK1668_SYS_AXI_CLK_EN, vin_readl_sys(ARK1668_SYS_AXI_CLK_EN)& ~(1 << 2));
  585. vin_writel_sys(ARK1668_SYS_AHB_CLK_EN, vin_readl_sys(ARK1668_SYS_AHB_CLK_EN)& ~(1 << 10));
  586. }
  587. static inline void ark_vin_disable_write(void)
  588. {
  589. vin_writel(ARK1668_ITU656_MODULE_EN,vin_readl(ARK1668_ITU656_MODULE_EN) | (1 << 2));
  590. }
  591. static inline void ark_vin_enable_write(void)
  592. {
  593. vin_writel(ARK1668_ITU656_MODULE_EN,vin_readl(ARK1668_ITU656_MODULE_EN) & ~(1 << 2));
  594. }
  595. void ark_vin_disable(void)
  596. {
  597. vin_writel(ARK1668_ITU656_IMR, 0);
  598. vin_writel(ARK1668_ITU656_ENABLE_REG,vin_readl(ARK1668_ITU656_ENABLE_REG) & ~(1 << 0));
  599. }
  600. static int ark_disp_set_gui_tvout(int enable)
  601. {
  602. return 0;
  603. }
  604. void ark_sys_pad_config(unsigned int reg_offset, unsigned int mask,
  605. unsigned int bit_offset, unsigned int val)
  606. {
  607. unsigned int reg;
  608. reg = vin_readl_sys(reg_offset);
  609. reg &= ~(mask << bit_offset);
  610. reg |= ((val & mask) << bit_offset);
  611. vin_writel_sys(reg_offset, reg);
  612. }
  613. static void itu656_pad(void)
  614. {
  615. unsigned int val;
  616. val = vin_readl_sys(ARK1668_SYS_PAD_CTRL0B);
  617. val |= (0x1FF<<16);
  618. vin_writel_sys(ARK1668_SYS_PAD_CTRL0B,val);
  619. val = vin_readl_sys(ARK1668_SYS_PAD_CTRL0A);
  620. val &= ~(0xF<<4);
  621. val |= 5<<4;
  622. vin_writel_sys(ARK1668_SYS_PAD_CTRL0A, val);
  623. }
  624. static void ark_itu656_set_direct_data_to_lcd_enable(int enable)
  625. {
  626. unsigned int val;
  627. itu656_pad();
  628. vin_writel(ARK1668_ITU656_INPUT_SEL, vin_readl(ARK1668_ITU656_INPUT_SEL)|(1<<0));
  629. if (enable) {
  630. val = 1<<2 | // 1=disable itu656 data write back to ddr2
  631. 1<<1; // 1=enable itu656 data and timing by pass to lcd
  632. vin_writel(ARK1668_ITU656_MODULE_EN, vin_readl(ARK1668_ITU656_MODULE_EN)| val);
  633. vin_writel(ARK1668_ITU656_PIX_LINE_NUM_DELTA, 30<<8 | 10);
  634. // rITU656IN_IMR = 1<<7;
  635. } else {
  636. val = 1<<2 | // 0=enable itu656 data write back to ddr2
  637. 1<<1; // 1=disable itu656 data and timing by pass to lcd
  638. vin_writel(ARK1668_ITU656_MODULE_EN, vin_readl(ARK1668_ITU656_MODULE_EN)& ~val);
  639. vin_writel(ARK1668_ITU656_IMR, 0); // disable interrupt outputs
  640. }
  641. }
  642. static inline void ark_itu656_set_global_enable(int enable)
  643. {
  644. if (enable)
  645. vin_writel(ARK1668_ITU656_ENABLE_REG, vin_readl(ARK1668_ITU656_ENABLE_REG)|(1<<0));// global enable
  646. else
  647. vin_writel(ARK1668_ITU656_ENABLE_REG, vin_readl(ARK1668_ITU656_ENABLE_REG)& ~(1<<0));// global disable
  648. }
  649. static void vin_exit(void)
  650. {
  651. struct ark_private_data *arkvin_priv = g_ark168_vin->pdata.g_arkvin_priv;
  652. spin_lock(&g_ark168_vin->dvr_dev->spin_lock);
  653. g_ark168_vin->dvr_dev->enter_carback = 0;
  654. g_ark168_vin->dvr_dev->work_status = 0;
  655. del_timer(&g_ark168_vin->dvr_dev->timer);
  656. g_ark168_vin->dvr_dev->show_video = 0;
  657. g_ark168_vin->dvr_dev->carback_signal = 0;
  658. ark_disp_set_layer_en(DISPLAY_LAYER, 0);
  659. msleep(20);
  660. ark_vin_disable_write(); /*stop write data back*/
  661. ark_vin_disable();
  662. ark_vin_reg_uninit();
  663. spin_unlock(&g_ark168_vin->dvr_dev->spin_lock);
  664. }
  665. /********************************************************************************************/
  666. int ark_itu656_direct_data_to_lcd_start(void)
  667. {
  668. itu656_pad();
  669. ark_itu656_set_direct_data_to_lcd_enable(1);
  670. return 0;
  671. }
  672. EXPORT_SYMBOL(ark_itu656_direct_data_to_lcd_start);
  673. void ark_itu656_stop(void)
  674. {
  675. ark_itu656_set_global_enable(0);
  676. vin_writel(ARK1668_ITU656_IMR ,0); // disable all interrupt outputs
  677. }
  678. EXPORT_SYMBOL(ark_itu656_stop);
  679. int ark_sys_pad_config_gpio_mode(int gpio)
  680. {
  681. if((gpio<=GPIO1) && (gpio>=GPIO0))
  682. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL09, 0x3, (gpio-GPIO0)*2, 0);
  683. else if(gpio<=GPIO9)
  684. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL00, 0xf, (gpio-GPIO2)*4, 0);
  685. else if(gpio<=GPIO17)
  686. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL01, 0xf, (gpio-GPIO10)*4, 0);
  687. else if(gpio<=GPIO25)
  688. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL02, 0xf, (gpio-GPIO18)*4, 0);
  689. else if(gpio<=GPIO29)
  690. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL03, 0xf, (gpio-GPIO26)*4, 0);
  691. else if(gpio<=GPIO38)
  692. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL07, 0x3, (gpio-GPIO30)*2, 0);
  693. else if(gpio<=GPIO46)
  694. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL04, 0xf, (gpio-GPIO39)*4, 0);
  695. else if(gpio<=GPIO54)
  696. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL05, 0xf, (gpio-GPIO47)*4, 0);
  697. else if(gpio<=GPIO61)
  698. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL06, 0xf, (gpio-GPIO55)*4, 0);
  699. else if(gpio<=GPIO71)
  700. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL08, 0x3, (gpio-GPIO62)*2, 0);
  701. else if(gpio<=GPIO84)
  702. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL09, 0x3, (gpio-GPIO72)*2+4, 0);
  703. else if(gpio<=GPIO85)
  704. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL09, 0x1, 30, 0);
  705. else if(gpio<=GPIO86)
  706. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL09, 0x1, 31, 0);
  707. else if(gpio<=GPIO116)
  708. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL0B, 0x1, (gpio-GPIO85), 0);
  709. else if(gpio<=GPIO127)
  710. ark_sys_pad_config(ARK1668_SYS_PAD_CTRL0C, 0x1, (gpio-GPIO117), 0);
  711. else
  712. return -1;
  713. return 0;
  714. }
  715. EXPORT_SYMBOL(ark_sys_pad_config_gpio_mode);
  716. void dvr_set_sys_clk(int level)
  717. {
  718. int val, width, height;
  719. width = vin_readl_lcd(ARK1668_LCDC_TIMING1) & 0xfff;
  720. height = vin_readl_lcd(ARK1668_LCDC_TIMING2) >> 10 & 0x7ff;
  721. spin_lock(&g_ark168_vin->dvr_dev->spin_lock);
  722. if(level)
  723. {
  724. if(g_ark168_vin->dvr_dev->enter_carback){//only carback support 1080p
  725. if((width == 800) || (height== 480)) val = 0;
  726. else val = 2;
  727. if(((vin_readl_sys(ARK1668_SYS_DEVICE_CLK_CFG0) >> 24) & 0x0f) != val)
  728. ark_sys_pad_config(ARK1668_SYS_DEVICE_CLK_CFG0, 0xf, 24, val);
  729. }
  730. }else{
  731. if(g_ark168_vin->dvr_dev->enter_carback){//IntScal2Clk
  732. if((width == 800) || (height== 480)) val = 2;
  733. else val = 4;
  734. if(((vin_readl_sys(ARK1668_SYS_DEVICE_CLK_CFG0) >> 24) & 0x0f) != val)
  735. ark_sys_pad_config(ARK1668_SYS_DEVICE_CLK_CFG0, 0xf, 24, val);
  736. }
  737. }
  738. spin_unlock(&g_ark168_vin->dvr_dev->spin_lock);
  739. }
  740. EXPORT_SYMBOL(dvr_set_sys_clk);
  741. int dvr_get_pragressive(void)
  742. {
  743. int pragressive;
  744. spin_lock(&g_ark168_vin->dvr_dev->spin_lock);
  745. pragressive = !g_ark168_vin->dvr_dev->interlace;
  746. spin_unlock(&g_ark168_vin->dvr_dev->spin_lock);
  747. return pragressive;
  748. }
  749. EXPORT_SYMBOL(dvr_get_pragressive);
  750. void dvr_restart(void)
  751. {
  752. struct vin_para para = {0};
  753. para.source = DVR_SOURCE_CAMERA;
  754. para.width = vin_readl_lcd(ARK1668_LCDC_TIMING1) & 0xfff;
  755. para.height = vin_readl_lcd(ARK1668_LCDC_TIMING2) >> 10 & 0x7ff;
  756. spin_lock(&g_ark168_vin->dvr_dev->spin_lock);
  757. if(g_ark168_vin->dvr_dev->enter_carback == 1)
  758. {
  759. g_ark168_vin->dvr_dev->work_status = 0;
  760. del_timer(&g_ark168_vin->dvr_dev->timer);
  761. g_ark168_vin->dvr_dev->show_video = 0;
  762. ark_disp_set_layer_en(DISPLAY_LAYER, 0);
  763. ark_disp_set_layer_en(TVOUT_LAYER, 0);
  764. ark_vin_disable_write(); /*stop write data back*/
  765. ark_vin_disable();
  766. msleep(100);
  767. if(g_ark168_vin->dvr_dev->enter_carback == 1)
  768. {
  769. ark_vin_reg_uninit();
  770. g_ark168_vin->dvr_dev->carback_break = 1;
  771. if(g_ark168_vin->pdata.g_arkvin_priv->get_progressive)
  772. para.progressive = g_ark168_vin->pdata.g_arkvin_priv->get_progressive();
  773. vin_init(g_ark168_vin, &para);
  774. vin_start(g_ark168_vin->dvr_dev);
  775. }
  776. }
  777. spin_unlock(&g_ark168_vin->dvr_dev->spin_lock);
  778. }
  779. EXPORT_SYMBOL(dvr_restart);
  780. int ark_get_carback_signal(void)
  781. {
  782. return g_ark168_vin->dvr_dev->carback_signal;
  783. }
  784. EXPORT_SYMBOL(ark_get_carback_signal);
  785. int dvr_enter_carback(void)
  786. {
  787. g_ark168_vin->dvr_dev->buffer_virtaddr = (void *)__get_free_pages(GFP_KERNEL, get_order(g_ark168_vin->dvr_dev->buffer_size));
  788. if (!g_ark168_vin->dvr_dev->buffer_virtaddr) {
  789. printk("%s get. buffer fail\n", __func__);
  790. }
  791. g_ark168_vin->dvr_dev->buffer_phyaddr = virt_to_phys(g_ark168_vin->dvr_dev->buffer_virtaddr);
  792. ARKVIN_DBGPRTK("g_ark168_vin->dvr_dev->buffer_size = %d.\n",g_ark168_vin->dvr_dev->buffer_size);
  793. struct vin_para para = {0};
  794. struct ark_private_data *arkvin_priv = g_ark168_vin->pdata.g_arkvin_priv;
  795. if(g_ark168_vin->stream_flag)
  796. ark_disp_set_layer_en(DISPLAY_LAYER, 0);
  797. para.source = DVR_SOURCE_CAMERA;
  798. g_ark168_vin->vin_status = g_ark168_vin->stream_flag;
  799. ARKVIN_DBGPRTK("g_ark168_vin->vin_status = %d.\n",g_ark168_vin->vin_status);
  800. g_ark168_vin->stream_flag = false;
  801. //para.progressive = 1;
  802. if(!arkvin_priv->init){
  803. if(arkvin_priv->dvr_config() == 0){
  804. arkvin_priv->init = 1;
  805. }
  806. arkvin_priv->select_channel(arkvin_priv->channel);
  807. }
  808. para.width = vin_readl_lcd(ARK1668_LCDC_TIMING1) & 0xfff;
  809. para.height = vin_readl_lcd(ARK1668_LCDC_TIMING2) >> 10 & 0x7ff;
  810. spin_lock(&g_ark168_vin->dvr_dev->spin_lock);
  811. if(arkvin_priv->enter_carback_cb)
  812. arkvin_priv->enter_carback_cb();
  813. g_ark168_vin->dvr_dev->clock_scale_store = ((vin_readl_sys(ARK1668_SYS_DEVICE_CLK_CFG0) >> 24) & 0x0f);
  814. memcpy(&g_ark168_vin->dvr_dev->itu656in_back, &g_ark168_vin->dvr_dev->itu656in, sizeof(struct vin_para));
  815. if (g_ark168_vin->dvr_dev->work_status) {
  816. g_ark168_vin->dvr_dev->work_status = 0;
  817. del_timer(&g_ark168_vin->dvr_dev->timer);
  818. g_ark168_vin->dvr_dev->show_video = 0;
  819. if(!g_ark168_vin->vin_status)
  820. ark_disp_set_layer_en(DISPLAY_LAYER, 0);
  821. ark_disp_set_layer_en(TVOUT_LAYER, 0);
  822. ark_vin_disable_write(); /*stop write data back*/
  823. ark_vin_disable();
  824. g_ark168_vin->dvr_dev->channel = ARK7116_AV0;
  825. if(arkvin_priv->select_channel)
  826. arkvin_priv->select_channel(g_ark168_vin->dvr_dev->channel);
  827. msleep(200);
  828. ark_vin_reg_uninit();
  829. g_ark168_vin->dvr_dev->carback_break = 1;
  830. } else g_ark168_vin->dvr_dev->carback_break = 0;
  831. printk("%s carback_break=%d.\n", __FUNCTION__, g_ark168_vin->dvr_dev->carback_break);
  832. if(arkvin_priv->get_progressive)
  833. para.progressive = arkvin_priv->get_progressive();
  834. vin_init(g_ark168_vin, &para);
  835. vin_start(g_ark168_vin->dvr_dev);
  836. g_ark168_vin->dvr_dev->enter_carback = 1;
  837. if(arkvin_priv->dvr_start_cb)
  838. arkvin_priv->dvr_start_cb();
  839. spin_unlock(&g_ark168_vin->dvr_dev->spin_lock);
  840. return 0;
  841. }
  842. EXPORT_SYMBOL(dvr_enter_carback);
  843. int dvr_exit_carback(void)
  844. {
  845. struct ark_private_data *arkvin_priv = g_ark168_vin->pdata.g_arkvin_priv;
  846. g_ark168_vin->stream_flag = g_ark168_vin->vin_status;
  847. if(g_ark168_vin->stream_flag)
  848. ark168vin_set_scal(DISPLAY_LAYER,NTSC_WIDTH,NTSC_HEIGHT,DISPLAY_WIDTH,DISPLAY_HEIGHT);
  849. ark_disp_set_layer_en(DISPLAY_LAYER, 0);
  850. spin_lock(&g_ark168_vin->dvr_dev->spin_lock);
  851. free_pages((unsigned long)g_ark168_vin->dvr_dev->buffer_virtaddr, get_order(g_ark168_vin->dvr_dev->buffer_size));
  852. g_ark168_vin->dvr_dev->enter_carback = 0;
  853. del_timer(&g_ark168_vin->dvr_dev->timer);
  854. g_ark168_vin->dvr_dev->show_video = 0;
  855. g_ark168_vin->dvr_dev->carback_signal = 0;
  856. msleep(20);
  857. if(!g_ark168_vin->stream_flag){
  858. g_ark168_vin->dvr_dev->work_status = 0;
  859. ark_vin_disable_write(); /*stop write data back*/
  860. ark_vin_disable();
  861. }
  862. if(((vin_readl_sys(ARK1668_SYS_DEVICE_CLK_CFG0) >> 24) & 0x0f) != g_ark168_vin->dvr_dev->clock_scale_store)
  863. ark_sys_pad_config(ARK1668_SYS_DEVICE_CLK_CFG0, 0xf, 24, g_ark168_vin->dvr_dev->clock_scale_store); //clock set back
  864. vin_init(g_ark168_vin, &g_ark168_vin->dvr_dev->itu656in_back);
  865. if(arkvin_priv->select_channel)
  866. arkvin_priv->select_channel(g_ark168_vin->dvr_dev->channel);
  867. msleep(200);
  868. if(!g_ark168_vin->stream_flag)
  869. ark_vin_reg_uninit();
  870. printk("%s carback_break=%d.\n", __FUNCTION__, g_ark168_vin->dvr_dev->carback_break);
  871. if (g_ark168_vin->dvr_dev->start_carback_exit) {
  872. vin_start(g_ark168_vin->dvr_dev);
  873. g_ark168_vin->dvr_dev->start_carback_exit = 0;
  874. } else if (g_ark168_vin->dvr_dev->carback_break) {
  875. if (g_ark168_vin->dvr_dev->itu656in.tvout) {
  876. ark_disp_set_layer_en(TVOUT_LAYER, 0);
  877. ark_disp_set_gui_tvout(1);
  878. }
  879. }
  880. if(arkvin_priv->dvr_stop_cb)
  881. arkvin_priv->dvr_stop_cb();
  882. if(arkvin_priv->exit_carback_cb)
  883. arkvin_priv->exit_carback_cb();
  884. if(g_ark168_vin->stream_flag)
  885. ark_disp_set_layer_en(DISPLAY_LAYER, 1);
  886. spin_unlock(&g_ark168_vin->dvr_dev->spin_lock);
  887. return 0;
  888. }
  889. EXPORT_SYMBOL(dvr_exit_carback);
  890. int dvr_exit_wait(void)
  891. {
  892. spin_lock(&g_ark168_vin->dvr_dev->spin_lock);
  893. if (g_ark168_vin->dvr_dev->carback_break) {
  894. spin_unlock(&g_ark168_vin->dvr_dev->spin_lock);
  895. msleep(300);
  896. spin_lock(&g_ark168_vin->dvr_dev->spin_lock);
  897. g_ark168_vin->dvr_dev->carback_break = 0;
  898. }
  899. spin_unlock(&g_ark168_vin->dvr_dev->spin_lock);
  900. return 0;
  901. }
  902. EXPORT_SYMBOL(dvr_exit_wait);
  903. int dvr_detect_carback_signal(void)
  904. {
  905. int signal = 0;
  906. spin_lock(&g_ark168_vin->dvr_dev->spin_lock);
  907. if (g_ark168_vin->dvr_dev->channel != ARK7116_AV0) {
  908. printk("now is not in carback.\n");
  909. } else {
  910. if(g_ark168_vin->pdata.g_arkvin_priv->detect_signal)
  911. signal = g_ark168_vin->pdata.g_arkvin_priv->detect_signal();
  912. }
  913. g_ark168_vin->dvr_dev->carback_signal = signal;
  914. spin_unlock(&g_ark168_vin->dvr_dev->spin_lock);
  915. return signal;
  916. }
  917. EXPORT_SYMBOL(dvr_detect_carback_signal);
  918. void ark_itu656_display_int_handler(void)
  919. {
  920. if(!g_ark168_vin)
  921. return;
  922. struct dvr_dev* dvr_dev = g_ark168_vin->dvr_dev;
  923. unsigned long flags;
  924. //struct arkfb_window_addr display_addr = {0};
  925. if(!dvr_dev || !dvr_dev->work_status)
  926. return;
  927. if(!g_ark168_vin->stream_flag){
  928. spin_lock_irqsave(&dvr_dev->spin_lock, flags);
  929. if (dvr_dev->show_video) {
  930. if(g_ark168_vin->pdata.g_arkvin_priv->detect_signal && g_ark168_vin->pdata.g_arkvin_priv->detect_signal())
  931. {
  932. printk(KERN_ALERT "ark_itu656_display_int_handler-->show_video\n");
  933. ark_disp_set_layer_en(DISPLAY_LAYER, 1);
  934. if (dvr_dev->itu656in.tvout)
  935. ark_disp_set_layer_en(TVOUT_LAYER, 1);
  936. dvr_dev->show_video = 0;
  937. dvr_dev->carback_signal = 1;
  938. }
  939. else
  940. {
  941. dvr_dev->carback_signal = 0;
  942. printk(" No signal detect.\n");
  943. }
  944. }
  945. //for vbox
  946. if(dvr_dev->deinter_indirect_show)
  947. goto end;
  948. if (dvr_dev->interlace) {
  949. if(dvr_dev->display_odd_even) {
  950. if(dvr_dev->mirror_type == MIRROR_TYPE_NONE)
  951. ark_itu656_display_addr(dvr_dev->evenbuf_phyaddr[dvr_dev->display_buffer]);
  952. dvr_dev->display_odd_even = 0;
  953. } else {
  954. dvr_dev->buf_status[dvr_dev->display_buffer] &= ~ITU656_BUFFER_FULL_LCD;
  955. GetPingPongNextBuf(dvr_dev->display_buffer, ITU656_BUFFER_NUM);
  956. if(dvr_dev->buf_status[dvr_dev->display_buffer] == 0)
  957. {
  958. GetPingPongPreBuf(dvr_dev->display_buffer, ITU656_BUFFER_NUM);
  959. dvr_dev->buf_status[dvr_dev->display_buffer] |= ITU656_BUFFER_FULL_LCD;
  960. }
  961. ark_itu656_display_addr(dvr_dev->oddbuf_phyaddr[dvr_dev->display_buffer]);
  962. dvr_dev->display_odd_even = 1;
  963. }
  964. } else {
  965. dvr_dev->buf_status[dvr_dev->display_buffer] &= ~ITU656_BUFFER_FULL_LCD;
  966. GetPingPongNextBuf(dvr_dev->display_buffer, ITU656_BUFFER_NUM);
  967. if(dvr_dev->buf_status[dvr_dev->display_buffer] == 0)
  968. {
  969. GetPingPongPreBuf(dvr_dev->display_buffer, ITU656_BUFFER_NUM);
  970. dvr_dev->buf_status[dvr_dev->display_buffer] |= ITU656_BUFFER_FULL_LCD;
  971. }
  972. ark_itu656_display_addr(dvr_dev->oddbuf_phyaddr[dvr_dev->display_buffer]);
  973. }
  974. end:
  975. spin_unlock_irqrestore(&dvr_dev->spin_lock, flags);
  976. }
  977. }
  978. EXPORT_SYMBOL(ark_itu656_display_int_handler);
  979. /*******************************************************************************************/
  980. static irqreturn_t ark_vin_int_handler(int irq, void *dev_id)
  981. {
  982. u8 field;
  983. u32 intr_stat;
  984. unsigned long flags;
  985. struct dvr_dev* dvr_dev = (struct dvr_dev *)dev_id;
  986. int deinter_type;
  987. unsigned int deintout_phyaddr;
  988. int timeout = 10000;
  989. int syschange_mask = TOTAL_LINE_CHANGED_INTERRUPT;
  990. int i;
  991. intr_stat = vin_readl(ARK1668_ITU656_ISR);
  992. vin_writel(ARK1668_ITU656_ICR, 0xFF);
  993. field = (intr_stat >> 8) & 0x1;
  994. spin_lock_irqsave(&dvr_dev->spin_lock, flags);
  995. if (!dvr_dev->interlace)
  996. syschange_mask |= ACTIVE_PIX_CHANGED_INTERRUPT;
  997. if(intr_stat & syschange_mask)
  998. {
  999. dvr_dev->show_video = 0;
  1000. if(!g_ark168_vin->stream_flag)
  1001. ark_disp_set_layer_en(DISPLAY_LAYER, 0);
  1002. if (dvr_dev->itu656in.tvout)
  1003. ark_disp_set_layer_en(TVOUT_LAYER, 0);
  1004. ark_vin_disable_write();
  1005. mod_timer(&dvr_dev->timer, jiffies + msecs_to_jiffies(50));
  1006. }
  1007. if (!dvr_dev->work_status) goto end;
  1008. if (dvr_dev->system == PAL)
  1009. field = !field;
  1010. //printk(KERN_ALERT "ark_itu656_int_handler--intr_stat=0x%0x\n",intr_stat);
  1011. if (intr_stat & FIELD_INTERRUPT) {
  1012. if(g_ark168_vin->stream_flag){
  1013. spin_lock(&g_ark168_vin->ark_queue_lock);
  1014. if (g_ark168_vin->cur_frm) {
  1015. ARKVIN_DBGPRTK("v4l2 streaming vb2_buffer_done...\n");
  1016. struct vb2_v4l2_buffer *vbuf = &g_ark168_vin->cur_frm->vb;
  1017. struct vb2_buffer *vb = &vbuf->vb2_buf;
  1018. vb->timestamp = ktime_get_ns();
  1019. vbuf->sequence = g_ark168_vin->sequence++;
  1020. vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
  1021. g_ark168_vin->cur_frm = NULL;
  1022. }
  1023. if (!list_empty(&g_ark168_vin->ark_queue) && !g_ark168_vin->stop) {
  1024. g_ark168_vin->cur_frm = list_first_entry(&g_ark168_vin->ark_queue,
  1025. struct vin_buffer, list);
  1026. ARKVIN_DBGPRTK("INT->get out buf: %p\n",g_ark168_vin->cur_frm->vb.vb2_buf.planes[0].mem_priv);
  1027. list_del(&g_ark168_vin->cur_frm->list);
  1028. vin_setaddr(g_ark168_vin);
  1029. }
  1030. if (g_ark168_vin->stop)
  1031. complete(&g_ark168_vin->comp);
  1032. spin_unlock(&g_ark168_vin->ark_queue_lock);
  1033. }
  1034. if(!g_ark168_vin->stream_flag){
  1035. //printk(KERN_ALERT"w 0x%x\n", dvr_dev->fieldbuf_phyaddr[dvr_dev->cur_buffer]);
  1036. if(dvr_dev->interlace) {
  1037. vin_writel(ARK1668_ITU656_DRAM_DEST1, dvr_dev->fieldbuf_phyaddr[dvr_dev->cur_buffer]);
  1038. if (dvr_dev->itu656in.tvout) {
  1039. int tvout_addr = dvr_dev->fieldbuf_phyaddr[(dvr_dev->cur_buffer + 3) & 3];
  1040. if (field)
  1041. ark_disp_set_tvout_next_oddfield_bufaddr(tvout_addr);
  1042. else
  1043. ark_disp_set_tvout_next_evenfield_bufaddr(tvout_addr);
  1044. }
  1045. dvr_dev->cur_buffer = (dvr_dev->cur_buffer + 1) & 0x3;
  1046. if (dvr_dev->video_reinit && dvr_dev->discard_frame-- == 0) {
  1047. //for vbox
  1048. if(dvr_dev->deinter_indirect_show == 1)
  1049. dvr_dev->show_video = 0;
  1050. else
  1051. dvr_dev->show_video = 1;
  1052. dvr_dev->video_reinit = 0;
  1053. }
  1054. if (dvr_dev->system == PAL) deinter_type = DEINTERLACE_TYPE_PAL;
  1055. else deinter_type = DEINTERLACE_TYPE_NTSC;
  1056. if (field) {
  1057. dvr_dev->deinter_odd_even = DEINTERLACE_FIELD_ODD;
  1058. deintout_phyaddr = dvr_dev->oddbuf_phyaddr[dvr_dev->write_buffer];
  1059. } else {
  1060. dvr_dev->deinter_odd_even = DEINTERLACE_FIELD_EVEN;
  1061. deintout_phyaddr = dvr_dev->evenbuf_phyaddr[dvr_dev->write_buffer];
  1062. }
  1063. //for vbox
  1064. if(dvr_dev->deinter_indirect_show){
  1065. //deintout_phyaddr = dvr_dev->framebuf_phyaddr[dvr_dev->write_framebuf];
  1066. if(dvr_dev->deinter_odd_even == DEINTERLACE_FIELD_EVEN){
  1067. deintout_phyaddr = dvr_dev->framebuf_phyaddr[dvr_dev->write_framebuf];
  1068. }else{
  1069. goto end;
  1070. }
  1071. }
  1072. //for mirror
  1073. if(dvr_dev->mirror_type && dvr_dev->deinter_odd_even != DEINTERLACE_FIELD_EVEN){
  1074. goto end;
  1075. }
  1076. while(dvr_dev->deinter_status && timeout--);
  1077. dvr_dev->deinter_status = 1;
  1078. deinterlace_process (
  1079. DEINTERLACE_LINE_SIZE_720H,
  1080. DEINTERLACE_DATA_MODE_422,
  1081. deinter_type,
  1082. dvr_dev->deinter_odd_even,
  1083. dvr_dev->fieldbuf_phyaddr[dvr_dev->cur_buffer],
  1084. dvr_dev->fieldbuf_phyaddr[(dvr_dev->cur_buffer + 1) & 3],
  1085. dvr_dev->fieldbuf_phyaddr[(dvr_dev->cur_buffer + 2) & 3],
  1086. deintout_phyaddr,
  1087. 0, // for yuv420
  1088. 0); // for yuv420
  1089. } else {
  1090. if(dvr_dev->deinter_indirect_show){//for vbox
  1091. dvr_dev->framebuf_status[dvr_dev->write_framebuf] |= ITU656_BUFFER_FULL_APP;
  1092. GetPingPongNextBuf(dvr_dev->write_framebuf,ITU656_FRAME_NUM);
  1093. if(dvr_dev->framebuf_status[dvr_dev->write_framebuf])
  1094. {
  1095. GetPingPongPreBuf(dvr_dev->write_framebuf, ITU656_FRAME_NUM);
  1096. dvr_dev->framebuf_status[dvr_dev->write_framebuf] &= ~ITU656_BUFFER_FULL_APP;
  1097. }
  1098. vin_writel(ARK1668_ITU656_DRAM_DEST1, dvr_dev->framebuf_phyaddr[dvr_dev->write_framebuf]);
  1099. dvr_dev->frame_finish_count = 0;
  1100. for(i = 0;i < ITU656_FRAME_NUM;i++){
  1101. if(dvr_dev->framebuf_status[i] == ITU656_BUFFER_FULL_APP)
  1102. dvr_dev->frame_finish_count++;
  1103. }
  1104. wake_up_interruptible(&dvr_dev->frame_finish_waitq);
  1105. if(dvr_dev->fasync_queue != NULL) {
  1106. kill_fasync(&dvr_dev->fasync_queue, SIGIO, POLL_IN);
  1107. }
  1108. }else{
  1109. dvr_dev->buf_status[dvr_dev->write_buffer] |= ITU656_BUFFER_FULL_LCD;
  1110. GetPingPongNextBuf(dvr_dev->write_buffer,ITU656_BUFFER_NUM);
  1111. if(dvr_dev->buf_status[dvr_dev->write_buffer])
  1112. {
  1113. GetPingPongPreBuf(dvr_dev->write_buffer, ITU656_BUFFER_NUM);
  1114. dvr_dev->buf_status[dvr_dev->write_buffer] &= ~ITU656_BUFFER_FULL_LCD;
  1115. }
  1116. vin_writel(ARK1668_ITU656_DRAM_DEST1, dvr_dev->oddbuf_phyaddr[dvr_dev->write_buffer]);
  1117. }
  1118. if (dvr_dev->video_reinit && dvr_dev->discard_frame-- == 0) {
  1119. if(dvr_dev->deinter_indirect_show == 1)
  1120. dvr_dev->show_video = 0;
  1121. else
  1122. dvr_dev->show_video = 1;
  1123. dvr_dev->video_reinit = 0;
  1124. }
  1125. }
  1126. }
  1127. end:
  1128. spin_unlock_irqrestore(&dvr_dev->spin_lock, flags);
  1129. }
  1130. return IRQ_HANDLED;
  1131. }
  1132. int detect_cvbs_mode(void)
  1133. {
  1134. unsigned int pnline;
  1135. unsigned int pnpixel;
  1136. int ntsc = 0;
  1137. pnline = vin_readl(ARK1668_ITU656_LINE_NUM_PER_FIELD) & 0x7FE;
  1138. pnpixel = (vin_readl(ARK1668_ITU656_PIX_NUM_PER_LINE) & 0xFFE) >> 1;
  1139. if ((pnline > 230) && (pnline < 250)) {
  1140. ntsc = 1;
  1141. } else if((pnline > 278) && (pnline < 298)) {
  1142. ntsc = 0;
  1143. } else {
  1144. ntsc = 1;
  1145. }
  1146. return ntsc;
  1147. }
  1148. static void ark_vin_pad_select(struct dvr_dev *dvr_dev)
  1149. {
  1150. unsigned int val;
  1151. if (dvr_dev->itu601en) {
  1152. //hsync, vsync
  1153. val = (1 << 19) | (1 << 18);
  1154. vin_writel_sys(ARK1668_SYS_PAD_CTRL07, vin_readl_sys(ARK1668_SYS_PAD_CTRL07)|val);
  1155. }
  1156. if (dvr_dev->itu_channel== ITU656_CH0) {
  1157. val = vin_readl_sys(ARK1668_SYS_PAD_CTRL0A);
  1158. val &= ~(0xF<<4);
  1159. vin_writel_sys(ARK1668_SYS_PAD_CTRL0A, val);
  1160. val = vin_readl_sys(ARK1668_SYS_PAD_CTRL07);
  1161. val &= ~(0x1FFFF<<0);
  1162. val |= 0x15555;
  1163. vin_writel_sys(ARK1668_SYS_PAD_CTRL07, val);
  1164. } else if (dvr_dev->itu_channel == ITU656_CH1) {
  1165. val = vin_readl_sys(ARK1668_SYS_PAD_CTRL0A);
  1166. val &= ~(0xF<<4);
  1167. val |= 5<<4;
  1168. vin_writel_sys(ARK1668_SYS_PAD_CTRL0A, val);
  1169. val = vin_readl_sys(ARK1668_SYS_PAD_CTRL0B);
  1170. val |= (0x1FF<<16);
  1171. vin_writel_sys(ARK1668_SYS_PAD_CTRL0B, val);
  1172. } else if(dvr_dev->itu_channel == ITU656_CH2){
  1173. val = vin_readl_sys(ARK1668_SYS_PAD_CTRL0A);
  1174. val &= ~(0xF<<4);
  1175. val |= 0xA<<4;
  1176. vin_writel_sys(ARK1668_SYS_PAD_CTRL0A, val);
  1177. val = vin_readl_sys(ARK1668_SYS_PAD_CTRL0B);
  1178. val |= (0x7F<<25);
  1179. vin_writel_sys(ARK1668_SYS_PAD_CTRL0B, val);
  1180. val = vin_readl_sys(ARK1668_SYS_PAD_CTRL0C);
  1181. val |= (0x3<<0);
  1182. vin_writel_sys(ARK1668_SYS_PAD_CTRL0C, val);
  1183. }
  1184. }
  1185. static void ark_vin_reg_init(struct dvr_dev *dvr_dev)
  1186. {
  1187. unsigned int val;
  1188. // Clock On
  1189. vin_writel_sys(ARK1668_SYS_PER_CLK_EN, vin_readl_sys(ARK1668_SYS_PER_CLK_EN)|1 << 12);
  1190. vin_writel_sys(ARK1668_SYS_AXI_CLK_EN, vin_readl_sys(ARK1668_SYS_AXI_CLK_EN)|1 << 2);
  1191. vin_writel_sys(ARK1668_SYS_AHB_CLK_EN, vin_readl_sys(ARK1668_SYS_AHB_CLK_EN)|1 << 10);
  1192. //soft reset
  1193. vin_writel_sys(ARK1668_SYS_SOFT_RSTNA, vin_readl_sys(ARK1668_SYS_SOFT_RSTNA)& ~(1 << 9));
  1194. msleep(1);
  1195. vin_writel_sys(ARK1668_SYS_SOFT_RSTNA, vin_readl_sys(ARK1668_SYS_SOFT_RSTNA)| (1 << 9));
  1196. vin_writel(ARK1668_ITU656_MODULE_EN, 1<<2);
  1197. if (dvr_dev->itu601en) {
  1198. vin_writel(ARK1668_ITU656_MODULE_EN, vin_readl(ARK1668_ITU656_MODULE_EN)| 1 );
  1199. vin_writel(ARK1668_ITU656_INPUT_SEL, 0);
  1200. //for vbox r601
  1201. if(g_ark168_vin->pdata.g_arkvin_priv->ic_type == IC_TYPE_UB934){
  1202. val = (0 << 13) | (0 << 12) | (1 << 4)| (1 << 3) | (1 << 2);
  1203. }else{
  1204. val = (1 << 13) | (1 << 12) | (1 << 4);
  1205. }
  1206. vin_writel(ARK1668_ITU656_SEP_MODE_SEL, val);
  1207. }else{
  1208. vin_writel(ARK1668_ITU656_INPUT_SEL, 0x01);
  1209. }
  1210. vin_writel(ARK1668_ITU656_ICR, 0xff);
  1211. val = (10<<16) /*debounce*/
  1212. | (DELTA_LINE<<8)
  1213. | 0xFF/*DELTA_PIX*/;
  1214. vin_writel(ARK1668_ITU656_PIX_LINE_NUM_DELTA, val);
  1215. vin_writel(ARK1668_ITU656_DRAM_DEST1, dvr_dev->buffer_phyaddr);
  1216. vin_writel(ARK1668_ITU656_DRAM_DEST2, dvr_dev->buffer_phyaddr);
  1217. if (dvr_dev->interlace) {
  1218. #ifdef ITU656_USE_DEINTERLACE
  1219. vin_writel(ARK1668_ITU656_IMR, FIELD_INTERRUPT);
  1220. val = WRITE_MEMORY_TWO_FIELD
  1221. |CBCR_YUYV
  1222. |H_FILTER_COEF_AUTO
  1223. |YCBCR444_422_FILTER_ENABLE
  1224. |CB_FIRST
  1225. |GLOBAL_DISABLE;
  1226. #else
  1227. vin_writel(ARK1668_ITU656_IMR, FRAME_INTERRUPT_INTERRUPT);
  1228. val = WRITE_MEMORY_TWO_FIELD
  1229. |CBCR_YUYV
  1230. |H_FILTER_COEF_AUTO
  1231. |STORE_DATA_2FIELD_2ADDR
  1232. |YCBCR444_422_FILTER_ENABLE
  1233. |CB_FIRST
  1234. |GLOBAL_DISABLE;
  1235. #endif
  1236. vin_writel(ARK1668_ITU656_ENABLE_REG, val);
  1237. } else {
  1238. vin_writel(ARK1668_ITU656_IMR, FIELD_INTERRUPT);
  1239. val = WRITE_MEMORY_TWO_FIELD
  1240. |CBCR_YUYV
  1241. |H_FILTER_COEF_AUTO
  1242. |YCBCR444_422_FILTER_ENABLE
  1243. |CB_FIRST
  1244. |GLOBAL_DISABLE;
  1245. vin_writel(ARK1668_ITU656_ENABLE_REG, val);
  1246. val = (10<<16) /*debounce*/
  1247. | (DELTA_LINE<<8)
  1248. | DELTA_PIX;
  1249. vin_writel(ARK1668_ITU656_PIX_LINE_NUM_DELTA, val);
  1250. }
  1251. //for vbox
  1252. if(dvr_dev->deinter_indirect_show){
  1253. vin_writel(ARK1668_ITU656_ENABLE_REG, vin_readl(ARK1668_ITU656_ENABLE_REG)& ~(CBCR_YUYV));
  1254. }
  1255. }
  1256. static void ark_vin_enable(struct dvr_dev *dvr_dev)
  1257. {
  1258. vin_writel(ARK1668_ITU656_ENABLE_REG, vin_readl(ARK1668_ITU656_ENABLE_REG)| (1 << 0));
  1259. vin_writel(ARK1668_ITU656_IMR, vin_readl(ARK1668_ITU656_IMR)| (TOTAL_LINE_CHANGED_INTERRUPT));
  1260. if (!dvr_dev->interlace)
  1261. vin_writel(ARK1668_ITU656_IMR, vin_readl(ARK1668_ITU656_IMR)| (ACTIVE_PIX_CHANGED_INTERRUPT));
  1262. vin_writel_sys(ARK1668_SYS_DEVICE_CLK_CFG1, vin_readl_sys(ARK1668_SYS_DEVICE_CLK_CFG1)| 1);
  1263. }
  1264. static void deinterlace_reset(void)
  1265. {
  1266. vin_writel_dein(ARK1668_DEINTERLACE_CTRL0, (1 << 0));
  1267. ndelay(100);
  1268. vin_writel_dein(ARK1668_DEINTERLACE_CTRL0, (0 << 0));
  1269. }
  1270. static void deinterlace_init(void)
  1271. {
  1272. deinterlace_reset();
  1273. vin_writel_dein(ARK1668_DEINTERLACE_INT_CLEAR, 0x3);
  1274. vin_writel_dein(ARK1668_DEINTERLACE_INT_MASK, 0x3);
  1275. }
  1276. static void vin_tvout_enable(struct dvr_dev *dvr_dev, int enable)
  1277. {
  1278. struct ark_disp_tvenc_cfg_arg tvenc_cfg = {0};
  1279. if (enable) {
  1280. tvenc_cfg.enable = enable;
  1281. if (dvr_dev->system == PAL)
  1282. tvenc_cfg.out_mode = ARKDISP_TVENC_OUT_CVBS_PAL;
  1283. else
  1284. tvenc_cfg.out_mode = ARKDISP_TVENC_OUT_CVBS_NTSC;
  1285. tvenc_cfg.backcolor_y = 0x10;
  1286. tvenc_cfg.backcolor_cb = 0x80;
  1287. tvenc_cfg.backcolor_cr = 0x80;
  1288. ark_disp_set_tvenc_cfg(&tvenc_cfg);
  1289. }
  1290. }
  1291. static void vin_config_tvout(struct dvr_dev *dvr_dev)
  1292. {
  1293. struct arkfb_update_window tvout_arg = {0};
  1294. int width, height;
  1295. int out_width, out_height;
  1296. if(dvr_dev->interlace) {
  1297. if (dvr_dev->system == PAL) {
  1298. width = 720;
  1299. height = 288;
  1300. } else {
  1301. width = 720;
  1302. height = 240;
  1303. }
  1304. out_width = width;
  1305. out_height = height;
  1306. } else {
  1307. width = dvr_dev->src_width;
  1308. height = dvr_dev->src_height;
  1309. out_width = 720;
  1310. out_height = 480;
  1311. }
  1312. tvout_arg.win_width = width;
  1313. tvout_arg.win_height = height; //cut 2 lines on the bottom
  1314. tvout_arg.width = width;
  1315. tvout_arg.height = height;
  1316. tvout_arg.out_width = out_width;
  1317. tvout_arg.out_height = out_height;
  1318. tvout_arg.interlace_out = !dvr_dev->interlace;
  1319. tvout_arg.format = ARK_DISP_VIDEO_PIXFMT_YUYV;
  1320. ark_fb_update_window_by_layer_id(TVOUT_LAYER, &tvout_arg);
  1321. }
  1322. static void cvbs_type_change_detect(struct dvr_dev *dvr_dev)
  1323. {
  1324. if(dvr_dev->ic_type == IC_TYPE_TP2825B)
  1325. {
  1326. if(dvr_dev->system == NTSC)
  1327. {
  1328. if(dvr_dev->old_cvbs_type != NTSC)
  1329. {
  1330. vin_writel(ARK1668_ITU656_ENABLE_REG,vin_readl(ARK1668_ITU656_ENABLE_REG) & ~(2<<5));
  1331. dvr_dev->old_cvbs_type = NTSC;
  1332. }
  1333. }
  1334. else
  1335. {
  1336. if(dvr_dev->old_cvbs_type != PAL)
  1337. {
  1338. vin_writel(ARK1668_ITU656_ENABLE_REG,vin_readl(ARK1668_ITU656_ENABLE_REG) | (2<<5));
  1339. dvr_dev->old_cvbs_type = PAL;
  1340. }
  1341. }
  1342. }
  1343. }
  1344. static void dither_timeout_timer(struct timer_list *t)
  1345. {
  1346. struct dvr_dev *dvr_dev = from_timer(dvr_dev, t, timer);
  1347. struct arkfb_update_window display_arg = {0};
  1348. int width, height;
  1349. int line,pixel;
  1350. int activeLine, activePix;
  1351. unsigned long flags;
  1352. int i;
  1353. spin_lock_irqsave(&dvr_dev->spin_lock, flags);
  1354. if (!dvr_dev->work_status) {
  1355. spin_unlock_irqrestore(&dvr_dev->spin_lock, flags);
  1356. return;
  1357. }
  1358. line = vin_readl(ARK1668_ITU656_LINE_NUM_PER_FIELD) & 0x7FE;
  1359. if (dvr_dev->itu601en)
  1360. pixel = vin_readl(ARK1668_ITU656_PIX_NUM_PER_LINE) & 0xFFF;
  1361. else
  1362. pixel = (vin_readl(ARK1668_ITU656_PIX_NUM_PER_LINE) & 0xFFE) >> 1;
  1363. dvr_dev->src_width = activePix = pixel;
  1364. dvr_dev->src_height = activeLine = line;
  1365. if (dvr_dev->interlace) {
  1366. if (line >= 230 && line <= 250)
  1367. dvr_dev->system = NTSC;
  1368. else if (line >= 278 && line < 298)
  1369. dvr_dev->system = PAL;
  1370. else
  1371. dvr_dev->system = NTSC;
  1372. if(dvr_dev->system == NTSC)
  1373. {
  1374. activeLine = 240;
  1375. activePix = 720;
  1376. }
  1377. else
  1378. {
  1379. activeLine = 288;
  1380. activePix = 720;
  1381. }
  1382. cvbs_type_change_detect(dvr_dev);
  1383. }
  1384. vin_writel(ARK1668_ITU656_OUTLINE_NUM_PER_FIELD, activeLine);
  1385. vin_writel(ARK1668_ITU656_DATA_OUT_NUM, activeLine*activePix);
  1386. vin_writel(ARK1668_ITU656_SIZE, activePix<<16);
  1387. width = activePix;
  1388. height = activeLine;
  1389. if (dvr_dev->interlace) {
  1390. #ifdef ITU656_USE_DEINTERLACE
  1391. height *= 2;
  1392. #endif
  1393. }
  1394. if(!g_ark168_vin->stream_flag){
  1395. if (dvr_dev->itu601en) {
  1396. display_arg.win_x = dvr_dev->itu656in.left_blank + 2;
  1397. display_arg.win_y = dvr_dev->itu656in.top_blank + 2;
  1398. display_arg.win_width = width - dvr_dev->itu656in.left_blank -
  1399. dvr_dev->itu656in.right_blank-2;
  1400. }else{
  1401. display_arg.win_x = dvr_dev->itu656in.left_blank;
  1402. display_arg.win_y = dvr_dev->itu656in.top_blank + 2;
  1403. display_arg.win_width = width - dvr_dev->itu656in.left_blank -
  1404. dvr_dev->itu656in.right_blank;
  1405. }
  1406. if (dvr_dev->interlace) {
  1407. #ifdef ITU656_USE_DEINTERLACE
  1408. display_arg.win_width -= 12;
  1409. #endif
  1410. }
  1411. display_arg.win_height = height - dvr_dev->itu656in.top_blank -
  1412. dvr_dev->itu656in.bottom_blank - 4;
  1413. display_arg.width = width;
  1414. display_arg.height = height;
  1415. display_arg.out_width = dvr_dev->itu656in.width;
  1416. display_arg.out_height = dvr_dev->itu656in.height;
  1417. display_arg.out_x = dvr_dev->itu656in.xpos;
  1418. display_arg.out_y = dvr_dev->itu656in.ypos;
  1419. display_arg.format = ARK_DISP_VIDEO_PIXFMT_YUYV;
  1420. if (!dvr_dev->deinter_indirect_show){
  1421. //ark_fb_update_window_by_layer_id(DISPLAY_LAYER, &display_arg);
  1422. ark_itu656_display_init(width,height,0,0,display_arg.out_width,display_arg.out_height,1);
  1423. }
  1424. }
  1425. if (dvr_dev->itu656in.tvout) {
  1426. ark_disp_set_gui_tvout(0);
  1427. vin_config_tvout(dvr_dev);
  1428. vin_tvout_enable(dvr_dev, 1);
  1429. }
  1430. dvr_dev->discard_frame = DISCARD_FRAME_SYS_CHANGE;
  1431. if (dvr_dev->interlace) {
  1432. #ifdef ITU656_USE_DEINTERLACE
  1433. dvr_dev->discard_frame = DISCARD_FRAME_SYS_CHANGE * 2;
  1434. #endif
  1435. }
  1436. dvr_dev->video_reinit = 1;
  1437. dvr_dev->show_video = 0;
  1438. dvr_dev->display_odd_even = 0;
  1439. for (i = 0; i < ITU656_BUFFER_NUM; i++)
  1440. dvr_dev->buf_status[i] = 0;
  1441. dvr_dev->write_buffer = 0;
  1442. dvr_dev->display_buffer = ITU656_BUFFER_NUM - 1;
  1443. for (i = 0; i < ITU656_FRAME_NUM; i++)
  1444. dvr_dev->framebuf_status[i] = 0;
  1445. dvr_dev->write_framebuf = 0;////
  1446. dvr_dev->get_framebuf = 0;
  1447. ark_vin_enable_write();
  1448. spin_unlock_irqrestore(&dvr_dev->spin_lock, flags);
  1449. }
  1450. static void vin_start(struct dvr_dev *dvr_dev)
  1451. {
  1452. if(!dvr_dev->work_status){
  1453. deinterlace_init();
  1454. if(g_ark168_vin->pdata.g_arkvin_priv->select_channel)
  1455. g_ark168_vin->pdata.g_arkvin_priv->select_channel(dvr_dev->channel);
  1456. ark_vin_pad_select(dvr_dev);
  1457. ark_vin_reg_init(dvr_dev);
  1458. ark_vin_enable(dvr_dev);
  1459. dvr_dev->work_status = 1;
  1460. dvr_dev->old_cvbs_type = TYPE_UNKNOWN;
  1461. }
  1462. }
  1463. static void vin_stop(struct dvr_dev *dvr_dev)
  1464. {
  1465. dvr_dev->work_status = 0;
  1466. del_timer(&dvr_dev->timer);
  1467. dvr_dev->show_video = 0;
  1468. ark_disp_set_tvout_next_oddfield_bufaddr(0);
  1469. ark_disp_set_tvout_next_evenfield_bufaddr(0);
  1470. ark_disp_set_layer_en(DISPLAY_LAYER, 0);
  1471. ark_vin_disable_write(); /*stop write data back*/
  1472. ark_vin_disable();
  1473. if (dvr_dev->itu656in.tvout) {
  1474. ark_disp_set_layer_en(TVOUT_LAYER, 0);
  1475. ark_disp_set_gui_tvout(1);
  1476. }
  1477. msleep(100);
  1478. ark_vin_reg_uninit();
  1479. }
  1480. static void vin_init(struct ark1668_vin_device *vin, struct vin_para *para)
  1481. {
  1482. struct dvr_dev* dvr_dev = vin->dvr_dev;
  1483. int i;
  1484. memcpy(&dvr_dev->itu656in, para, sizeof(struct vin_para));
  1485. dvr_dev->interlace = !dvr_dev->itu656in.progressive;
  1486. dvr_dev->itu601en = dvr_dev->itu656in.itu601en;
  1487. if(!g_ark168_vin->stream_flag){
  1488. if (dvr_dev->interlace) {
  1489. for(i=0; i<ITU656_BUFFER_NUM; i++)
  1490. {
  1491. dvr_dev->oddbuf_phyaddr[i] = dvr_dev->buffer_phyaddr + ITU656_FRAME_SIZE*2*i;
  1492. dvr_dev->evenbuf_phyaddr[i] = dvr_dev->buffer_phyaddr + ITU656_FRAME_SIZE*(2*i+1);
  1493. //for mirror
  1494. dvr_dev->oddbuf_virtaddr[i] = (unsigned int)dvr_dev->buffer_virtaddr + ITU656_FRAME_SIZE*2*i;
  1495. dvr_dev->evenbuf_virtaddr[i]= (unsigned int)dvr_dev->buffer_virtaddr + ITU656_FRAME_SIZE*(2*i+1);
  1496. }
  1497. for(i=0; i<4; i++)
  1498. dvr_dev->fieldbuf_phyaddr[i] = dvr_dev->buffer_phyaddr + ITU656_FRAME_SIZE*6 + ITU656_FIELD_SIZE*i;
  1499. //for vbox
  1500. for(i=0; i<ITU656_FRAME_NUM; i++){
  1501. dvr_dev->framebuf_phyaddr[i] = dvr_dev->buffer_phyaddr + ITU656_FRAME_SIZE*i;
  1502. }
  1503. } else {
  1504. for(i=0; i<ITU656_BUFFER_NUM; i++)
  1505. {
  1506. if(vin->pdata.g_arkvin_priv->support_max_resolution == TYPE_1080P)
  1507. dvr_dev->oddbuf_phyaddr[i] = dvr_dev->buffer_phyaddr + ITU656_PROGRESSIVE_FRAME_SIZE_1080P*i;
  1508. else
  1509. dvr_dev->oddbuf_phyaddr[i] = dvr_dev->buffer_phyaddr + ITU656_PROGRESSIVE_FRAME_SIZE*i;
  1510. }
  1511. //for vbox
  1512. for(i=0; i<ITU656_FRAME_NUM; i++)
  1513. dvr_dev->framebuf_phyaddr[i] = dvr_dev->buffer_phyaddr + ITU656_PROGRESSIVE_FRAME_SIZE*i;
  1514. }
  1515. }
  1516. switch (para->source) {
  1517. case DVR_SOURCE_DVD:
  1518. dvr_dev->channel = ARK7116_AV2;
  1519. break;
  1520. case DVR_SOURCE_AUX:
  1521. dvr_dev->channel = ARK7116_AV1;
  1522. break;
  1523. case DVR_SOURCE_CAMERA:
  1524. default:
  1525. dvr_dev->channel = ARK7116_AV0;
  1526. break;
  1527. }
  1528. }
  1529. static irqreturn_t ark_deinterlace_int_handler(int irq, void *dev_id)
  1530. {
  1531. u32 raw_int,i;
  1532. unsigned long flags;
  1533. struct dvr_dev* dvr_dev = (struct dvr_dev *)dev_id;
  1534. static int last_mirror_type;
  1535. raw_int = vin_readl_dein(ARK1668_DEINTERLACE_RAW_INT);
  1536. spin_lock_irqsave(&dvr_dev->spin_lock, flags);
  1537. if(raw_int & (1 << 0 )){
  1538. vin_writel_dein(ARK1668_DEINTERLACE_INT_CLEAR, 0x1);
  1539. }else if(raw_int & (1 << 1)){
  1540. vin_writel_dein(ARK1668_DEINTERLACE_INT_CLEAR, 0x2); //error
  1541. deinterlace_reset();
  1542. printk("deinterlace axi error\n");
  1543. }
  1544. if(last_mirror_type != dvr_dev->mirror_type && dvr_dev->interlace){
  1545. if (dvr_dev->mirror_type == MIRROR_TYPE_NONE){
  1546. dvr_dev->write_buffer = 0;
  1547. dvr_dev->display_buffer = 0;
  1548. for (i = 0; i < ITU656_BUFFER_NUM; i++)
  1549. dvr_dev->buf_status[i] = 0;
  1550. vin_writel_lcd(ARK1668_LCDC_VIDEO2_CTL, vin_readl_lcd(ARK1668_LCDC_VIDEO2_CTL)& ~(0x03<<17));
  1551. last_mirror_type = MIRROR_TYPE_NONE;
  1552. printk("mirror_type=0, reset.\n");
  1553. goto end;
  1554. }
  1555. }
  1556. last_mirror_type = dvr_dev->mirror_type;
  1557. if(dvr_dev->mirror_type && dvr_dev->interlace){//for mirror
  1558. if (dvr_dev->deinter_odd_even == DEINTERLACE_FIELD_EVEN) {
  1559. dvr_dev->buf_status[dvr_dev->write_buffer] |= ITU656_BUFFER_FULL_MIRROR;
  1560. GetPingPongNextBuf(dvr_dev->write_buffer,ITU656_BUFFER_NUM);
  1561. if(dvr_dev->buf_status[dvr_dev->write_buffer]&ITU656_BUFFER_FULL_MIRROR)
  1562. {
  1563. GetPingPongPreBuf(dvr_dev->write_buffer, ITU656_BUFFER_NUM);
  1564. dvr_dev->buf_status[dvr_dev->write_buffer] &= ~ITU656_BUFFER_FULL_MIRROR;
  1565. }
  1566. }
  1567. queue_work(dvr_dev->mirror_queue, &dvr_dev->mirror_work);
  1568. }
  1569. else if(dvr_dev->deinter_indirect_show){//for vbox
  1570. dvr_dev->framebuf_status[dvr_dev->write_framebuf] |= ITU656_BUFFER_FULL_APP;
  1571. GetPingPongNextBuf(dvr_dev->write_framebuf,ITU656_FRAME_NUM);
  1572. if(dvr_dev->framebuf_status[dvr_dev->write_framebuf])
  1573. {
  1574. GetPingPongPreBuf(dvr_dev->write_framebuf, ITU656_FRAME_NUM);
  1575. dvr_dev->framebuf_status[dvr_dev->write_framebuf] &= ~ITU656_BUFFER_FULL_APP;
  1576. }
  1577. dvr_dev->frame_finish_count = 0;
  1578. for(i = 0;i < ITU656_FRAME_NUM;i++){
  1579. if(dvr_dev->framebuf_status[i] == ITU656_BUFFER_FULL_APP)
  1580. dvr_dev->frame_finish_count++;
  1581. }
  1582. wake_up_interruptible(&dvr_dev->frame_finish_waitq);
  1583. if(dvr_dev->fasync_queue != NULL) {
  1584. //printk(KERN_ALERT "kill_fasync vindeo frame finish.\n");
  1585. kill_fasync(&dvr_dev->fasync_queue, SIGIO, POLL_IN);
  1586. }
  1587. }
  1588. else{//normal
  1589. if (dvr_dev->deinter_odd_even == DEINTERLACE_FIELD_EVEN) {
  1590. dvr_dev->buf_status[dvr_dev->write_buffer] |= ITU656_BUFFER_FULL_LCD;
  1591. GetPingPongNextBuf(dvr_dev->write_buffer,ITU656_BUFFER_NUM);
  1592. if(dvr_dev->buf_status[dvr_dev->write_buffer])
  1593. {
  1594. GetPingPongPreBuf(dvr_dev->write_buffer, ITU656_BUFFER_NUM);
  1595. dvr_dev->buf_status[dvr_dev->write_buffer] &= ~ITU656_BUFFER_FULL_LCD;
  1596. }
  1597. dvr_dev->buf_status[dvr_dev->display_buffer] &= ~ITU656_BUFFER_FULL_LCD;
  1598. }
  1599. }
  1600. end:
  1601. dvr_dev->deinter_status = 0;
  1602. spin_unlock_irqrestore(&dvr_dev->spin_lock, flags);
  1603. return IRQ_HANDLED;
  1604. }
  1605. static int vin_async_bound(struct v4l2_async_notifier *notifier,
  1606. struct v4l2_subdev *subdev,
  1607. struct v4l2_async_subdev *asd)
  1608. {
  1609. struct ark1668_vin_device *ark_vin = container_of(notifier->v4l2_dev,
  1610. struct ark1668_vin_device, v4l2_dev);
  1611. struct vin_subdev_entity *subdev_entity =
  1612. container_of(notifier, struct vin_subdev_entity, notifier);
  1613. if (video_is_registered(&ark_vin->video_dev)) {
  1614. v4l2_err(&ark_vin->v4l2_dev, "only supports one sub-device.\n");
  1615. return -EBUSY;
  1616. }
  1617. subdev_entity->sd = subdev;
  1618. return 0;
  1619. }
  1620. static void vin_async_unbind(struct v4l2_async_notifier *notifier,
  1621. struct v4l2_subdev *subdev,
  1622. struct v4l2_async_subdev *asd)
  1623. {
  1624. ARKVIN_DBGPRTK("vin_async_unbind ......\n" );
  1625. struct ark1668_vin_device *ark_vin = container_of(notifier->v4l2_dev,
  1626. struct ark1668_vin_device, v4l2_dev);
  1627. cancel_work_sync(&ark_vin->awb_work);
  1628. video_unregister_device(&ark_vin->video_dev);
  1629. }
  1630. static int vin_set_default_fmt(struct ark1668_vin_device *vin)
  1631. {
  1632. struct v4l2_format f = {
  1633. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1634. .fmt.pix = {
  1635. .width = DISPLAY_WIDTH,
  1636. .height = DISPLAY_HEIGHT,
  1637. .field = V4L2_FIELD_ANY,
  1638. .pixelformat = V4L2_PIX_FMT_YUYV,
  1639. },
  1640. };
  1641. vin->fmt = f;
  1642. return 0;
  1643. }
  1644. static int vin_async_complete(struct v4l2_async_notifier *notifier)
  1645. {
  1646. struct ark1668_vin_device *ark_vin = container_of(notifier->v4l2_dev,struct ark1668_vin_device, v4l2_dev);
  1647. ark_vin->current_subdev = container_of(notifier,struct vin_subdev_entity, notifier);
  1648. struct video_device *vdev = &ark_vin->video_dev;
  1649. struct v4l2_subdev *sd = ark_vin->current_subdev->sd;
  1650. struct vb2_queue *q = &ark_vin->vb2_vidq;
  1651. struct ark_subdev_data *ark_data = v4l2_get_subdevdata(sd);
  1652. int ret;
  1653. /* Register subdev device node */
  1654. ret = v4l2_device_register_subdev_nodes(&ark_vin->v4l2_dev);
  1655. if (ret < 0) {
  1656. printk(KERN_ALERT "v4l2_device_register_subdev_nodes error\n");
  1657. return ret;
  1658. }
  1659. if(!ark_data->g_arkvin_priv || !ark_data->g_arkvin_client){
  1660. printk(KERN_ALERT "get ark_data error .\n");
  1661. return -EINVAL;
  1662. }
  1663. /* Get a method from a child device's private data */
  1664. g_ark168_vin->pdata = *ark_data;
  1665. ARKVIN_DBGPRTK("subdev addr is %p \n",sd);
  1666. mutex_init(&ark_vin->lock);
  1667. init_completion(&ark_vin->comp);
  1668. /* Initialize videobuf2 queue */
  1669. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1670. q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ;
  1671. q->drv_priv = ark_vin;
  1672. q->buf_struct_size = sizeof(struct vin_buffer);
  1673. q->ops = &vin_vb2_ops;
  1674. q->mem_ops = &vb2_dma_contig_memops;
  1675. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1676. q->lock = &ark_vin->lock;
  1677. q->min_buffers_needed = 1;
  1678. q->dev = ark_vin->dev;
  1679. ret = vb2_queue_init(q);
  1680. if (ret < 0) {
  1681. v4l2_err(&ark_vin->v4l2_dev,
  1682. "vb2_queue_init() failed: %d\n", ret);
  1683. return ret;
  1684. }
  1685. /* Init video dma queues */
  1686. INIT_LIST_HEAD(&ark_vin->ark_queue);
  1687. spin_lock_init(&ark_vin->ark_queue_lock);
  1688. ret = vin_set_default_fmt(ark_vin);
  1689. if (ret) {
  1690. v4l2_err(&ark_vin->v4l2_dev, "Could not set default format\n");
  1691. return ret;
  1692. }
  1693. /* Register video device */
  1694. strlcpy(vdev->name, ARK_VIN_NAME, sizeof(vdev->name));
  1695. vdev->release = video_device_release_empty;
  1696. vdev->fops = &vin_fops;
  1697. vdev->ioctl_ops = &vin_ioctl_ops;
  1698. vdev->v4l2_dev = &ark_vin->v4l2_dev;
  1699. vdev->vfl_dir = VFL_DIR_RX;
  1700. vdev->queue = q;
  1701. vdev->lock = &ark_vin->lock;
  1702. vdev->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE;
  1703. video_set_drvdata(vdev, ark_vin);
  1704. ret = video_register_device(vdev, VFL_TYPE_GRABBER, -1);
  1705. if (ret < 0) {
  1706. v4l2_err(&ark_vin->v4l2_dev,
  1707. "video_register_device failed: %d\n", ret);
  1708. return ret;
  1709. }
  1710. return 0;
  1711. }
  1712. static void vin_driver_init(struct device *dev)
  1713. {
  1714. g_ark168_vin->dvr_dev = devm_kzalloc(dev, sizeof(struct dvr_dev), GFP_KERNEL);
  1715. if (g_ark168_vin->dvr_dev == NULL) {
  1716. dev_err(dev, "%s %d: failed to allocate memory\n",
  1717. __FUNCTION__, __LINE__);
  1718. return -ENOMEM;
  1719. }
  1720. g_ark168_vin->dvr_dev->work_status = 0;
  1721. g_ark168_vin->dvr_dev->deinter_status = 0;
  1722. g_ark168_vin->dvr_dev->start = vin_start;
  1723. g_ark168_vin->dvr_dev->stop = vin_stop;
  1724. g_ark168_vin->dvr_dev->fasync_queue = NULL;
  1725. g_ark168_vin->dvr_dev->system = NTSC;
  1726. g_ark168_vin->dvr_dev->cur_buffer = 0;
  1727. g_ark168_vin->dvr_dev->write_buffer = 0;
  1728. g_ark168_vin->dvr_dev->display_buffer = 0;
  1729. g_ark168_vin->dvr_dev->carback_signal = 0;
  1730. g_ark168_vin->dvr_dev->ic_type = g_ark168_vin->pdata.g_arkvin_priv->ic_type;
  1731. g_ark168_vin->dvr_dev->old_cvbs_type = TYPE_UNKNOWN;
  1732. //for vbox
  1733. g_ark168_vin->dvr_dev->write_framebuf = 0;
  1734. g_ark168_vin->dvr_dev->get_framebuf = 0;
  1735. g_ark168_vin->dvr_dev->deinter_indirect_show = 0;
  1736. g_ark168_vin->dvr_dev->frame_finish_count = 0;
  1737. g_ark168_vin->stream_flag = false;
  1738. init_waitqueue_head(&g_ark168_vin->dvr_dev->frame_finish_waitq);
  1739. spin_lock_init(&g_ark168_vin->dvr_dev->spin_lock);
  1740. }
  1741. static int vin_parse_dt(struct device *dev, struct ark1668_vin_device *ark_vin)
  1742. {
  1743. struct device_node *np = dev->of_node;
  1744. struct device_node *epn = NULL, *rem;
  1745. struct v4l2_fwnode_endpoint v4l2_epn;
  1746. struct vin_subdev_entity *subdev_entity;
  1747. unsigned int flags;
  1748. int ret;
  1749. INIT_LIST_HEAD(&ark_vin->subdev_entities);
  1750. while (1) {
  1751. epn = of_graph_get_next_endpoint(np, epn);
  1752. if (!epn)
  1753. return 0;
  1754. rem = of_graph_get_remote_port_parent(epn);
  1755. if (!rem) {
  1756. dev_notice(dev, "Remote device at %pOF not found\n",
  1757. epn);
  1758. continue;
  1759. }
  1760. ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(epn),
  1761. &v4l2_epn);
  1762. if (ret) {
  1763. of_node_put(rem);
  1764. ret = -EINVAL;
  1765. dev_err(dev, "Could not parse the endpoint\n");
  1766. break;
  1767. }
  1768. subdev_entity = devm_kzalloc(dev,
  1769. sizeof(*subdev_entity), GFP_KERNEL);
  1770. if (!subdev_entity) {
  1771. of_node_put(rem);
  1772. ret = -ENOMEM;
  1773. break;
  1774. }
  1775. subdev_entity->asd = devm_kzalloc(dev,
  1776. sizeof(*subdev_entity->asd), GFP_KERNEL);
  1777. if (!subdev_entity->asd) {
  1778. of_node_put(rem);
  1779. ret = -ENOMEM;
  1780. break;
  1781. }
  1782. flags = v4l2_epn.bus.parallel.flags;
  1783. subdev_entity->asd->match_type = V4L2_ASYNC_MATCH_FWNODE;
  1784. subdev_entity->asd->match.fwnode.fwnode = of_fwnode_handle(rem);
  1785. /* Adds an instance to the linked list*/
  1786. list_add_tail(&subdev_entity->list, &ark_vin->subdev_entities);
  1787. }
  1788. of_node_put(epn);
  1789. return ret;
  1790. }
  1791. static void vin_subdev_cleanup(struct ark1668_vin_device *vin)
  1792. {
  1793. struct vin_subdev_entity *subdev_entity;
  1794. list_for_each_entry(subdev_entity, &vin->subdev_entities, list)
  1795. v4l2_async_notifier_unregister(&subdev_entity->notifier);
  1796. INIT_LIST_HEAD(&vin->subdev_entities);
  1797. }
  1798. static int ark1668_vin_probe(struct platform_device *pdev)
  1799. {
  1800. struct device *dev = &pdev->dev;
  1801. struct vin_subdev_entity *subdev_entity;
  1802. struct ark1668_vin_device* ark_vin;
  1803. struct resource *res;
  1804. void __iomem *regs;
  1805. int ret,value;
  1806. ark_vin = devm_kzalloc(dev, sizeof(*ark_vin), GFP_KERNEL);
  1807. if (!ark_vin)
  1808. return -ENOMEM;
  1809. g_ark168_vin = ark_vin;
  1810. platform_set_drvdata(pdev, ark_vin);
  1811. ark_vin->dev = dev;
  1812. ret = v4l2_device_register(dev,&ark_vin->v4l2_dev);
  1813. if (ret) {
  1814. printk(KERN_ALERT "unable to register v4l2 device.\n");
  1815. }
  1816. ret = vin_parse_dt(dev, ark_vin);
  1817. if (ret)
  1818. printk(KERN_ALERT "fail to parse device tree\n");
  1819. if (list_empty(&ark_vin->subdev_entities)) {
  1820. printk(KERN_ALERT "no subdev found \n");
  1821. ret = -ENODEV;
  1822. }
  1823. /*find and prepare the async subdev notifier and register it */
  1824. list_for_each_entry(subdev_entity, &ark_vin->subdev_entities, list) {
  1825. subdev_entity->notifier.subdevs = &subdev_entity->asd;
  1826. subdev_entity->notifier.num_subdevs = 1;
  1827. subdev_entity->notifier.bound = vin_async_bound;
  1828. subdev_entity->notifier.unbind = vin_async_unbind;
  1829. subdev_entity->notifier.complete = vin_async_complete;
  1830. ret = v4l2_async_notifier_register(&ark_vin->v4l2_dev,
  1831. &subdev_entity->notifier);
  1832. if (ret) {
  1833. printk(KERN_ALERT "fail to register async notifier\n");
  1834. }
  1835. if (video_is_registered(&ark_vin->video_dev))
  1836. break;
  1837. }
  1838. vin_driver_init(dev);
  1839. ARKVIN_DBGPRTK("g_ark168_vin->pdata.g_arkvin_client->name = %s.\n",g_ark168_vin->pdata.g_arkvin_client->name);
  1840. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1841. if (IS_ERR(res)) {
  1842. ret = PTR_ERR(res);
  1843. }
  1844. regs = devm_ioremap_resource(&pdev->dev, res);
  1845. if (IS_ERR(regs)) {
  1846. ret = PTR_ERR(regs);
  1847. }
  1848. ark_vin->dvr_dev->context.itu656_base = regs;
  1849. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  1850. if (IS_ERR(res)) {
  1851. ret = PTR_ERR(res);
  1852. }
  1853. regs = ioremap(res->start, resource_size(res)); /* baseaddr conflict */
  1854. if (IS_ERR(regs)) {
  1855. ret = PTR_ERR(regs);
  1856. }
  1857. ark_vin->dvr_dev->context.sys_base = regs;
  1858. res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
  1859. if (IS_ERR(res)) {
  1860. ret = PTR_ERR(res);
  1861. }
  1862. regs = ioremap(res->start, resource_size(res)); /* baseaddr conflict */
  1863. if (IS_ERR(regs)) {
  1864. ret = PTR_ERR(regs);
  1865. }
  1866. ark_vin->dvr_dev->context.deinterlace_base = regs;
  1867. res = platform_get_resource(pdev, IORESOURCE_MEM, 3);
  1868. if (IS_ERR(res)) {
  1869. ret = PTR_ERR(res);
  1870. }
  1871. regs = ioremap(res->start, resource_size(res)); /* baseaddr conflict */
  1872. if (IS_ERR(regs)) {
  1873. ret = PTR_ERR(regs);
  1874. }
  1875. ark_vin->dvr_dev->context.lcd_base = regs;
  1876. ark_vin->dvr_dev->context.itu656_irq = platform_get_irq(pdev, 0);
  1877. if (ark_vin->dvr_dev->context.itu656_irq < 0) {
  1878. dev_err(&pdev->dev, "%s %d: can't get itu656_irq resource.\n", __FUNCTION__, __LINE__);
  1879. }
  1880. ret = devm_request_irq(
  1881. &pdev->dev,
  1882. ark_vin->dvr_dev->context.itu656_irq,
  1883. ark_vin_int_handler,
  1884. IRQF_SHARED,
  1885. "ark168_vin",
  1886. ark_vin->dvr_dev
  1887. );
  1888. if(ret){
  1889. dev_err(&pdev->dev, "%s %d: can't get assigned vin %d, error %d\n",
  1890. __FUNCTION__, __LINE__, ark_vin->dvr_dev->context.itu656_irq, ret);
  1891. }
  1892. ark_vin->dvr_dev->context.deinterlace_irq = platform_get_irq(pdev, 1);
  1893. if (ark_vin->dvr_dev->context.deinterlace_irq < 0) {
  1894. dev_err(&pdev->dev, "%s %d: can't get deinterlace_irq resource.\n", __FUNCTION__, __LINE__);
  1895. }
  1896. ret = devm_request_irq(
  1897. &pdev->dev,
  1898. ark_vin->dvr_dev->context.deinterlace_irq,
  1899. ark_deinterlace_int_handler,
  1900. IRQF_SHARED,
  1901. "dvr_deinterlace",
  1902. ark_vin->dvr_dev
  1903. );
  1904. if(ret){
  1905. dev_err(&pdev->dev, "%s %d: can't get assigned deinterlace_irq %d, error %d\n",
  1906. __FUNCTION__, __LINE__, ark_vin->dvr_dev->context.deinterlace_irq, ret);
  1907. }
  1908. if(ark_vin->pdata.g_arkvin_priv->support_max_resolution == TYPE_1080P)
  1909. ark_vin->dvr_dev->buffer_size = ITU656_PROGRESSIVE_FRAME_SIZE_1080P*ITU656_BUFFER_NUM;
  1910. else if(ark_vin->pdata.g_arkvin_priv->support_max_resolution == TYPE_720P)
  1911. ark_vin->dvr_dev->buffer_size = ITU656_PROGRESSIVE_FRAME_SIZE*ITU656_FRAME_NUM;
  1912. else
  1913. ark_vin->dvr_dev->buffer_size = ITU656_FIELD_SIZE*16;
  1914. timer_setup(&ark_vin->dvr_dev->timer, dither_timeout_timer, 0);
  1915. ark_vin->dvr_dev->mirror_queue = create_singlethread_workqueue("mirror_queue");
  1916. if(!ark_vin->dvr_dev->mirror_queue) {
  1917. printk(KERN_ERR "%s %d: , create_singlethread_workqueue fail.\n",__FUNCTION__, __LINE__);
  1918. return -1;
  1919. }
  1920. INIT_WORK(&ark_vin->dvr_dev->mirror_work, mirror_paint_work);
  1921. ark_vin->dvr_dev->channel = ITU656_CH1;
  1922. if(!of_property_read_u32(pdev->dev.of_node, "channel", &value)) {
  1923. //printk(KERN_ALERT "get itu channel=%d\n", value);
  1924. if(value >= ITU656_CH0 && value <= ITU656_CH2)
  1925. ark_vin->dvr_dev->itu_channel = value;
  1926. }
  1927. ark_vin->dvr_dev->mirror_type = MIRROR_TYPE_NONE;
  1928. if(!of_property_read_u32(pdev->dev.of_node, "mirror", &value)) {
  1929. printk("get mirror type=%d\n", value);
  1930. if(value >= MIRROR_TYPE_NONE && value < MIRROR_TYPE_END)
  1931. ark_vin->dvr_dev->mirror_type = value;
  1932. }
  1933. carback_first_enter();
  1934. return 0;
  1935. }
  1936. static int ark1668_vin_remove(struct platform_device *pdev)
  1937. {
  1938. struct ark1668_vin_device *ark_vin = platform_get_drvdata(pdev);
  1939. struct dvr_dev *dvr_dev = ark_vin->dvr_dev;
  1940. iounmap(dvr_dev->context.lcd_base);
  1941. iounmap(dvr_dev->context.deinterlace_base);
  1942. iounmap(dvr_dev->context.sys_base);
  1943. unregister_chrdev_region(MKDEV(dvr_dev->dev_major, dvr_dev->dev_minor), 1);
  1944. g_ark168_vin = NULL;
  1945. vin_subdev_cleanup(ark_vin);
  1946. v4l2_device_unregister(&ark_vin->v4l2_dev);
  1947. return 0;
  1948. }
  1949. static const struct of_device_id ark1668_vin_of_match[] = {
  1950. { .compatible = "arkmicro,ark1668-vin", },
  1951. { }
  1952. };
  1953. MODULE_DEVICE_TABLE(of, ark1668_itu656_of_match);
  1954. static struct platform_driver ark1668_vin_driver = {
  1955. .driver = {
  1956. .name = "ark1668-vin",
  1957. .of_match_table = of_match_ptr(ark1668_vin_of_match),
  1958. },
  1959. .probe = ark1668_vin_probe,
  1960. .remove = ark1668_vin_remove,
  1961. };
  1962. module_platform_driver(ark1668_vin_driver);
  1963. MODULE_AUTHOR("arkmicro");
  1964. MODULE_DESCRIPTION("The V4L2 driver for arkmicro");
  1965. MODULE_LICENSE("GPL v2");