eth.c 2.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2015 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <asm/io.h>
  7. #include <netdev.h>
  8. #include <fm_eth.h>
  9. #include <fsl_dtsec.h>
  10. #include <fsl_mdio.h>
  11. #include <malloc.h>
  12. #include "../common/fman.h"
  13. int board_eth_init(bd_t *bis)
  14. {
  15. #ifdef CONFIG_FMAN_ENET
  16. int i;
  17. struct memac_mdio_info dtsec_mdio_info;
  18. struct memac_mdio_info tgec_mdio_info;
  19. struct mii_dev *dev;
  20. u32 srds_s1;
  21. struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
  22. srds_s1 = in_be32(&gur->rcwsr[4]) &
  23. FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
  24. srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
  25. dtsec_mdio_info.regs =
  26. (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR;
  27. dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
  28. /* Register the 1G MDIO bus */
  29. fm_memac_mdio_init(bis, &dtsec_mdio_info);
  30. tgec_mdio_info.regs =
  31. (struct memac_mdio_controller *)CONFIG_SYS_FM1_TGEC_MDIO_ADDR;
  32. tgec_mdio_info.name = DEFAULT_FM_TGEC_MDIO_NAME;
  33. /* Register the 10G MDIO bus */
  34. fm_memac_mdio_init(bis, &tgec_mdio_info);
  35. /* Set the two on-board RGMII PHY address */
  36. fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR);
  37. fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR);
  38. /* QSGMII on lane B, MAC 1/2/5/6 */
  39. fm_info_set_phy_address(FM1_DTSEC1, QSGMII_PORT1_PHY_ADDR);
  40. fm_info_set_phy_address(FM1_DTSEC2, QSGMII_PORT2_PHY_ADDR);
  41. fm_info_set_phy_address(FM1_DTSEC5, QSGMII_PORT3_PHY_ADDR);
  42. fm_info_set_phy_address(FM1_DTSEC6, QSGMII_PORT4_PHY_ADDR);
  43. switch (srds_s1) {
  44. case 0x1455:
  45. break;
  46. default:
  47. printf("Invalid SerDes protocol 0x%x for LS1043ARDB\n",
  48. srds_s1);
  49. break;
  50. }
  51. dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
  52. for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++)
  53. fm_info_set_mdio(i, dev);
  54. /* XFI on lane A, MAC 9 */
  55. fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR);
  56. dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME);
  57. fm_info_set_mdio(FM1_10GEC1, dev);
  58. cpu_eth_init(bis);
  59. #endif
  60. return pci_eth_init(bis);
  61. }