dma-mapping.h 2.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _PARISC_DMA_MAPPING_H
  3. #define _PARISC_DMA_MAPPING_H
  4. #include <asm/cacheflush.h>
  5. /*
  6. ** We need to support 4 different coherent dma models with one binary:
  7. **
  8. ** I/O MMU consistent method dma_sync behavior
  9. ** ============= ====================== =======================
  10. ** a) PA-7x00LC uncachable host memory flush/purge
  11. ** b) U2/Uturn cachable host memory NOP
  12. ** c) Ike/Astro cachable host memory NOP
  13. ** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel
  14. **
  15. ** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU.
  16. **
  17. ** Systems (eg PCX-T workstations) that don't fall into the above
  18. ** categories will need to modify the needed drivers to perform
  19. ** flush/purge and allocate "regular" cacheable pages for everything.
  20. */
  21. extern const struct dma_map_ops *hppa_dma_ops;
  22. static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
  23. {
  24. return hppa_dma_ops;
  25. }
  26. static inline void *
  27. parisc_walk_tree(struct device *dev)
  28. {
  29. struct device *otherdev;
  30. if(likely(dev->platform_data != NULL))
  31. return dev->platform_data;
  32. /* OK, just traverse the bus to find it */
  33. for(otherdev = dev->parent; otherdev;
  34. otherdev = otherdev->parent) {
  35. if(otherdev->platform_data) {
  36. dev->platform_data = otherdev->platform_data;
  37. break;
  38. }
  39. }
  40. return dev->platform_data;
  41. }
  42. #define GET_IOC(dev) ({ \
  43. void *__pdata = parisc_walk_tree(dev); \
  44. __pdata ? HBA_DATA(__pdata)->iommu : NULL; \
  45. })
  46. #ifdef CONFIG_IOMMU_CCIO
  47. struct parisc_device;
  48. struct ioc;
  49. void * ccio_get_iommu(const struct parisc_device *dev);
  50. int ccio_request_resource(const struct parisc_device *dev,
  51. struct resource *res);
  52. int ccio_allocate_resource(const struct parisc_device *dev,
  53. struct resource *res, unsigned long size,
  54. unsigned long min, unsigned long max, unsigned long align);
  55. #else /* !CONFIG_IOMMU_CCIO */
  56. #define ccio_get_iommu(dev) NULL
  57. #define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
  58. #define ccio_allocate_resource(dev, res, size, min, max, align) \
  59. allocate_resource(&iomem_resource, res, size, min, max, \
  60. align, NULL, NULL)
  61. #endif /* !CONFIG_IOMMU_CCIO */
  62. #ifdef CONFIG_IOMMU_SBA
  63. struct parisc_device;
  64. void * sba_get_iommu(struct parisc_device *dev);
  65. #endif
  66. #endif