assabet.c 20 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/assabet.c
  3. *
  4. * Author: Nicolas Pitre
  5. *
  6. * This file contains all Assabet-specific tweaks.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/errno.h>
  16. #include <linux/gpio/gpio-reg.h>
  17. #include <linux/gpio/machine.h>
  18. #include <linux/ioport.h>
  19. #include <linux/platform_data/sa11x0-serial.h>
  20. #include <linux/regulator/fixed.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/serial_core.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/mfd/ucb1x00.h>
  25. #include <linux/mtd/mtd.h>
  26. #include <linux/mtd/partitions.h>
  27. #include <linux/delay.h>
  28. #include <linux/mm.h>
  29. #include <linux/leds.h>
  30. #include <linux/slab.h>
  31. #include <video/sa1100fb.h>
  32. #include <mach/hardware.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/setup.h>
  35. #include <asm/page.h>
  36. #include <asm/pgtable-hwdef.h>
  37. #include <asm/pgtable.h>
  38. #include <asm/tlbflush.h>
  39. #include <asm/mach/arch.h>
  40. #include <asm/mach/flash.h>
  41. #include <linux/platform_data/irda-sa11x0.h>
  42. #include <asm/mach/map.h>
  43. #include <mach/assabet.h>
  44. #include <linux/platform_data/mfd-mcp-sa11x0.h>
  45. #include <mach/irqs.h>
  46. #include "generic.h"
  47. #define ASSABET_BCR_DB1110 \
  48. (ASSABET_BCR_SPK_OFF | \
  49. ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
  50. ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
  51. ASSABET_BCR_IRDA_MD0)
  52. #define ASSABET_BCR_DB1111 \
  53. (ASSABET_BCR_SPK_OFF | \
  54. ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
  55. ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
  56. ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
  57. ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
  58. unsigned long SCR_value = ASSABET_SCR_INIT;
  59. EXPORT_SYMBOL(SCR_value);
  60. static struct gpio_chip *assabet_bcr_gc;
  61. static const char *assabet_names[] = {
  62. "cf_pwr", "cf_gfx_reset", "nsoft_reset", "irda_fsel",
  63. "irda_md0", "irda_md1", "stereo_loopback", "ncf_bus_on",
  64. "audio_pwr_on", "light_pwr_on", "lcd16data", "lcd_pwr_on",
  65. "rs232_on", "nred_led", "ngreen_led", "vib_on",
  66. "com_dtr", "com_rts", "radio_wake_mod", "i2c_enab",
  67. "tvir_enab", "qmute", "radio_pwr_on", "spkr_off",
  68. "rs232_valid", "com_dcd", "com_cts", "com_dsr",
  69. "radio_cts", "radio_dsr", "radio_dcd", "radio_ri",
  70. };
  71. /* The old deprecated interface */
  72. void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
  73. {
  74. unsigned long m = mask, v = val;
  75. assabet_bcr_gc->set_multiple(assabet_bcr_gc, &m, &v);
  76. }
  77. EXPORT_SYMBOL(ASSABET_BCR_frob);
  78. static int __init assabet_init_gpio(void __iomem *reg, u32 def_val)
  79. {
  80. struct gpio_chip *gc;
  81. writel_relaxed(def_val, reg);
  82. gc = gpio_reg_init(NULL, reg, -1, 32, "assabet", 0xff000000, def_val,
  83. assabet_names, NULL, NULL);
  84. if (IS_ERR(gc))
  85. return PTR_ERR(gc);
  86. assabet_bcr_gc = gc;
  87. return gc->base;
  88. }
  89. /*
  90. * The codec reset goes to three devices, so we need to release
  91. * the rest when any one of these requests it. However, that
  92. * causes the ADV7171 to consume around 100mA - more than half
  93. * the LCD-blanked power.
  94. *
  95. * With the ADV7171, LCD and backlight enabled, we go over
  96. * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
  97. * is connected, the Assabet crashes.
  98. */
  99. #define RST_UCB1X00 (1 << 0)
  100. #define RST_UDA1341 (1 << 1)
  101. #define RST_ADV7171 (1 << 2)
  102. #define SDA GPIO_GPIO(15)
  103. #define SCK GPIO_GPIO(18)
  104. #define MOD GPIO_GPIO(17)
  105. static void adv7171_start(void)
  106. {
  107. GPSR = SCK;
  108. udelay(1);
  109. GPSR = SDA;
  110. udelay(2);
  111. GPCR = SDA;
  112. }
  113. static void adv7171_stop(void)
  114. {
  115. GPSR = SCK;
  116. udelay(2);
  117. GPSR = SDA;
  118. udelay(1);
  119. }
  120. static void adv7171_send(unsigned byte)
  121. {
  122. unsigned i;
  123. for (i = 0; i < 8; i++, byte <<= 1) {
  124. GPCR = SCK;
  125. udelay(1);
  126. if (byte & 0x80)
  127. GPSR = SDA;
  128. else
  129. GPCR = SDA;
  130. udelay(1);
  131. GPSR = SCK;
  132. udelay(1);
  133. }
  134. GPCR = SCK;
  135. udelay(1);
  136. GPSR = SDA;
  137. udelay(1);
  138. GPDR &= ~SDA;
  139. GPSR = SCK;
  140. udelay(1);
  141. if (GPLR & SDA)
  142. printk(KERN_WARNING "No ACK from ADV7171\n");
  143. udelay(1);
  144. GPCR = SCK | SDA;
  145. udelay(1);
  146. GPDR |= SDA;
  147. udelay(1);
  148. }
  149. static void adv7171_write(unsigned reg, unsigned val)
  150. {
  151. unsigned gpdr = GPDR;
  152. unsigned gplr = GPLR;
  153. ASSABET_BCR_frob(ASSABET_BCR_AUDIO_ON, ASSABET_BCR_AUDIO_ON);
  154. udelay(100);
  155. GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
  156. GPDR = (GPDR | SCK | MOD) & ~SDA;
  157. udelay(10);
  158. if (!(GPLR & SDA))
  159. printk(KERN_WARNING "Something dragging SDA down?\n");
  160. GPDR |= SDA;
  161. adv7171_start();
  162. adv7171_send(0x54);
  163. adv7171_send(reg);
  164. adv7171_send(val);
  165. adv7171_stop();
  166. /* Restore GPIO state for L3 bus */
  167. GPSR = gplr & (SDA | SCK | MOD);
  168. GPCR = (~gplr) & (SDA | SCK | MOD);
  169. GPDR = gpdr;
  170. }
  171. static void adv7171_sleep(void)
  172. {
  173. /* Put the ADV7171 into sleep mode */
  174. adv7171_write(0x04, 0x40);
  175. }
  176. static unsigned codec_nreset;
  177. static void assabet_codec_reset(unsigned mask, int set)
  178. {
  179. unsigned long flags;
  180. bool old;
  181. local_irq_save(flags);
  182. old = !codec_nreset;
  183. if (set)
  184. codec_nreset &= ~mask;
  185. else
  186. codec_nreset |= mask;
  187. if (old != !codec_nreset) {
  188. if (codec_nreset) {
  189. ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
  190. adv7171_sleep();
  191. } else {
  192. ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
  193. }
  194. }
  195. local_irq_restore(flags);
  196. }
  197. static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
  198. {
  199. int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND ||
  200. state == UCB_RST_PROBE_FAIL;
  201. assabet_codec_reset(RST_UCB1X00, set);
  202. }
  203. void assabet_uda1341_reset(int set)
  204. {
  205. assabet_codec_reset(RST_UDA1341, set);
  206. }
  207. EXPORT_SYMBOL(assabet_uda1341_reset);
  208. /*
  209. * Assabet flash support code.
  210. */
  211. #ifdef ASSABET_REV_4
  212. /*
  213. * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
  214. */
  215. static struct mtd_partition assabet_partitions[] = {
  216. {
  217. .name = "bootloader",
  218. .size = 0x00020000,
  219. .offset = 0,
  220. .mask_flags = MTD_WRITEABLE,
  221. }, {
  222. .name = "bootloader params",
  223. .size = 0x00020000,
  224. .offset = MTDPART_OFS_APPEND,
  225. .mask_flags = MTD_WRITEABLE,
  226. }, {
  227. .name = "jffs",
  228. .size = MTDPART_SIZ_FULL,
  229. .offset = MTDPART_OFS_APPEND,
  230. }
  231. };
  232. #else
  233. /*
  234. * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
  235. */
  236. static struct mtd_partition assabet_partitions[] = {
  237. {
  238. .name = "bootloader",
  239. .size = 0x00040000,
  240. .offset = 0,
  241. .mask_flags = MTD_WRITEABLE,
  242. }, {
  243. .name = "bootloader params",
  244. .size = 0x00040000,
  245. .offset = MTDPART_OFS_APPEND,
  246. .mask_flags = MTD_WRITEABLE,
  247. }, {
  248. .name = "jffs",
  249. .size = MTDPART_SIZ_FULL,
  250. .offset = MTDPART_OFS_APPEND,
  251. }
  252. };
  253. #endif
  254. static struct flash_platform_data assabet_flash_data = {
  255. .map_name = "cfi_probe",
  256. .parts = assabet_partitions,
  257. .nr_parts = ARRAY_SIZE(assabet_partitions),
  258. };
  259. static struct resource assabet_flash_resources[] = {
  260. DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
  261. DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
  262. };
  263. /*
  264. * Assabet IrDA support code.
  265. */
  266. static int assabet_irda_set_power(struct device *dev, unsigned int state)
  267. {
  268. static unsigned int bcr_state[4] = {
  269. ASSABET_BCR_IRDA_MD0,
  270. ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
  271. ASSABET_BCR_IRDA_MD1,
  272. 0
  273. };
  274. if (state < 4)
  275. ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0,
  276. bcr_state[state]);
  277. return 0;
  278. }
  279. static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
  280. {
  281. if (speed < 4000000)
  282. ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
  283. else
  284. ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
  285. }
  286. static struct irda_platform_data assabet_irda_data = {
  287. .set_power = assabet_irda_set_power,
  288. .set_speed = assabet_irda_set_speed,
  289. };
  290. static struct ucb1x00_plat_data assabet_ucb1x00_data = {
  291. .reset = assabet_ucb1x00_reset,
  292. .gpio_base = -1,
  293. .can_wakeup = 1,
  294. };
  295. static struct mcp_plat_data assabet_mcp_data = {
  296. .mccr0 = MCCR0_ADM,
  297. .sclk_rate = 11981000,
  298. .codec_pdata = &assabet_ucb1x00_data,
  299. };
  300. static void assabet_lcd_set_visual(u32 visual)
  301. {
  302. u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
  303. if (machine_is_assabet()) {
  304. #if 1 // phase 4 or newer Assabet's
  305. if (is_true_color)
  306. ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
  307. else
  308. ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
  309. #else
  310. // older Assabet's
  311. if (is_true_color)
  312. ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
  313. else
  314. ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
  315. #endif
  316. }
  317. }
  318. #ifndef ASSABET_PAL_VIDEO
  319. static void assabet_lcd_backlight_power(int on)
  320. {
  321. if (on)
  322. ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
  323. else
  324. ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
  325. }
  326. /*
  327. * Turn on/off the backlight. When turning the backlight on, we wait
  328. * 500us after turning it on so we don't cause the supplies to droop
  329. * when we enable the LCD controller (and cause a hard reset.)
  330. */
  331. static void assabet_lcd_power(int on)
  332. {
  333. if (on) {
  334. ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
  335. udelay(500);
  336. } else
  337. ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
  338. }
  339. /*
  340. * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
  341. * takes an RGB666 signal, but we provide it with an RGB565 signal
  342. * instead (def_rgb_16).
  343. */
  344. static struct sa1100fb_mach_info lq039q2ds54_info = {
  345. .pixclock = 171521, .bpp = 16,
  346. .xres = 320, .yres = 240,
  347. .hsync_len = 5, .vsync_len = 1,
  348. .left_margin = 61, .upper_margin = 3,
  349. .right_margin = 9, .lower_margin = 0,
  350. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  351. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  352. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
  353. .backlight_power = assabet_lcd_backlight_power,
  354. .lcd_power = assabet_lcd_power,
  355. .set_visual = assabet_lcd_set_visual,
  356. };
  357. #else
  358. static void assabet_pal_backlight_power(int on)
  359. {
  360. ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
  361. }
  362. static void assabet_pal_power(int on)
  363. {
  364. ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
  365. }
  366. static struct sa1100fb_mach_info pal_info = {
  367. .pixclock = 67797, .bpp = 16,
  368. .xres = 640, .yres = 512,
  369. .hsync_len = 64, .vsync_len = 6,
  370. .left_margin = 125, .upper_margin = 70,
  371. .right_margin = 115, .lower_margin = 36,
  372. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  373. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
  374. .backlight_power = assabet_pal_backlight_power,
  375. .lcd_power = assabet_pal_power,
  376. .set_visual = assabet_lcd_set_visual,
  377. };
  378. #endif
  379. #ifdef CONFIG_ASSABET_NEPONSET
  380. static struct resource neponset_resources[] = {
  381. DEFINE_RES_MEM(0x10000000, 0x08000000),
  382. DEFINE_RES_MEM(0x18000000, 0x04000000),
  383. DEFINE_RES_MEM(0x40000000, SZ_8K),
  384. DEFINE_RES_IRQ(IRQ_GPIO25),
  385. };
  386. #endif
  387. static struct gpiod_lookup_table assabet_cf_gpio_table = {
  388. .dev_id = "sa11x0-pcmcia.1",
  389. .table = {
  390. GPIO_LOOKUP("gpio", 21, "ready", GPIO_ACTIVE_HIGH),
  391. GPIO_LOOKUP("gpio", 22, "detect", GPIO_ACTIVE_LOW),
  392. GPIO_LOOKUP("gpio", 24, "bvd2", GPIO_ACTIVE_HIGH),
  393. GPIO_LOOKUP("gpio", 25, "bvd1", GPIO_ACTIVE_HIGH),
  394. GPIO_LOOKUP("assabet", 1, "reset", GPIO_ACTIVE_HIGH),
  395. GPIO_LOOKUP("assabet", 7, "bus-enable", GPIO_ACTIVE_LOW),
  396. { },
  397. },
  398. };
  399. static struct regulator_consumer_supply assabet_cf_vcc_consumers[] = {
  400. REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"),
  401. };
  402. static struct fixed_voltage_config assabet_cf_vcc_pdata __initdata = {
  403. .supply_name = "cf-power",
  404. .microvolts = 3300000,
  405. .enable_high = 1,
  406. };
  407. static void __init assabet_init(void)
  408. {
  409. /*
  410. * Ensure that the power supply is in "high power" mode.
  411. */
  412. GPSR = GPIO_GPIO16;
  413. GPDR |= GPIO_GPIO16;
  414. /*
  415. * Ensure that these pins are set as outputs and are driving
  416. * logic 0. This ensures that we won't inadvertently toggle
  417. * the WS latch in the CPLD, and we don't float causing
  418. * excessive power drain. --rmk
  419. */
  420. GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
  421. GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
  422. /*
  423. * Also set GPIO27 as an output; this is used to clock UART3
  424. * via the FPGA and as otherwise has no pullups or pulldowns,
  425. * so stop it floating.
  426. */
  427. GPCR = GPIO_GPIO27;
  428. GPDR |= GPIO_GPIO27;
  429. /*
  430. * Set up registers for sleep mode.
  431. */
  432. PWER = PWER_GPIO0;
  433. PGSR = 0;
  434. PCFR = 0;
  435. PSDR = 0;
  436. PPDR |= PPC_TXD3 | PPC_TXD1;
  437. PPSR |= PPC_TXD3 | PPC_TXD1;
  438. sa11x0_ppc_configure_mcp();
  439. if (machine_has_neponset()) {
  440. #ifndef CONFIG_ASSABET_NEPONSET
  441. printk( "Warning: Neponset detected but full support "
  442. "hasn't been configured in the kernel\n" );
  443. #else
  444. platform_device_register_simple("neponset", 0,
  445. neponset_resources, ARRAY_SIZE(neponset_resources));
  446. #endif
  447. } else {
  448. sa11x0_register_fixed_regulator(0, &assabet_cf_vcc_pdata,
  449. assabet_cf_vcc_consumers,
  450. ARRAY_SIZE(assabet_cf_vcc_consumers));
  451. }
  452. #ifndef ASSABET_PAL_VIDEO
  453. sa11x0_register_lcd(&lq039q2ds54_info);
  454. #else
  455. sa11x0_register_lcd(&pal_video);
  456. #endif
  457. sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
  458. ARRAY_SIZE(assabet_flash_resources));
  459. sa11x0_register_irda(&assabet_irda_data);
  460. sa11x0_register_mcp(&assabet_mcp_data);
  461. if (!machine_has_neponset())
  462. sa11x0_register_pcmcia(1, &assabet_cf_gpio_table);
  463. }
  464. /*
  465. * On Assabet, we must probe for the Neponset board _before_
  466. * paging_init() has occurred to actually determine the amount
  467. * of RAM available. To do so, we map the appropriate IO section
  468. * in the page table here in order to access GPIO registers.
  469. */
  470. static void __init map_sa1100_gpio_regs( void )
  471. {
  472. unsigned long phys = __PREG(GPLR) & PMD_MASK;
  473. unsigned long virt = (unsigned long)io_p2v(phys);
  474. int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
  475. pmd_t *pmd;
  476. pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
  477. *pmd = __pmd(phys | prot);
  478. flush_pmd_entry(pmd);
  479. }
  480. /*
  481. * Read System Configuration "Register"
  482. * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
  483. * User's Guide", section 4.4.1)
  484. *
  485. * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
  486. * to set up the serial port for decompression status messages. We
  487. * repeat it here because the kernel may not be loaded as a zImage, and
  488. * also because it's a hassle to communicate the SCR value to the kernel
  489. * from the decompressor.
  490. *
  491. * Note that IRQs are guaranteed to be disabled.
  492. */
  493. static void __init get_assabet_scr(void)
  494. {
  495. unsigned long uninitialized_var(scr), i;
  496. GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
  497. GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
  498. GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
  499. for(i = 100; i--; ) /* Read GPIO 9:2 */
  500. scr = GPLR;
  501. GPDR |= 0x3fc; /* restore correct pin direction */
  502. scr &= 0x3fc; /* save as system configuration byte. */
  503. SCR_value = scr;
  504. }
  505. static void __init
  506. fixup_assabet(struct tag *tags, char **cmdline)
  507. {
  508. /* This must be done before any call to machine_has_neponset() */
  509. map_sa1100_gpio_regs();
  510. get_assabet_scr();
  511. if (machine_has_neponset())
  512. printk("Neponset expansion board detected\n");
  513. }
  514. static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
  515. {
  516. if (port->mapbase == _Ser1UTCR0) {
  517. if (state)
  518. ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
  519. ASSABET_BCR_COM_RTS |
  520. ASSABET_BCR_COM_DTR);
  521. else
  522. ASSABET_BCR_set(ASSABET_BCR_RS232EN |
  523. ASSABET_BCR_COM_RTS |
  524. ASSABET_BCR_COM_DTR);
  525. }
  526. }
  527. /*
  528. * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
  529. * and UART3 (radio module). We only handle them for UART1 here.
  530. */
  531. static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
  532. {
  533. if (port->mapbase == _Ser1UTCR0) {
  534. u_int set = 0, clear = 0;
  535. if (mctrl & TIOCM_RTS)
  536. clear |= ASSABET_BCR_COM_RTS;
  537. else
  538. set |= ASSABET_BCR_COM_RTS;
  539. if (mctrl & TIOCM_DTR)
  540. clear |= ASSABET_BCR_COM_DTR;
  541. else
  542. set |= ASSABET_BCR_COM_DTR;
  543. ASSABET_BCR_clear(clear);
  544. ASSABET_BCR_set(set);
  545. }
  546. }
  547. static u_int assabet_get_mctrl(struct uart_port *port)
  548. {
  549. u_int ret = 0;
  550. u_int bsr = ASSABET_BSR;
  551. /* need 2 reads to read current value */
  552. bsr = ASSABET_BSR;
  553. if (port->mapbase == _Ser1UTCR0) {
  554. if (bsr & ASSABET_BSR_COM_DCD)
  555. ret |= TIOCM_CD;
  556. if (bsr & ASSABET_BSR_COM_CTS)
  557. ret |= TIOCM_CTS;
  558. if (bsr & ASSABET_BSR_COM_DSR)
  559. ret |= TIOCM_DSR;
  560. } else if (port->mapbase == _Ser3UTCR0) {
  561. if (bsr & ASSABET_BSR_RAD_DCD)
  562. ret |= TIOCM_CD;
  563. if (bsr & ASSABET_BSR_RAD_CTS)
  564. ret |= TIOCM_CTS;
  565. if (bsr & ASSABET_BSR_RAD_DSR)
  566. ret |= TIOCM_DSR;
  567. if (bsr & ASSABET_BSR_RAD_RI)
  568. ret |= TIOCM_RI;
  569. } else {
  570. ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
  571. }
  572. return ret;
  573. }
  574. static struct sa1100_port_fns assabet_port_fns __initdata = {
  575. .set_mctrl = assabet_set_mctrl,
  576. .get_mctrl = assabet_get_mctrl,
  577. .pm = assabet_uart_pm,
  578. };
  579. static struct map_desc assabet_io_desc[] __initdata = {
  580. { /* Board Control Register */
  581. .virtual = 0xf1000000,
  582. .pfn = __phys_to_pfn(0x12000000),
  583. .length = 0x00100000,
  584. .type = MT_DEVICE
  585. }, { /* MQ200 */
  586. .virtual = 0xf2800000,
  587. .pfn = __phys_to_pfn(0x4b800000),
  588. .length = 0x00800000,
  589. .type = MT_DEVICE
  590. }
  591. };
  592. static void __init assabet_map_io(void)
  593. {
  594. sa1100_map_io();
  595. iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
  596. /*
  597. * Set SUS bit in SDCR0 so serial port 1 functions.
  598. * Its called GPCLKR0 in my SA1110 manual.
  599. */
  600. Ser1SDCR0 |= SDCR0_SUS;
  601. MSC1 = (MSC1 & ~0xffff) |
  602. MSC_NonBrst | MSC_32BitStMem |
  603. MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);
  604. if (!machine_has_neponset())
  605. sa1100_register_uart_fns(&assabet_port_fns);
  606. /*
  607. * When Neponset is attached, the first UART should be
  608. * UART3. That's what Angel is doing and many documents
  609. * are stating this.
  610. *
  611. * We do the Neponset mapping even if Neponset support
  612. * isn't compiled in so the user will still get something on
  613. * the expected physical serial port.
  614. *
  615. * We no longer do this; not all boot loaders support it,
  616. * and UART3 appears to be somewhat unreliable with blob.
  617. */
  618. sa1100_register_uart(0, 1);
  619. sa1100_register_uart(2, 3);
  620. }
  621. /* LEDs */
  622. #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
  623. struct assabet_led {
  624. struct led_classdev cdev;
  625. u32 mask;
  626. };
  627. /*
  628. * The triggers lines up below will only be used if the
  629. * LED triggers are compiled in.
  630. */
  631. static const struct {
  632. const char *name;
  633. const char *trigger;
  634. } assabet_leds[] = {
  635. { "assabet:red", "cpu0",},
  636. { "assabet:green", "heartbeat", },
  637. };
  638. /*
  639. * The LED control in Assabet is reversed:
  640. * - setting bit means turn off LED
  641. * - clearing bit means turn on LED
  642. */
  643. static void assabet_led_set(struct led_classdev *cdev,
  644. enum led_brightness b)
  645. {
  646. struct assabet_led *led = container_of(cdev,
  647. struct assabet_led, cdev);
  648. if (b != LED_OFF)
  649. ASSABET_BCR_clear(led->mask);
  650. else
  651. ASSABET_BCR_set(led->mask);
  652. }
  653. static enum led_brightness assabet_led_get(struct led_classdev *cdev)
  654. {
  655. struct assabet_led *led = container_of(cdev,
  656. struct assabet_led, cdev);
  657. return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
  658. }
  659. static int __init assabet_leds_init(void)
  660. {
  661. int i;
  662. if (!machine_is_assabet())
  663. return -ENODEV;
  664. for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
  665. struct assabet_led *led;
  666. led = kzalloc(sizeof(*led), GFP_KERNEL);
  667. if (!led)
  668. break;
  669. led->cdev.name = assabet_leds[i].name;
  670. led->cdev.brightness_set = assabet_led_set;
  671. led->cdev.brightness_get = assabet_led_get;
  672. led->cdev.default_trigger = assabet_leds[i].trigger;
  673. if (!i)
  674. led->mask = ASSABET_BCR_LED_RED;
  675. else
  676. led->mask = ASSABET_BCR_LED_GREEN;
  677. if (led_classdev_register(NULL, &led->cdev) < 0) {
  678. kfree(led);
  679. break;
  680. }
  681. }
  682. return 0;
  683. }
  684. /*
  685. * Since we may have triggers on any subsystem, defer registration
  686. * until after subsystem_init.
  687. */
  688. fs_initcall(assabet_leds_init);
  689. #endif
  690. void __init assabet_init_irq(void)
  691. {
  692. unsigned int assabet_gpio_base;
  693. u32 def_val;
  694. sa1100_init_irq();
  695. if (machine_has_neponset())
  696. def_val = ASSABET_BCR_DB1111;
  697. else
  698. def_val = ASSABET_BCR_DB1110;
  699. /*
  700. * Angel sets this, but other bootloaders may not.
  701. *
  702. * This must precede any driver calls to BCR_set() or BCR_clear().
  703. */
  704. assabet_gpio_base = assabet_init_gpio((void *)&ASSABET_BCR, def_val);
  705. assabet_cf_vcc_pdata.gpio = assabet_gpio_base + 0;
  706. }
  707. MACHINE_START(ASSABET, "Intel-Assabet")
  708. .atag_offset = 0x100,
  709. .fixup = fixup_assabet,
  710. .map_io = assabet_map_io,
  711. .nr_irqs = SA1100_NR_IRQS,
  712. .init_irq = assabet_init_irq,
  713. .init_time = sa1100_timer_init,
  714. .init_machine = assabet_init,
  715. .init_late = sa11x0_init_late,
  716. #ifdef CONFIG_SA1111
  717. .dma_zone_size = SZ_1M,
  718. #endif
  719. .restart = sa11x0_restart,
  720. MACHINE_END