core.c 28 KB

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  1. /*
  2. * arch/arm/mach-ep93xx/core.c
  3. * Core routines for Cirrus EP93xx chips.
  4. *
  5. * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
  6. * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
  7. *
  8. * Thanks go to Michael Burian and Ray Lehtiniemi for their key
  9. * role in the ep93xx linux community.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. */
  16. #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/dma-mapping.h>
  22. #include <linux/sys_soc.h>
  23. #include <linux/irq.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <linux/leds.h>
  27. #include <linux/termios.h>
  28. #include <linux/amba/bus.h>
  29. #include <linux/amba/serial.h>
  30. #include <linux/mtd/physmap.h>
  31. #include <linux/i2c.h>
  32. #include <linux/gpio/machine.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/export.h>
  35. #include <linux/irqchip/arm-vic.h>
  36. #include <linux/reboot.h>
  37. #include <linux/usb/ohci_pdriver.h>
  38. #include <linux/random.h>
  39. #include <mach/hardware.h>
  40. #include <linux/platform_data/video-ep93xx.h>
  41. #include <linux/platform_data/keypad-ep93xx.h>
  42. #include <linux/platform_data/spi-ep93xx.h>
  43. #include <mach/gpio-ep93xx.h>
  44. #include <asm/mach/arch.h>
  45. #include <asm/mach/map.h>
  46. #include "soc.h"
  47. /*************************************************************************
  48. * Static I/O mappings that are needed for all EP93xx platforms
  49. *************************************************************************/
  50. static struct map_desc ep93xx_io_desc[] __initdata = {
  51. {
  52. .virtual = EP93XX_AHB_VIRT_BASE,
  53. .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
  54. .length = EP93XX_AHB_SIZE,
  55. .type = MT_DEVICE,
  56. }, {
  57. .virtual = EP93XX_APB_VIRT_BASE,
  58. .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
  59. .length = EP93XX_APB_SIZE,
  60. .type = MT_DEVICE,
  61. },
  62. };
  63. void __init ep93xx_map_io(void)
  64. {
  65. iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
  66. }
  67. /*************************************************************************
  68. * EP93xx IRQ handling
  69. *************************************************************************/
  70. void __init ep93xx_init_irq(void)
  71. {
  72. vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
  73. vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
  74. }
  75. /*************************************************************************
  76. * EP93xx System Controller Software Locked register handling
  77. *************************************************************************/
  78. /*
  79. * syscon_swlock prevents anything else from writing to the syscon
  80. * block while a software locked register is being written.
  81. */
  82. static DEFINE_SPINLOCK(syscon_swlock);
  83. void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
  84. {
  85. unsigned long flags;
  86. spin_lock_irqsave(&syscon_swlock, flags);
  87. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  88. __raw_writel(val, reg);
  89. spin_unlock_irqrestore(&syscon_swlock, flags);
  90. }
  91. void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
  92. {
  93. unsigned long flags;
  94. unsigned int val;
  95. spin_lock_irqsave(&syscon_swlock, flags);
  96. val = __raw_readl(EP93XX_SYSCON_DEVCFG);
  97. val &= ~clear_bits;
  98. val |= set_bits;
  99. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  100. __raw_writel(val, EP93XX_SYSCON_DEVCFG);
  101. spin_unlock_irqrestore(&syscon_swlock, flags);
  102. }
  103. /**
  104. * ep93xx_chip_revision() - returns the EP93xx chip revision
  105. *
  106. * See <mach/platform.h> for more information.
  107. */
  108. unsigned int ep93xx_chip_revision(void)
  109. {
  110. unsigned int v;
  111. v = __raw_readl(EP93XX_SYSCON_SYSCFG);
  112. v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
  113. v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
  114. return v;
  115. }
  116. EXPORT_SYMBOL_GPL(ep93xx_chip_revision);
  117. /*************************************************************************
  118. * EP93xx GPIO
  119. *************************************************************************/
  120. static struct resource ep93xx_gpio_resource[] = {
  121. DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
  122. };
  123. static struct platform_device ep93xx_gpio_device = {
  124. .name = "gpio-ep93xx",
  125. .id = -1,
  126. .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
  127. .resource = ep93xx_gpio_resource,
  128. };
  129. /*************************************************************************
  130. * EP93xx peripheral handling
  131. *************************************************************************/
  132. #define EP93XX_UART_MCR_OFFSET (0x0100)
  133. static void ep93xx_uart_set_mctrl(struct amba_device *dev,
  134. void __iomem *base, unsigned int mctrl)
  135. {
  136. unsigned int mcr;
  137. mcr = 0;
  138. if (mctrl & TIOCM_RTS)
  139. mcr |= 2;
  140. if (mctrl & TIOCM_DTR)
  141. mcr |= 1;
  142. __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
  143. }
  144. static struct amba_pl010_data ep93xx_uart_data = {
  145. .set_mctrl = ep93xx_uart_set_mctrl,
  146. };
  147. static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
  148. { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
  149. static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
  150. { IRQ_EP93XX_UART2 }, NULL);
  151. static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
  152. { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
  153. static struct resource ep93xx_rtc_resource[] = {
  154. DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
  155. };
  156. static struct platform_device ep93xx_rtc_device = {
  157. .name = "ep93xx-rtc",
  158. .id = -1,
  159. .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
  160. .resource = ep93xx_rtc_resource,
  161. };
  162. /*************************************************************************
  163. * EP93xx OHCI USB Host
  164. *************************************************************************/
  165. static struct clk *ep93xx_ohci_host_clock;
  166. static int ep93xx_ohci_power_on(struct platform_device *pdev)
  167. {
  168. if (!ep93xx_ohci_host_clock) {
  169. ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL);
  170. if (IS_ERR(ep93xx_ohci_host_clock))
  171. return PTR_ERR(ep93xx_ohci_host_clock);
  172. }
  173. return clk_enable(ep93xx_ohci_host_clock);
  174. }
  175. static void ep93xx_ohci_power_off(struct platform_device *pdev)
  176. {
  177. clk_disable(ep93xx_ohci_host_clock);
  178. }
  179. static struct usb_ohci_pdata ep93xx_ohci_pdata = {
  180. .power_on = ep93xx_ohci_power_on,
  181. .power_off = ep93xx_ohci_power_off,
  182. .power_suspend = ep93xx_ohci_power_off,
  183. };
  184. static struct resource ep93xx_ohci_resources[] = {
  185. DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
  186. DEFINE_RES_IRQ(IRQ_EP93XX_USB),
  187. };
  188. static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32);
  189. static struct platform_device ep93xx_ohci_device = {
  190. .name = "ohci-platform",
  191. .id = -1,
  192. .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
  193. .resource = ep93xx_ohci_resources,
  194. .dev = {
  195. .dma_mask = &ep93xx_ohci_dma_mask,
  196. .coherent_dma_mask = DMA_BIT_MASK(32),
  197. .platform_data = &ep93xx_ohci_pdata,
  198. },
  199. };
  200. /*************************************************************************
  201. * EP93xx physmap'ed flash
  202. *************************************************************************/
  203. static struct physmap_flash_data ep93xx_flash_data;
  204. static struct resource ep93xx_flash_resource = {
  205. .flags = IORESOURCE_MEM,
  206. };
  207. static struct platform_device ep93xx_flash = {
  208. .name = "physmap-flash",
  209. .id = 0,
  210. .dev = {
  211. .platform_data = &ep93xx_flash_data,
  212. },
  213. .num_resources = 1,
  214. .resource = &ep93xx_flash_resource,
  215. };
  216. /**
  217. * ep93xx_register_flash() - Register the external flash device.
  218. * @width: bank width in octets
  219. * @start: resource start address
  220. * @size: resource size
  221. */
  222. void __init ep93xx_register_flash(unsigned int width,
  223. resource_size_t start, resource_size_t size)
  224. {
  225. ep93xx_flash_data.width = width;
  226. ep93xx_flash_resource.start = start;
  227. ep93xx_flash_resource.end = start + size - 1;
  228. platform_device_register(&ep93xx_flash);
  229. }
  230. /*************************************************************************
  231. * EP93xx ethernet peripheral handling
  232. *************************************************************************/
  233. static struct ep93xx_eth_data ep93xx_eth_data;
  234. static struct resource ep93xx_eth_resource[] = {
  235. DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
  236. DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
  237. };
  238. static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
  239. static struct platform_device ep93xx_eth_device = {
  240. .name = "ep93xx-eth",
  241. .id = -1,
  242. .dev = {
  243. .platform_data = &ep93xx_eth_data,
  244. .coherent_dma_mask = DMA_BIT_MASK(32),
  245. .dma_mask = &ep93xx_eth_dma_mask,
  246. },
  247. .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
  248. .resource = ep93xx_eth_resource,
  249. };
  250. /**
  251. * ep93xx_register_eth - Register the built-in ethernet platform device.
  252. * @data: platform specific ethernet configuration (__initdata)
  253. * @copy_addr: flag indicating that the MAC address should be copied
  254. * from the IndAd registers (as programmed by the bootloader)
  255. */
  256. void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
  257. {
  258. if (copy_addr)
  259. memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
  260. ep93xx_eth_data = *data;
  261. platform_device_register(&ep93xx_eth_device);
  262. }
  263. /*************************************************************************
  264. * EP93xx i2c peripheral handling
  265. *************************************************************************/
  266. /* All EP93xx devices use the same two GPIO pins for I2C bit-banging */
  267. static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = {
  268. .dev_id = "i2c-gpio.0",
  269. .table = {
  270. /* Use local offsets on gpiochip/port "G" */
  271. GPIO_LOOKUP_IDX("G", 1, NULL, 0,
  272. GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
  273. GPIO_LOOKUP_IDX("G", 0, NULL, 1,
  274. GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
  275. },
  276. };
  277. static struct platform_device ep93xx_i2c_device = {
  278. .name = "i2c-gpio",
  279. .id = 0,
  280. .dev = {
  281. .platform_data = NULL,
  282. },
  283. };
  284. /**
  285. * ep93xx_register_i2c - Register the i2c platform device.
  286. * @devices: platform specific i2c bus device information (__initdata)
  287. * @num: the number of devices on the i2c bus
  288. */
  289. void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
  290. {
  291. /*
  292. * FIXME: this just sets the two pins as non-opendrain, as no
  293. * platforms tries to do that anyway. Flag the applicable lines
  294. * as open drain in the GPIO_LOOKUP above and the driver or
  295. * gpiolib will handle open drain/open drain emulation as need
  296. * be. Right now i2c-gpio emulates open drain which is not
  297. * optimal.
  298. */
  299. __raw_writel((0 << 1) | (0 << 0),
  300. EP93XX_GPIO_EEDRIVE);
  301. i2c_register_board_info(0, devices, num);
  302. gpiod_add_lookup_table(&ep93xx_i2c_gpiod_table);
  303. platform_device_register(&ep93xx_i2c_device);
  304. }
  305. /*************************************************************************
  306. * EP93xx SPI peripheral handling
  307. *************************************************************************/
  308. static struct ep93xx_spi_info ep93xx_spi_master_data;
  309. static struct resource ep93xx_spi_resources[] = {
  310. DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
  311. DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
  312. };
  313. static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
  314. static struct platform_device ep93xx_spi_device = {
  315. .name = "ep93xx-spi",
  316. .id = 0,
  317. .dev = {
  318. .platform_data = &ep93xx_spi_master_data,
  319. .coherent_dma_mask = DMA_BIT_MASK(32),
  320. .dma_mask = &ep93xx_spi_dma_mask,
  321. },
  322. .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
  323. .resource = ep93xx_spi_resources,
  324. };
  325. /**
  326. * ep93xx_register_spi() - registers spi platform device
  327. * @info: ep93xx board specific spi master info (__initdata)
  328. * @devices: SPI devices to register (__initdata)
  329. * @num: number of SPI devices to register
  330. *
  331. * This function registers platform device for the EP93xx SPI controller and
  332. * also makes sure that SPI pins are muxed so that I2S is not using those pins.
  333. */
  334. void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
  335. struct spi_board_info *devices, int num)
  336. {
  337. /*
  338. * When SPI is used, we need to make sure that I2S is muxed off from
  339. * SPI pins.
  340. */
  341. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
  342. ep93xx_spi_master_data = *info;
  343. spi_register_board_info(devices, num);
  344. platform_device_register(&ep93xx_spi_device);
  345. }
  346. /*************************************************************************
  347. * EP93xx LEDs
  348. *************************************************************************/
  349. static const struct gpio_led ep93xx_led_pins[] __initconst = {
  350. {
  351. .name = "platform:grled",
  352. .gpio = EP93XX_GPIO_LINE_GRLED,
  353. }, {
  354. .name = "platform:rdled",
  355. .gpio = EP93XX_GPIO_LINE_RDLED,
  356. },
  357. };
  358. static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
  359. .num_leds = ARRAY_SIZE(ep93xx_led_pins),
  360. .leds = ep93xx_led_pins,
  361. };
  362. /*************************************************************************
  363. * EP93xx pwm peripheral handling
  364. *************************************************************************/
  365. static struct resource ep93xx_pwm0_resource[] = {
  366. DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
  367. };
  368. static struct platform_device ep93xx_pwm0_device = {
  369. .name = "ep93xx-pwm",
  370. .id = 0,
  371. .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
  372. .resource = ep93xx_pwm0_resource,
  373. };
  374. static struct resource ep93xx_pwm1_resource[] = {
  375. DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
  376. };
  377. static struct platform_device ep93xx_pwm1_device = {
  378. .name = "ep93xx-pwm",
  379. .id = 1,
  380. .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
  381. .resource = ep93xx_pwm1_resource,
  382. };
  383. void __init ep93xx_register_pwm(int pwm0, int pwm1)
  384. {
  385. if (pwm0)
  386. platform_device_register(&ep93xx_pwm0_device);
  387. /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
  388. if (pwm1)
  389. platform_device_register(&ep93xx_pwm1_device);
  390. }
  391. int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
  392. {
  393. int err;
  394. if (pdev->id == 0) {
  395. err = 0;
  396. } else if (pdev->id == 1) {
  397. err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
  398. dev_name(&pdev->dev));
  399. if (err)
  400. return err;
  401. err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
  402. if (err)
  403. goto fail;
  404. /* PWM 1 output on EGPIO[14] */
  405. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
  406. } else {
  407. err = -ENODEV;
  408. }
  409. return err;
  410. fail:
  411. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  412. return err;
  413. }
  414. EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
  415. void ep93xx_pwm_release_gpio(struct platform_device *pdev)
  416. {
  417. if (pdev->id == 1) {
  418. gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
  419. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  420. /* EGPIO[14] used for GPIO */
  421. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
  422. }
  423. }
  424. EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
  425. /*************************************************************************
  426. * EP93xx video peripheral handling
  427. *************************************************************************/
  428. static struct ep93xxfb_mach_info ep93xxfb_data;
  429. static struct resource ep93xx_fb_resource[] = {
  430. DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
  431. };
  432. static struct platform_device ep93xx_fb_device = {
  433. .name = "ep93xx-fb",
  434. .id = -1,
  435. .dev = {
  436. .platform_data = &ep93xxfb_data,
  437. .coherent_dma_mask = DMA_BIT_MASK(32),
  438. .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
  439. },
  440. .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
  441. .resource = ep93xx_fb_resource,
  442. };
  443. /* The backlight use a single register in the framebuffer's register space */
  444. #define EP93XX_RASTER_REG_BRIGHTNESS 0x20
  445. static struct resource ep93xx_bl_resources[] = {
  446. DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
  447. EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
  448. };
  449. static struct platform_device ep93xx_bl_device = {
  450. .name = "ep93xx-bl",
  451. .id = -1,
  452. .num_resources = ARRAY_SIZE(ep93xx_bl_resources),
  453. .resource = ep93xx_bl_resources,
  454. };
  455. /**
  456. * ep93xx_register_fb - Register the framebuffer platform device.
  457. * @data: platform specific framebuffer configuration (__initdata)
  458. */
  459. void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
  460. {
  461. ep93xxfb_data = *data;
  462. platform_device_register(&ep93xx_fb_device);
  463. platform_device_register(&ep93xx_bl_device);
  464. }
  465. /*************************************************************************
  466. * EP93xx matrix keypad peripheral handling
  467. *************************************************************************/
  468. static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
  469. static struct resource ep93xx_keypad_resource[] = {
  470. DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
  471. DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
  472. };
  473. static struct platform_device ep93xx_keypad_device = {
  474. .name = "ep93xx-keypad",
  475. .id = -1,
  476. .dev = {
  477. .platform_data = &ep93xx_keypad_data,
  478. },
  479. .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
  480. .resource = ep93xx_keypad_resource,
  481. };
  482. /**
  483. * ep93xx_register_keypad - Register the keypad platform device.
  484. * @data: platform specific keypad configuration (__initdata)
  485. */
  486. void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
  487. {
  488. ep93xx_keypad_data = *data;
  489. platform_device_register(&ep93xx_keypad_device);
  490. }
  491. int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
  492. {
  493. int err;
  494. int i;
  495. for (i = 0; i < 8; i++) {
  496. err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
  497. if (err)
  498. goto fail_gpio_c;
  499. err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
  500. if (err)
  501. goto fail_gpio_d;
  502. }
  503. /* Enable the keypad controller; GPIO ports C and D used for keypad */
  504. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  505. EP93XX_SYSCON_DEVCFG_GONK);
  506. return 0;
  507. fail_gpio_d:
  508. gpio_free(EP93XX_GPIO_LINE_C(i));
  509. fail_gpio_c:
  510. for (--i; i >= 0; --i) {
  511. gpio_free(EP93XX_GPIO_LINE_C(i));
  512. gpio_free(EP93XX_GPIO_LINE_D(i));
  513. }
  514. return err;
  515. }
  516. EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
  517. void ep93xx_keypad_release_gpio(struct platform_device *pdev)
  518. {
  519. int i;
  520. for (i = 0; i < 8; i++) {
  521. gpio_free(EP93XX_GPIO_LINE_C(i));
  522. gpio_free(EP93XX_GPIO_LINE_D(i));
  523. }
  524. /* Disable the keypad controller; GPIO ports C and D used for GPIO */
  525. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  526. EP93XX_SYSCON_DEVCFG_GONK);
  527. }
  528. EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
  529. /*************************************************************************
  530. * EP93xx I2S audio peripheral handling
  531. *************************************************************************/
  532. static struct resource ep93xx_i2s_resource[] = {
  533. DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
  534. DEFINE_RES_IRQ(IRQ_EP93XX_SAI),
  535. };
  536. static struct platform_device ep93xx_i2s_device = {
  537. .name = "ep93xx-i2s",
  538. .id = -1,
  539. .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
  540. .resource = ep93xx_i2s_resource,
  541. };
  542. static struct platform_device ep93xx_pcm_device = {
  543. .name = "ep93xx-pcm-audio",
  544. .id = -1,
  545. };
  546. void __init ep93xx_register_i2s(void)
  547. {
  548. platform_device_register(&ep93xx_i2s_device);
  549. platform_device_register(&ep93xx_pcm_device);
  550. }
  551. #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
  552. EP93XX_SYSCON_DEVCFG_I2SONAC97)
  553. #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
  554. EP93XX_SYSCON_I2SCLKDIV_SPOL)
  555. int ep93xx_i2s_acquire(void)
  556. {
  557. unsigned val;
  558. ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
  559. EP93XX_SYSCON_DEVCFG_I2S_MASK);
  560. /*
  561. * This is potentially racy with the clock api for i2s_mclk, sclk and
  562. * lrclk. Since the i2s driver is the only user of those clocks we
  563. * rely on it to prevent parallel use of this function and the
  564. * clock api for the i2s clocks.
  565. */
  566. val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
  567. val &= ~EP93XX_I2SCLKDIV_MASK;
  568. val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
  569. ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
  570. return 0;
  571. }
  572. EXPORT_SYMBOL(ep93xx_i2s_acquire);
  573. void ep93xx_i2s_release(void)
  574. {
  575. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
  576. }
  577. EXPORT_SYMBOL(ep93xx_i2s_release);
  578. /*************************************************************************
  579. * EP93xx AC97 audio peripheral handling
  580. *************************************************************************/
  581. static struct resource ep93xx_ac97_resources[] = {
  582. DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
  583. DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
  584. };
  585. static struct platform_device ep93xx_ac97_device = {
  586. .name = "ep93xx-ac97",
  587. .id = -1,
  588. .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
  589. .resource = ep93xx_ac97_resources,
  590. };
  591. void __init ep93xx_register_ac97(void)
  592. {
  593. /*
  594. * Make sure that the AC97 pins are not used by I2S.
  595. */
  596. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
  597. platform_device_register(&ep93xx_ac97_device);
  598. platform_device_register(&ep93xx_pcm_device);
  599. }
  600. /*************************************************************************
  601. * EP93xx Watchdog
  602. *************************************************************************/
  603. static struct resource ep93xx_wdt_resources[] = {
  604. DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
  605. };
  606. static struct platform_device ep93xx_wdt_device = {
  607. .name = "ep93xx-wdt",
  608. .id = -1,
  609. .num_resources = ARRAY_SIZE(ep93xx_wdt_resources),
  610. .resource = ep93xx_wdt_resources,
  611. };
  612. /*************************************************************************
  613. * EP93xx IDE
  614. *************************************************************************/
  615. static struct resource ep93xx_ide_resources[] = {
  616. DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
  617. DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
  618. };
  619. static struct platform_device ep93xx_ide_device = {
  620. .name = "ep93xx-ide",
  621. .id = -1,
  622. .dev = {
  623. .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask,
  624. .coherent_dma_mask = DMA_BIT_MASK(32),
  625. },
  626. .num_resources = ARRAY_SIZE(ep93xx_ide_resources),
  627. .resource = ep93xx_ide_resources,
  628. };
  629. void __init ep93xx_register_ide(void)
  630. {
  631. platform_device_register(&ep93xx_ide_device);
  632. }
  633. int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
  634. {
  635. int err;
  636. int i;
  637. err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
  638. if (err)
  639. return err;
  640. err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
  641. if (err)
  642. goto fail_egpio15;
  643. for (i = 2; i < 8; i++) {
  644. err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
  645. if (err)
  646. goto fail_gpio_e;
  647. }
  648. for (i = 4; i < 8; i++) {
  649. err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
  650. if (err)
  651. goto fail_gpio_g;
  652. }
  653. for (i = 0; i < 8; i++) {
  654. err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
  655. if (err)
  656. goto fail_gpio_h;
  657. }
  658. /* GPIO ports E[7:2], G[7:4] and H used by IDE */
  659. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
  660. EP93XX_SYSCON_DEVCFG_GONIDE |
  661. EP93XX_SYSCON_DEVCFG_HONIDE);
  662. return 0;
  663. fail_gpio_h:
  664. for (--i; i >= 0; --i)
  665. gpio_free(EP93XX_GPIO_LINE_H(i));
  666. i = 8;
  667. fail_gpio_g:
  668. for (--i; i >= 4; --i)
  669. gpio_free(EP93XX_GPIO_LINE_G(i));
  670. i = 8;
  671. fail_gpio_e:
  672. for (--i; i >= 2; --i)
  673. gpio_free(EP93XX_GPIO_LINE_E(i));
  674. gpio_free(EP93XX_GPIO_LINE_EGPIO15);
  675. fail_egpio15:
  676. gpio_free(EP93XX_GPIO_LINE_EGPIO2);
  677. return err;
  678. }
  679. EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
  680. void ep93xx_ide_release_gpio(struct platform_device *pdev)
  681. {
  682. int i;
  683. for (i = 2; i < 8; i++)
  684. gpio_free(EP93XX_GPIO_LINE_E(i));
  685. for (i = 4; i < 8; i++)
  686. gpio_free(EP93XX_GPIO_LINE_G(i));
  687. for (i = 0; i < 8; i++)
  688. gpio_free(EP93XX_GPIO_LINE_H(i));
  689. gpio_free(EP93XX_GPIO_LINE_EGPIO15);
  690. gpio_free(EP93XX_GPIO_LINE_EGPIO2);
  691. /* GPIO ports E[7:2], G[7:4] and H used by GPIO */
  692. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
  693. EP93XX_SYSCON_DEVCFG_GONIDE |
  694. EP93XX_SYSCON_DEVCFG_HONIDE);
  695. }
  696. EXPORT_SYMBOL(ep93xx_ide_release_gpio);
  697. /*************************************************************************
  698. * EP93xx ADC
  699. *************************************************************************/
  700. static struct resource ep93xx_adc_resources[] = {
  701. DEFINE_RES_MEM(EP93XX_ADC_PHYS_BASE, 0x28),
  702. DEFINE_RES_IRQ(IRQ_EP93XX_TOUCH),
  703. };
  704. static struct platform_device ep93xx_adc_device = {
  705. .name = "ep93xx-adc",
  706. .id = -1,
  707. .num_resources = ARRAY_SIZE(ep93xx_adc_resources),
  708. .resource = ep93xx_adc_resources,
  709. };
  710. void __init ep93xx_register_adc(void)
  711. {
  712. /* Power up ADC, deactivate Touch Screen Controller */
  713. ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_TIN,
  714. EP93XX_SYSCON_DEVCFG_ADCPD);
  715. platform_device_register(&ep93xx_adc_device);
  716. }
  717. /*************************************************************************
  718. * EP93xx Security peripheral
  719. *************************************************************************/
  720. /*
  721. * The Maverick Key is 256 bits of micro fuses blown at the factory during
  722. * manufacturing to uniquely identify a part.
  723. *
  724. * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key
  725. */
  726. #define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x))
  727. #define EP93XX_SECURITY_SECFLG EP93XX_SECURITY_REG(0x2400)
  728. #define EP93XX_SECURITY_FUSEFLG EP93XX_SECURITY_REG(0x2410)
  729. #define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440)
  730. #define EP93XX_SECURITY_UNIQCHK EP93XX_SECURITY_REG(0x2450)
  731. #define EP93XX_SECURITY_UNIQVAL EP93XX_SECURITY_REG(0x2460)
  732. #define EP93XX_SECURITY_SECID1 EP93XX_SECURITY_REG(0x2500)
  733. #define EP93XX_SECURITY_SECID2 EP93XX_SECURITY_REG(0x2504)
  734. #define EP93XX_SECURITY_SECCHK1 EP93XX_SECURITY_REG(0x2520)
  735. #define EP93XX_SECURITY_SECCHK2 EP93XX_SECURITY_REG(0x2524)
  736. #define EP93XX_SECURITY_UNIQID2 EP93XX_SECURITY_REG(0x2700)
  737. #define EP93XX_SECURITY_UNIQID3 EP93XX_SECURITY_REG(0x2704)
  738. #define EP93XX_SECURITY_UNIQID4 EP93XX_SECURITY_REG(0x2708)
  739. #define EP93XX_SECURITY_UNIQID5 EP93XX_SECURITY_REG(0x270c)
  740. static char ep93xx_soc_id[33];
  741. static const char __init *ep93xx_get_soc_id(void)
  742. {
  743. unsigned int id, id2, id3, id4, id5;
  744. if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1)
  745. return "bad Hamming code";
  746. id = __raw_readl(EP93XX_SECURITY_UNIQID);
  747. id2 = __raw_readl(EP93XX_SECURITY_UNIQID2);
  748. id3 = __raw_readl(EP93XX_SECURITY_UNIQID3);
  749. id4 = __raw_readl(EP93XX_SECURITY_UNIQID4);
  750. id5 = __raw_readl(EP93XX_SECURITY_UNIQID5);
  751. if (id != id2)
  752. return "invalid";
  753. /* Toss the unique ID into the entropy pool */
  754. add_device_randomness(&id2, 4);
  755. add_device_randomness(&id3, 4);
  756. add_device_randomness(&id4, 4);
  757. add_device_randomness(&id5, 4);
  758. snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id),
  759. "%08x%08x%08x%08x", id2, id3, id4, id5);
  760. return ep93xx_soc_id;
  761. }
  762. static const char __init *ep93xx_get_soc_rev(void)
  763. {
  764. int rev = ep93xx_chip_revision();
  765. switch (rev) {
  766. case EP93XX_CHIP_REV_D0:
  767. return "D0";
  768. case EP93XX_CHIP_REV_D1:
  769. return "D1";
  770. case EP93XX_CHIP_REV_E0:
  771. return "E0";
  772. case EP93XX_CHIP_REV_E1:
  773. return "E1";
  774. case EP93XX_CHIP_REV_E2:
  775. return "E2";
  776. default:
  777. return "unknown";
  778. }
  779. }
  780. static const char __init *ep93xx_get_machine_name(void)
  781. {
  782. return kasprintf(GFP_KERNEL,"%s", machine_desc->name);
  783. }
  784. static struct device __init *ep93xx_init_soc(void)
  785. {
  786. struct soc_device_attribute *soc_dev_attr;
  787. struct soc_device *soc_dev;
  788. soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
  789. if (!soc_dev_attr)
  790. return NULL;
  791. soc_dev_attr->machine = ep93xx_get_machine_name();
  792. soc_dev_attr->family = "Cirrus Logic EP93xx";
  793. soc_dev_attr->revision = ep93xx_get_soc_rev();
  794. soc_dev_attr->soc_id = ep93xx_get_soc_id();
  795. soc_dev = soc_device_register(soc_dev_attr);
  796. if (IS_ERR(soc_dev)) {
  797. kfree(soc_dev_attr->machine);
  798. kfree(soc_dev_attr);
  799. return NULL;
  800. }
  801. return soc_device_to_device(soc_dev);
  802. }
  803. struct device __init *ep93xx_init_devices(void)
  804. {
  805. struct device *parent;
  806. /* Disallow access to MaverickCrunch initially */
  807. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
  808. /* Default all ports to GPIO */
  809. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  810. EP93XX_SYSCON_DEVCFG_GONK |
  811. EP93XX_SYSCON_DEVCFG_EONIDE |
  812. EP93XX_SYSCON_DEVCFG_GONIDE |
  813. EP93XX_SYSCON_DEVCFG_HONIDE);
  814. parent = ep93xx_init_soc();
  815. /* Get the GPIO working early, other devices need it */
  816. platform_device_register(&ep93xx_gpio_device);
  817. amba_device_register(&uart1_device, &iomem_resource);
  818. amba_device_register(&uart2_device, &iomem_resource);
  819. amba_device_register(&uart3_device, &iomem_resource);
  820. platform_device_register(&ep93xx_rtc_device);
  821. platform_device_register(&ep93xx_ohci_device);
  822. platform_device_register(&ep93xx_wdt_device);
  823. gpio_led_register_device(-1, &ep93xx_led_data);
  824. return parent;
  825. }
  826. void ep93xx_restart(enum reboot_mode mode, const char *cmd)
  827. {
  828. /*
  829. * Set then clear the SWRST bit to initiate a software reset
  830. */
  831. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
  832. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
  833. while (1)
  834. ;
  835. }
  836. void __init ep93xx_init_late(void)
  837. {
  838. crunch_init();
  839. }