pkeys.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * PowerPC Memory Protection Keys management
  4. *
  5. * Copyright 2017, Ram Pai, IBM Corporation.
  6. */
  7. #include <asm/mman.h>
  8. #include <asm/setup.h>
  9. #include <linux/pkeys.h>
  10. #include <linux/of_device.h>
  11. DEFINE_STATIC_KEY_TRUE(pkey_disabled);
  12. bool pkey_execute_disable_supported;
  13. int pkeys_total; /* Total pkeys as per device tree */
  14. bool pkeys_devtree_defined; /* pkey property exported by device tree */
  15. u32 initial_allocation_mask; /* Bits set for the initially allocated keys */
  16. u32 reserved_allocation_mask; /* Bits set for reserved keys */
  17. u64 pkey_amr_mask; /* Bits in AMR not to be touched */
  18. u64 pkey_iamr_mask; /* Bits in AMR not to be touched */
  19. u64 pkey_uamor_mask; /* Bits in UMOR not to be touched */
  20. int execute_only_key = 2;
  21. #define AMR_BITS_PER_PKEY 2
  22. #define AMR_RD_BIT 0x1UL
  23. #define AMR_WR_BIT 0x2UL
  24. #define IAMR_EX_BIT 0x1UL
  25. #define PKEY_REG_BITS (sizeof(u64)*8)
  26. #define pkeyshift(pkey) (PKEY_REG_BITS - ((pkey+1) * AMR_BITS_PER_PKEY))
  27. static void scan_pkey_feature(void)
  28. {
  29. u32 vals[2];
  30. struct device_node *cpu;
  31. cpu = of_find_node_by_type(NULL, "cpu");
  32. if (!cpu)
  33. return;
  34. if (of_property_read_u32_array(cpu,
  35. "ibm,processor-storage-keys", vals, 2))
  36. return;
  37. /*
  38. * Since any pkey can be used for data or execute, we will just treat
  39. * all keys as equal and track them as one entity.
  40. */
  41. pkeys_total = vals[0];
  42. pkeys_devtree_defined = true;
  43. }
  44. static inline bool pkey_mmu_enabled(void)
  45. {
  46. if (firmware_has_feature(FW_FEATURE_LPAR))
  47. return pkeys_total;
  48. else
  49. return cpu_has_feature(CPU_FTR_PKEY);
  50. }
  51. int pkey_initialize(void)
  52. {
  53. int os_reserved, i;
  54. /*
  55. * We define PKEY_DISABLE_EXECUTE in addition to the arch-neutral
  56. * generic defines for PKEY_DISABLE_ACCESS and PKEY_DISABLE_WRITE.
  57. * Ensure that the bits a distinct.
  58. */
  59. BUILD_BUG_ON(PKEY_DISABLE_EXECUTE &
  60. (PKEY_DISABLE_ACCESS | PKEY_DISABLE_WRITE));
  61. /*
  62. * pkey_to_vmflag_bits() assumes that the pkey bits are contiguous
  63. * in the vmaflag. Make sure that is really the case.
  64. */
  65. BUILD_BUG_ON(__builtin_clzl(ARCH_VM_PKEY_FLAGS >> VM_PKEY_SHIFT) +
  66. __builtin_popcountl(ARCH_VM_PKEY_FLAGS >> VM_PKEY_SHIFT)
  67. != (sizeof(u64) * BITS_PER_BYTE));
  68. /* scan the device tree for pkey feature */
  69. scan_pkey_feature();
  70. /*
  71. * Let's assume 32 pkeys on P8/P9 bare metal, if its not defined by device
  72. * tree. We make this exception since some version of skiboot forgot to
  73. * expose this property on power8/9.
  74. */
  75. if (!pkeys_devtree_defined && !firmware_has_feature(FW_FEATURE_LPAR)) {
  76. unsigned long pvr = mfspr(SPRN_PVR);
  77. if (PVR_VER(pvr) == PVR_POWER8 || PVR_VER(pvr) == PVR_POWER8E ||
  78. PVR_VER(pvr) == PVR_POWER8NVL || PVR_VER(pvr) == PVR_POWER9)
  79. pkeys_total = 32;
  80. }
  81. /*
  82. * Adjust the upper limit, based on the number of bits supported by
  83. * arch-neutral code.
  84. */
  85. pkeys_total = min_t(int, pkeys_total,
  86. ((ARCH_VM_PKEY_FLAGS >> VM_PKEY_SHIFT)+1));
  87. if (!pkey_mmu_enabled() || radix_enabled() || !pkeys_total)
  88. static_branch_enable(&pkey_disabled);
  89. else
  90. static_branch_disable(&pkey_disabled);
  91. if (static_branch_likely(&pkey_disabled))
  92. return 0;
  93. /*
  94. * The device tree cannot be relied to indicate support for
  95. * execute_disable support. Instead we use a PVR check.
  96. */
  97. if (pvr_version_is(PVR_POWER7) || pvr_version_is(PVR_POWER7p))
  98. pkey_execute_disable_supported = false;
  99. else
  100. pkey_execute_disable_supported = true;
  101. #ifdef CONFIG_PPC_4K_PAGES
  102. /*
  103. * The OS can manage only 8 pkeys due to its inability to represent them
  104. * in the Linux 4K PTE.
  105. */
  106. os_reserved = pkeys_total - 8;
  107. #else
  108. os_reserved = 0;
  109. #endif
  110. /* Bits are in LE format. */
  111. reserved_allocation_mask = (0x1 << 1) | (0x1 << execute_only_key);
  112. /* register mask is in BE format */
  113. pkey_amr_mask = ~0x0ul;
  114. pkey_amr_mask &= ~(0x3ul << pkeyshift(0));
  115. pkey_iamr_mask = ~0x0ul;
  116. pkey_iamr_mask &= ~(0x3ul << pkeyshift(0));
  117. pkey_iamr_mask &= ~(0x3ul << pkeyshift(execute_only_key));
  118. pkey_uamor_mask = ~0x0ul;
  119. pkey_uamor_mask &= ~(0x3ul << pkeyshift(0));
  120. pkey_uamor_mask &= ~(0x3ul << pkeyshift(execute_only_key));
  121. /* mark the rest of the keys as reserved and hence unavailable */
  122. for (i = (pkeys_total - os_reserved); i < pkeys_total; i++) {
  123. reserved_allocation_mask |= (0x1 << i);
  124. pkey_uamor_mask &= ~(0x3ul << pkeyshift(i));
  125. }
  126. initial_allocation_mask = reserved_allocation_mask | (0x1 << 0);
  127. if (unlikely((pkeys_total - os_reserved) <= execute_only_key)) {
  128. /*
  129. * Insufficient number of keys to support
  130. * execute only key. Mark it unavailable.
  131. * Any AMR, UAMOR, IAMR bit set for
  132. * this key is irrelevant since this key
  133. * can never be allocated.
  134. */
  135. execute_only_key = -1;
  136. }
  137. return 0;
  138. }
  139. arch_initcall(pkey_initialize);
  140. void pkey_mm_init(struct mm_struct *mm)
  141. {
  142. if (static_branch_likely(&pkey_disabled))
  143. return;
  144. mm_pkey_allocation_map(mm) = initial_allocation_mask;
  145. mm->context.execute_only_pkey = execute_only_key;
  146. }
  147. static inline u64 read_amr(void)
  148. {
  149. return mfspr(SPRN_AMR);
  150. }
  151. static inline void write_amr(u64 value)
  152. {
  153. mtspr(SPRN_AMR, value);
  154. }
  155. static inline u64 read_iamr(void)
  156. {
  157. if (!likely(pkey_execute_disable_supported))
  158. return 0x0UL;
  159. return mfspr(SPRN_IAMR);
  160. }
  161. static inline void write_iamr(u64 value)
  162. {
  163. if (!likely(pkey_execute_disable_supported))
  164. return;
  165. mtspr(SPRN_IAMR, value);
  166. }
  167. static inline u64 read_uamor(void)
  168. {
  169. return mfspr(SPRN_UAMOR);
  170. }
  171. static inline void write_uamor(u64 value)
  172. {
  173. mtspr(SPRN_UAMOR, value);
  174. }
  175. static bool is_pkey_enabled(int pkey)
  176. {
  177. u64 uamor = read_uamor();
  178. u64 pkey_bits = 0x3ul << pkeyshift(pkey);
  179. u64 uamor_pkey_bits = (uamor & pkey_bits);
  180. /*
  181. * Both the bits in UAMOR corresponding to the key should be set or
  182. * reset.
  183. */
  184. WARN_ON(uamor_pkey_bits && (uamor_pkey_bits != pkey_bits));
  185. return !!(uamor_pkey_bits);
  186. }
  187. static inline void init_amr(int pkey, u8 init_bits)
  188. {
  189. u64 new_amr_bits = (((u64)init_bits & 0x3UL) << pkeyshift(pkey));
  190. u64 old_amr = read_amr() & ~((u64)(0x3ul) << pkeyshift(pkey));
  191. write_amr(old_amr | new_amr_bits);
  192. }
  193. static inline void init_iamr(int pkey, u8 init_bits)
  194. {
  195. u64 new_iamr_bits = (((u64)init_bits & 0x1UL) << pkeyshift(pkey));
  196. u64 old_iamr = read_iamr() & ~((u64)(0x1ul) << pkeyshift(pkey));
  197. write_iamr(old_iamr | new_iamr_bits);
  198. }
  199. /*
  200. * Set the access rights in AMR IAMR and UAMOR registers for @pkey to that
  201. * specified in @init_val.
  202. */
  203. int __arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
  204. unsigned long init_val)
  205. {
  206. u64 new_amr_bits = 0x0ul;
  207. u64 new_iamr_bits = 0x0ul;
  208. if (!is_pkey_enabled(pkey))
  209. return -EINVAL;
  210. if (init_val & PKEY_DISABLE_EXECUTE) {
  211. if (!pkey_execute_disable_supported)
  212. return -EINVAL;
  213. new_iamr_bits |= IAMR_EX_BIT;
  214. }
  215. init_iamr(pkey, new_iamr_bits);
  216. /* Set the bits we need in AMR: */
  217. if (init_val & PKEY_DISABLE_ACCESS)
  218. new_amr_bits |= AMR_RD_BIT | AMR_WR_BIT;
  219. else if (init_val & PKEY_DISABLE_WRITE)
  220. new_amr_bits |= AMR_WR_BIT;
  221. init_amr(pkey, new_amr_bits);
  222. return 0;
  223. }
  224. void thread_pkey_regs_save(struct thread_struct *thread)
  225. {
  226. if (static_branch_likely(&pkey_disabled))
  227. return;
  228. /*
  229. * TODO: Skip saving registers if @thread hasn't used any keys yet.
  230. */
  231. thread->amr = read_amr();
  232. thread->iamr = read_iamr();
  233. thread->uamor = read_uamor();
  234. }
  235. void thread_pkey_regs_restore(struct thread_struct *new_thread,
  236. struct thread_struct *old_thread)
  237. {
  238. if (static_branch_likely(&pkey_disabled))
  239. return;
  240. if (old_thread->amr != new_thread->amr)
  241. write_amr(new_thread->amr);
  242. if (old_thread->iamr != new_thread->iamr)
  243. write_iamr(new_thread->iamr);
  244. if (old_thread->uamor != new_thread->uamor)
  245. write_uamor(new_thread->uamor);
  246. }
  247. void thread_pkey_regs_init(struct thread_struct *thread)
  248. {
  249. if (static_branch_likely(&pkey_disabled))
  250. return;
  251. thread->amr = pkey_amr_mask;
  252. thread->iamr = pkey_iamr_mask;
  253. thread->uamor = pkey_uamor_mask;
  254. write_uamor(pkey_uamor_mask);
  255. write_amr(pkey_amr_mask);
  256. write_iamr(pkey_iamr_mask);
  257. }
  258. static inline bool pkey_allows_readwrite(int pkey)
  259. {
  260. int pkey_shift = pkeyshift(pkey);
  261. if (!is_pkey_enabled(pkey))
  262. return true;
  263. return !(read_amr() & ((AMR_RD_BIT|AMR_WR_BIT) << pkey_shift));
  264. }
  265. int __execute_only_pkey(struct mm_struct *mm)
  266. {
  267. return mm->context.execute_only_pkey;
  268. }
  269. static inline bool vma_is_pkey_exec_only(struct vm_area_struct *vma)
  270. {
  271. /* Do this check first since the vm_flags should be hot */
  272. if ((vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC)) != VM_EXEC)
  273. return false;
  274. return (vma_pkey(vma) == vma->vm_mm->context.execute_only_pkey);
  275. }
  276. /*
  277. * This should only be called for *plain* mprotect calls.
  278. */
  279. int __arch_override_mprotect_pkey(struct vm_area_struct *vma, int prot,
  280. int pkey)
  281. {
  282. /*
  283. * If the currently associated pkey is execute-only, but the requested
  284. * protection is not execute-only, move it back to the default pkey.
  285. */
  286. if (vma_is_pkey_exec_only(vma) && (prot != PROT_EXEC))
  287. return 0;
  288. /*
  289. * The requested protection is execute-only. Hence let's use an
  290. * execute-only pkey.
  291. */
  292. if (prot == PROT_EXEC) {
  293. pkey = execute_only_pkey(vma->vm_mm);
  294. if (pkey > 0)
  295. return pkey;
  296. }
  297. /* Nothing to override. */
  298. return vma_pkey(vma);
  299. }
  300. static bool pkey_access_permitted(int pkey, bool write, bool execute)
  301. {
  302. int pkey_shift;
  303. u64 amr;
  304. if (!is_pkey_enabled(pkey))
  305. return true;
  306. pkey_shift = pkeyshift(pkey);
  307. if (execute)
  308. return !(read_iamr() & (IAMR_EX_BIT << pkey_shift));
  309. amr = read_amr();
  310. if (write)
  311. return !(amr & (AMR_WR_BIT << pkey_shift));
  312. return !(amr & (AMR_RD_BIT << pkey_shift));
  313. }
  314. bool arch_pte_access_permitted(u64 pte, bool write, bool execute)
  315. {
  316. if (static_branch_likely(&pkey_disabled))
  317. return true;
  318. return pkey_access_permitted(pte_to_pkey_bits(pte), write, execute);
  319. }
  320. /*
  321. * We only want to enforce protection keys on the current thread because we
  322. * effectively have no access to AMR/IAMR for other threads or any way to tell
  323. * which AMR/IAMR in a threaded process we could use.
  324. *
  325. * So do not enforce things if the VMA is not from the current mm, or if we are
  326. * in a kernel thread.
  327. */
  328. static inline bool vma_is_foreign(struct vm_area_struct *vma)
  329. {
  330. if (!current->mm)
  331. return true;
  332. /* if it is not our ->mm, it has to be foreign */
  333. if (current->mm != vma->vm_mm)
  334. return true;
  335. return false;
  336. }
  337. bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write,
  338. bool execute, bool foreign)
  339. {
  340. if (static_branch_likely(&pkey_disabled))
  341. return true;
  342. /*
  343. * Do not enforce our key-permissions on a foreign vma.
  344. */
  345. if (foreign || vma_is_foreign(vma))
  346. return true;
  347. return pkey_access_permitted(vma_pkey(vma), write, execute);
  348. }
  349. void arch_dup_pkeys(struct mm_struct *oldmm, struct mm_struct *mm)
  350. {
  351. if (static_branch_likely(&pkey_disabled))
  352. return;
  353. /* Duplicate the oldmm pkey state in mm: */
  354. mm_pkey_allocation_map(mm) = mm_pkey_allocation_map(oldmm);
  355. mm->context.execute_only_pkey = oldmm->context.execute_only_pkey;
  356. }