smp.c 13 KB

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  1. /*
  2. * Xtensa SMP support functions.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 2008 - 2013 Tensilica Inc.
  9. *
  10. * Chris Zankel <chris@zankel.net>
  11. * Joe Taylor <joe@tensilica.com>
  12. * Pete Delaney <piet@tensilica.com
  13. */
  14. #include <linux/cpu.h>
  15. #include <linux/cpumask.h>
  16. #include <linux/delay.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/irqdomain.h>
  20. #include <linux/irq.h>
  21. #include <linux/kdebug.h>
  22. #include <linux/module.h>
  23. #include <linux/sched/mm.h>
  24. #include <linux/sched/hotplug.h>
  25. #include <linux/sched/task_stack.h>
  26. #include <linux/reboot.h>
  27. #include <linux/seq_file.h>
  28. #include <linux/smp.h>
  29. #include <linux/thread_info.h>
  30. #include <asm/cacheflush.h>
  31. #include <asm/kdebug.h>
  32. #include <asm/mmu_context.h>
  33. #include <asm/mxregs.h>
  34. #include <asm/platform.h>
  35. #include <asm/tlbflush.h>
  36. #include <asm/traps.h>
  37. #ifdef CONFIG_SMP
  38. # if XCHAL_HAVE_S32C1I == 0
  39. # error "The S32C1I option is required for SMP."
  40. # endif
  41. #endif
  42. static void system_invalidate_dcache_range(unsigned long start,
  43. unsigned long size);
  44. static void system_flush_invalidate_dcache_range(unsigned long start,
  45. unsigned long size);
  46. /* IPI (Inter Process Interrupt) */
  47. #define IPI_IRQ 0
  48. static irqreturn_t ipi_interrupt(int irq, void *dev_id);
  49. static struct irqaction ipi_irqaction = {
  50. .handler = ipi_interrupt,
  51. .flags = IRQF_PERCPU,
  52. .name = "ipi",
  53. };
  54. void ipi_init(void)
  55. {
  56. unsigned irq = irq_create_mapping(NULL, IPI_IRQ);
  57. setup_irq(irq, &ipi_irqaction);
  58. }
  59. static inline unsigned int get_core_count(void)
  60. {
  61. /* Bits 18..21 of SYSCFGID contain the core count minus 1. */
  62. unsigned int syscfgid = get_er(SYSCFGID);
  63. return ((syscfgid >> 18) & 0xf) + 1;
  64. }
  65. static inline int get_core_id(void)
  66. {
  67. /* Bits 0...18 of SYSCFGID contain the core id */
  68. unsigned int core_id = get_er(SYSCFGID);
  69. return core_id & 0x3fff;
  70. }
  71. void __init smp_prepare_cpus(unsigned int max_cpus)
  72. {
  73. unsigned i;
  74. for_each_possible_cpu(i)
  75. set_cpu_present(i, true);
  76. }
  77. void __init smp_init_cpus(void)
  78. {
  79. unsigned i;
  80. unsigned int ncpus = get_core_count();
  81. unsigned int core_id = get_core_id();
  82. pr_info("%s: Core Count = %d\n", __func__, ncpus);
  83. pr_info("%s: Core Id = %d\n", __func__, core_id);
  84. if (ncpus > NR_CPUS) {
  85. ncpus = NR_CPUS;
  86. pr_info("%s: limiting core count by %d\n", __func__, ncpus);
  87. }
  88. for (i = 0; i < ncpus; ++i)
  89. set_cpu_possible(i, true);
  90. }
  91. void __init smp_prepare_boot_cpu(void)
  92. {
  93. unsigned int cpu = smp_processor_id();
  94. BUG_ON(cpu != 0);
  95. cpu_asid_cache(cpu) = ASID_USER_FIRST;
  96. }
  97. void __init smp_cpus_done(unsigned int max_cpus)
  98. {
  99. }
  100. static int boot_secondary_processors = 1; /* Set with xt-gdb via .xt-gdb */
  101. static DECLARE_COMPLETION(cpu_running);
  102. void secondary_start_kernel(void)
  103. {
  104. struct mm_struct *mm = &init_mm;
  105. unsigned int cpu = smp_processor_id();
  106. init_mmu();
  107. #ifdef CONFIG_DEBUG_KERNEL
  108. if (boot_secondary_processors == 0) {
  109. pr_debug("%s: boot_secondary_processors:%d; Hanging cpu:%d\n",
  110. __func__, boot_secondary_processors, cpu);
  111. for (;;)
  112. __asm__ __volatile__ ("waiti " __stringify(LOCKLEVEL));
  113. }
  114. pr_debug("%s: boot_secondary_processors:%d; Booting cpu:%d\n",
  115. __func__, boot_secondary_processors, cpu);
  116. #endif
  117. /* Init EXCSAVE1 */
  118. secondary_trap_init();
  119. /* All kernel threads share the same mm context. */
  120. mmget(mm);
  121. mmgrab(mm);
  122. current->active_mm = mm;
  123. cpumask_set_cpu(cpu, mm_cpumask(mm));
  124. enter_lazy_tlb(mm, current);
  125. preempt_disable();
  126. trace_hardirqs_off();
  127. calibrate_delay();
  128. notify_cpu_starting(cpu);
  129. secondary_init_irq();
  130. local_timer_setup(cpu);
  131. set_cpu_online(cpu, true);
  132. local_irq_enable();
  133. complete(&cpu_running);
  134. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  135. }
  136. static void mx_cpu_start(void *p)
  137. {
  138. unsigned cpu = (unsigned)p;
  139. unsigned long run_stall_mask = get_er(MPSCORE);
  140. set_er(run_stall_mask & ~(1u << cpu), MPSCORE);
  141. pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n",
  142. __func__, cpu, run_stall_mask, get_er(MPSCORE));
  143. }
  144. static void mx_cpu_stop(void *p)
  145. {
  146. unsigned cpu = (unsigned)p;
  147. unsigned long run_stall_mask = get_er(MPSCORE);
  148. set_er(run_stall_mask | (1u << cpu), MPSCORE);
  149. pr_debug("%s: cpu: %d, run_stall_mask: %lx ---> %lx\n",
  150. __func__, cpu, run_stall_mask, get_er(MPSCORE));
  151. }
  152. #ifdef CONFIG_HOTPLUG_CPU
  153. unsigned long cpu_start_id __cacheline_aligned;
  154. #endif
  155. unsigned long cpu_start_ccount;
  156. static int boot_secondary(unsigned int cpu, struct task_struct *ts)
  157. {
  158. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  159. unsigned long ccount;
  160. int i;
  161. #ifdef CONFIG_HOTPLUG_CPU
  162. WRITE_ONCE(cpu_start_id, cpu);
  163. /* Pairs with the third memw in the cpu_restart */
  164. mb();
  165. system_flush_invalidate_dcache_range((unsigned long)&cpu_start_id,
  166. sizeof(cpu_start_id));
  167. #endif
  168. smp_call_function_single(0, mx_cpu_start, (void *)cpu, 1);
  169. for (i = 0; i < 2; ++i) {
  170. do
  171. ccount = get_ccount();
  172. while (!ccount);
  173. WRITE_ONCE(cpu_start_ccount, ccount);
  174. do {
  175. /*
  176. * Pairs with the first two memws in the
  177. * .Lboot_secondary.
  178. */
  179. mb();
  180. ccount = READ_ONCE(cpu_start_ccount);
  181. } while (ccount && time_before(jiffies, timeout));
  182. if (ccount) {
  183. smp_call_function_single(0, mx_cpu_stop,
  184. (void *)cpu, 1);
  185. WRITE_ONCE(cpu_start_ccount, 0);
  186. return -EIO;
  187. }
  188. }
  189. return 0;
  190. }
  191. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  192. {
  193. int ret = 0;
  194. if (cpu_asid_cache(cpu) == 0)
  195. cpu_asid_cache(cpu) = ASID_USER_FIRST;
  196. start_info.stack = (unsigned long)task_pt_regs(idle);
  197. wmb();
  198. pr_debug("%s: Calling wakeup_secondary(cpu:%d, idle:%p, sp: %08lx)\n",
  199. __func__, cpu, idle, start_info.stack);
  200. init_completion(&cpu_running);
  201. ret = boot_secondary(cpu, idle);
  202. if (ret == 0) {
  203. wait_for_completion_timeout(&cpu_running,
  204. msecs_to_jiffies(1000));
  205. if (!cpu_online(cpu))
  206. ret = -EIO;
  207. }
  208. if (ret)
  209. pr_err("CPU %u failed to boot\n", cpu);
  210. return ret;
  211. }
  212. #ifdef CONFIG_HOTPLUG_CPU
  213. /*
  214. * __cpu_disable runs on the processor to be shutdown.
  215. */
  216. int __cpu_disable(void)
  217. {
  218. unsigned int cpu = smp_processor_id();
  219. /*
  220. * Take this CPU offline. Once we clear this, we can't return,
  221. * and we must not schedule until we're ready to give up the cpu.
  222. */
  223. set_cpu_online(cpu, false);
  224. /*
  225. * OK - migrate IRQs away from this CPU
  226. */
  227. migrate_irqs();
  228. /*
  229. * Flush user cache and TLB mappings, and then remove this CPU
  230. * from the vm mask set of all processes.
  231. */
  232. local_flush_cache_all();
  233. local_flush_tlb_all();
  234. invalidate_page_directory();
  235. clear_tasks_mm_cpumask(cpu);
  236. return 0;
  237. }
  238. static void platform_cpu_kill(unsigned int cpu)
  239. {
  240. smp_call_function_single(0, mx_cpu_stop, (void *)cpu, true);
  241. }
  242. /*
  243. * called on the thread which is asking for a CPU to be shutdown -
  244. * waits until shutdown has completed, or it is timed out.
  245. */
  246. void __cpu_die(unsigned int cpu)
  247. {
  248. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  249. while (time_before(jiffies, timeout)) {
  250. system_invalidate_dcache_range((unsigned long)&cpu_start_id,
  251. sizeof(cpu_start_id));
  252. /* Pairs with the second memw in the cpu_restart */
  253. mb();
  254. if (READ_ONCE(cpu_start_id) == -cpu) {
  255. platform_cpu_kill(cpu);
  256. return;
  257. }
  258. }
  259. pr_err("CPU%u: unable to kill\n", cpu);
  260. }
  261. void arch_cpu_idle_dead(void)
  262. {
  263. cpu_die();
  264. }
  265. /*
  266. * Called from the idle thread for the CPU which has been shutdown.
  267. *
  268. * Note that we disable IRQs here, but do not re-enable them
  269. * before returning to the caller. This is also the behaviour
  270. * of the other hotplug-cpu capable cores, so presumably coming
  271. * out of idle fixes this.
  272. */
  273. void __ref cpu_die(void)
  274. {
  275. idle_task_exit();
  276. local_irq_disable();
  277. __asm__ __volatile__(
  278. " movi a2, cpu_restart\n"
  279. " jx a2\n");
  280. }
  281. #endif /* CONFIG_HOTPLUG_CPU */
  282. enum ipi_msg_type {
  283. IPI_RESCHEDULE = 0,
  284. IPI_CALL_FUNC,
  285. IPI_CPU_STOP,
  286. IPI_MAX
  287. };
  288. static const struct {
  289. const char *short_text;
  290. const char *long_text;
  291. } ipi_text[] = {
  292. { .short_text = "RES", .long_text = "Rescheduling interrupts" },
  293. { .short_text = "CAL", .long_text = "Function call interrupts" },
  294. { .short_text = "DIE", .long_text = "CPU shutdown interrupts" },
  295. };
  296. struct ipi_data {
  297. unsigned long ipi_count[IPI_MAX];
  298. };
  299. static DEFINE_PER_CPU(struct ipi_data, ipi_data);
  300. static void send_ipi_message(const struct cpumask *callmask,
  301. enum ipi_msg_type msg_id)
  302. {
  303. int index;
  304. unsigned long mask = 0;
  305. for_each_cpu(index, callmask)
  306. if (index != smp_processor_id())
  307. mask |= 1 << index;
  308. set_er(mask, MIPISET(msg_id));
  309. }
  310. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  311. {
  312. send_ipi_message(mask, IPI_CALL_FUNC);
  313. }
  314. void arch_send_call_function_single_ipi(int cpu)
  315. {
  316. send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
  317. }
  318. void smp_send_reschedule(int cpu)
  319. {
  320. send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
  321. }
  322. void smp_send_stop(void)
  323. {
  324. struct cpumask targets;
  325. cpumask_copy(&targets, cpu_online_mask);
  326. cpumask_clear_cpu(smp_processor_id(), &targets);
  327. send_ipi_message(&targets, IPI_CPU_STOP);
  328. }
  329. static void ipi_cpu_stop(unsigned int cpu)
  330. {
  331. set_cpu_online(cpu, false);
  332. machine_halt();
  333. }
  334. irqreturn_t ipi_interrupt(int irq, void *dev_id)
  335. {
  336. unsigned int cpu = smp_processor_id();
  337. struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
  338. unsigned int msg;
  339. unsigned i;
  340. msg = get_er(MIPICAUSE(cpu));
  341. for (i = 0; i < IPI_MAX; i++)
  342. if (msg & (1 << i)) {
  343. set_er(1 << i, MIPICAUSE(cpu));
  344. ++ipi->ipi_count[i];
  345. }
  346. if (msg & (1 << IPI_RESCHEDULE))
  347. scheduler_ipi();
  348. if (msg & (1 << IPI_CALL_FUNC))
  349. generic_smp_call_function_interrupt();
  350. if (msg & (1 << IPI_CPU_STOP))
  351. ipi_cpu_stop(cpu);
  352. return IRQ_HANDLED;
  353. }
  354. void show_ipi_list(struct seq_file *p, int prec)
  355. {
  356. unsigned int cpu;
  357. unsigned i;
  358. for (i = 0; i < IPI_MAX; ++i) {
  359. seq_printf(p, "%*s:", prec, ipi_text[i].short_text);
  360. for_each_online_cpu(cpu)
  361. seq_printf(p, " %10lu",
  362. per_cpu(ipi_data, cpu).ipi_count[i]);
  363. seq_printf(p, " %s\n", ipi_text[i].long_text);
  364. }
  365. }
  366. int setup_profiling_timer(unsigned int multiplier)
  367. {
  368. pr_debug("setup_profiling_timer %d\n", multiplier);
  369. return 0;
  370. }
  371. /* TLB flush functions */
  372. struct flush_data {
  373. struct vm_area_struct *vma;
  374. unsigned long addr1;
  375. unsigned long addr2;
  376. };
  377. static void ipi_flush_tlb_all(void *arg)
  378. {
  379. local_flush_tlb_all();
  380. }
  381. void flush_tlb_all(void)
  382. {
  383. on_each_cpu(ipi_flush_tlb_all, NULL, 1);
  384. }
  385. static void ipi_flush_tlb_mm(void *arg)
  386. {
  387. local_flush_tlb_mm(arg);
  388. }
  389. void flush_tlb_mm(struct mm_struct *mm)
  390. {
  391. on_each_cpu(ipi_flush_tlb_mm, mm, 1);
  392. }
  393. static void ipi_flush_tlb_page(void *arg)
  394. {
  395. struct flush_data *fd = arg;
  396. local_flush_tlb_page(fd->vma, fd->addr1);
  397. }
  398. void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
  399. {
  400. struct flush_data fd = {
  401. .vma = vma,
  402. .addr1 = addr,
  403. };
  404. on_each_cpu(ipi_flush_tlb_page, &fd, 1);
  405. }
  406. static void ipi_flush_tlb_range(void *arg)
  407. {
  408. struct flush_data *fd = arg;
  409. local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
  410. }
  411. void flush_tlb_range(struct vm_area_struct *vma,
  412. unsigned long start, unsigned long end)
  413. {
  414. struct flush_data fd = {
  415. .vma = vma,
  416. .addr1 = start,
  417. .addr2 = end,
  418. };
  419. on_each_cpu(ipi_flush_tlb_range, &fd, 1);
  420. }
  421. static void ipi_flush_tlb_kernel_range(void *arg)
  422. {
  423. struct flush_data *fd = arg;
  424. local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
  425. }
  426. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  427. {
  428. struct flush_data fd = {
  429. .addr1 = start,
  430. .addr2 = end,
  431. };
  432. on_each_cpu(ipi_flush_tlb_kernel_range, &fd, 1);
  433. }
  434. /* Cache flush functions */
  435. static void ipi_flush_cache_all(void *arg)
  436. {
  437. local_flush_cache_all();
  438. }
  439. void flush_cache_all(void)
  440. {
  441. on_each_cpu(ipi_flush_cache_all, NULL, 1);
  442. }
  443. static void ipi_flush_cache_page(void *arg)
  444. {
  445. struct flush_data *fd = arg;
  446. local_flush_cache_page(fd->vma, fd->addr1, fd->addr2);
  447. }
  448. void flush_cache_page(struct vm_area_struct *vma,
  449. unsigned long address, unsigned long pfn)
  450. {
  451. struct flush_data fd = {
  452. .vma = vma,
  453. .addr1 = address,
  454. .addr2 = pfn,
  455. };
  456. on_each_cpu(ipi_flush_cache_page, &fd, 1);
  457. }
  458. static void ipi_flush_cache_range(void *arg)
  459. {
  460. struct flush_data *fd = arg;
  461. local_flush_cache_range(fd->vma, fd->addr1, fd->addr2);
  462. }
  463. void flush_cache_range(struct vm_area_struct *vma,
  464. unsigned long start, unsigned long end)
  465. {
  466. struct flush_data fd = {
  467. .vma = vma,
  468. .addr1 = start,
  469. .addr2 = end,
  470. };
  471. on_each_cpu(ipi_flush_cache_range, &fd, 1);
  472. }
  473. static void ipi_flush_icache_range(void *arg)
  474. {
  475. struct flush_data *fd = arg;
  476. local_flush_icache_range(fd->addr1, fd->addr2);
  477. }
  478. void flush_icache_range(unsigned long start, unsigned long end)
  479. {
  480. struct flush_data fd = {
  481. .addr1 = start,
  482. .addr2 = end,
  483. };
  484. on_each_cpu(ipi_flush_icache_range, &fd, 1);
  485. }
  486. EXPORT_SYMBOL(flush_icache_range);
  487. /* ------------------------------------------------------------------------- */
  488. static void ipi_invalidate_dcache_range(void *arg)
  489. {
  490. struct flush_data *fd = arg;
  491. __invalidate_dcache_range(fd->addr1, fd->addr2);
  492. }
  493. static void system_invalidate_dcache_range(unsigned long start,
  494. unsigned long size)
  495. {
  496. struct flush_data fd = {
  497. .addr1 = start,
  498. .addr2 = size,
  499. };
  500. on_each_cpu(ipi_invalidate_dcache_range, &fd, 1);
  501. }
  502. static void ipi_flush_invalidate_dcache_range(void *arg)
  503. {
  504. struct flush_data *fd = arg;
  505. __flush_invalidate_dcache_range(fd->addr1, fd->addr2);
  506. }
  507. static void system_flush_invalidate_dcache_range(unsigned long start,
  508. unsigned long size)
  509. {
  510. struct flush_data fd = {
  511. .addr1 = start,
  512. .addr2 = size,
  513. };
  514. on_each_cpu(ipi_flush_invalidate_dcache_range, &fd, 1);
  515. }