8250_of.c 9.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Serial Port driver for Open Firmware platform devices
  4. *
  5. * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
  6. */
  7. #include <linux/console.h>
  8. #include <linux/module.h>
  9. #include <linux/slab.h>
  10. #include <linux/delay.h>
  11. #include <linux/serial_core.h>
  12. #include <linux/serial_reg.h>
  13. #include <linux/of_address.h>
  14. #include <linux/of_irq.h>
  15. #include <linux/of_platform.h>
  16. #include <linux/pm_runtime.h>
  17. #include <linux/clk.h>
  18. #include <linux/reset.h>
  19. #include "8250.h"
  20. struct of_serial_info {
  21. struct clk *clk;
  22. struct reset_control *rst;
  23. int type;
  24. int line;
  25. };
  26. #ifdef CONFIG_ARCH_TEGRA
  27. static void tegra_serial_handle_break(struct uart_port *p)
  28. {
  29. unsigned int status, tmout = 10000;
  30. do {
  31. status = p->serial_in(p, UART_LSR);
  32. if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  33. status = p->serial_in(p, UART_RX);
  34. else
  35. break;
  36. if (--tmout == 0)
  37. break;
  38. udelay(1);
  39. } while (1);
  40. }
  41. #else
  42. static inline void tegra_serial_handle_break(struct uart_port *port)
  43. {
  44. }
  45. #endif
  46. /*
  47. * Fill a struct uart_port for a given device node
  48. */
  49. static int of_platform_serial_setup(struct platform_device *ofdev,
  50. int type, struct uart_port *port,
  51. struct of_serial_info *info)
  52. {
  53. struct resource resource;
  54. struct device_node *np = ofdev->dev.of_node;
  55. u32 clk, spd, prop;
  56. int ret, irq;
  57. memset(port, 0, sizeof *port);
  58. pm_runtime_enable(&ofdev->dev);
  59. pm_runtime_get_sync(&ofdev->dev);
  60. if (of_property_read_u32(np, "clock-frequency", &clk)) {
  61. /* Get clk rate through clk driver if present */
  62. info->clk = devm_clk_get(&ofdev->dev, NULL);
  63. if (IS_ERR(info->clk)) {
  64. dev_warn(&ofdev->dev,
  65. "clk or clock-frequency not defined\n");
  66. ret = PTR_ERR(info->clk);
  67. goto err_pmruntime;
  68. }
  69. ret = clk_prepare_enable(info->clk);
  70. if (ret < 0)
  71. goto err_pmruntime;
  72. clk = clk_get_rate(info->clk);
  73. }
  74. /* If current-speed was set, then try not to change it. */
  75. if (of_property_read_u32(np, "current-speed", &spd) == 0)
  76. port->custom_divisor = clk / (16 * spd);
  77. ret = of_address_to_resource(np, 0, &resource);
  78. if (ret) {
  79. dev_warn(&ofdev->dev, "invalid address\n");
  80. goto err_unprepare;
  81. }
  82. port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
  83. UPF_FIXED_TYPE;
  84. spin_lock_init(&port->lock);
  85. if (resource_type(&resource) == IORESOURCE_IO) {
  86. port->iotype = UPIO_PORT;
  87. port->iobase = resource.start;
  88. } else {
  89. port->mapbase = resource.start;
  90. port->mapsize = resource_size(&resource);
  91. /* Check for shifted address mapping */
  92. if (of_property_read_u32(np, "reg-offset", &prop) == 0)
  93. port->mapbase += prop;
  94. port->iotype = UPIO_MEM;
  95. if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
  96. switch (prop) {
  97. case 1:
  98. port->iotype = UPIO_MEM;
  99. break;
  100. case 2:
  101. port->iotype = UPIO_MEM16;
  102. break;
  103. case 4:
  104. port->iotype = of_device_is_big_endian(np) ?
  105. UPIO_MEM32BE : UPIO_MEM32;
  106. break;
  107. default:
  108. dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
  109. prop);
  110. ret = -EINVAL;
  111. goto err_unprepare;
  112. }
  113. }
  114. port->flags |= UPF_IOREMAP;
  115. }
  116. /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */
  117. if (of_device_is_compatible(np, "mrvl,mmp-uart"))
  118. port->regshift = 2;
  119. /* Check for registers offset within the devices address range */
  120. if (of_property_read_u32(np, "reg-shift", &prop) == 0)
  121. port->regshift = prop;
  122. /* Check for fifo size */
  123. if (of_property_read_u32(np, "fifo-size", &prop) == 0)
  124. port->fifosize = prop;
  125. /* Check for a fixed line number */
  126. ret = of_alias_get_id(np, "serial");
  127. if (ret >= 0)
  128. port->line = ret;
  129. irq = of_irq_get(np, 0);
  130. if (irq < 0) {
  131. if (irq == -EPROBE_DEFER) {
  132. ret = -EPROBE_DEFER;
  133. goto err_unprepare;
  134. }
  135. /* IRQ support not mandatory */
  136. irq = 0;
  137. }
  138. port->irq = irq;
  139. info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
  140. if (IS_ERR(info->rst)) {
  141. ret = PTR_ERR(info->rst);
  142. goto err_unprepare;
  143. }
  144. ret = reset_control_deassert(info->rst);
  145. if (ret)
  146. goto err_unprepare;
  147. port->type = type;
  148. port->uartclk = clk;
  149. if (of_property_read_bool(np, "no-loopback-test"))
  150. port->flags |= UPF_SKIP_TEST;
  151. port->dev = &ofdev->dev;
  152. switch (type) {
  153. case PORT_TEGRA:
  154. port->handle_break = tegra_serial_handle_break;
  155. break;
  156. case PORT_RT2880:
  157. port->iotype = UPIO_AU;
  158. break;
  159. }
  160. if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
  161. (of_device_is_compatible(np, "fsl,ns16550") ||
  162. of_device_is_compatible(np, "fsl,16550-FIFO64")))
  163. port->handle_irq = fsl8250_handle_irq;
  164. return 0;
  165. err_unprepare:
  166. clk_disable_unprepare(info->clk);
  167. err_pmruntime:
  168. pm_runtime_put_sync(&ofdev->dev);
  169. pm_runtime_disable(&ofdev->dev);
  170. return ret;
  171. }
  172. /*
  173. * Try to register a serial port
  174. */
  175. static const struct of_device_id of_platform_serial_table[];
  176. static int of_platform_serial_probe(struct platform_device *ofdev)
  177. {
  178. const struct of_device_id *match;
  179. struct of_serial_info *info;
  180. struct uart_8250_port port8250;
  181. u32 tx_threshold;
  182. int port_type;
  183. int ret;
  184. match = of_match_device(of_platform_serial_table, &ofdev->dev);
  185. if (!match)
  186. return -EINVAL;
  187. if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas"))
  188. return -EBUSY;
  189. info = kzalloc(sizeof(*info), GFP_KERNEL);
  190. if (info == NULL)
  191. return -ENOMEM;
  192. port_type = (unsigned long)match->data;
  193. memset(&port8250, 0, sizeof(port8250));
  194. ret = of_platform_serial_setup(ofdev, port_type, &port8250.port, info);
  195. if (ret)
  196. goto err_free;
  197. if (port8250.port.fifosize)
  198. port8250.capabilities = UART_CAP_FIFO;
  199. /* Check for TX FIFO threshold & set tx_loadsz */
  200. if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
  201. &tx_threshold) == 0) &&
  202. (tx_threshold < port8250.port.fifosize))
  203. port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
  204. if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
  205. port8250.capabilities |= UART_CAP_AFE;
  206. if (of_property_read_u32(ofdev->dev.of_node,
  207. "overrun-throttle-ms",
  208. &port8250.overrun_backoff_time_ms) != 0)
  209. port8250.overrun_backoff_time_ms = 0;
  210. ret = serial8250_register_8250_port(&port8250);
  211. if (ret < 0)
  212. goto err_dispose;
  213. info->type = port_type;
  214. info->line = ret;
  215. platform_set_drvdata(ofdev, info);
  216. return 0;
  217. err_dispose:
  218. irq_dispose_mapping(port8250.port.irq);
  219. pm_runtime_put_sync(&ofdev->dev);
  220. pm_runtime_disable(&ofdev->dev);
  221. clk_disable_unprepare(info->clk);
  222. err_free:
  223. kfree(info);
  224. return ret;
  225. }
  226. /*
  227. * Release a line
  228. */
  229. static int of_platform_serial_remove(struct platform_device *ofdev)
  230. {
  231. struct of_serial_info *info = platform_get_drvdata(ofdev);
  232. serial8250_unregister_port(info->line);
  233. reset_control_assert(info->rst);
  234. pm_runtime_put_sync(&ofdev->dev);
  235. pm_runtime_disable(&ofdev->dev);
  236. clk_disable_unprepare(info->clk);
  237. kfree(info);
  238. return 0;
  239. }
  240. #ifdef CONFIG_PM_SLEEP
  241. static int of_serial_suspend(struct device *dev)
  242. {
  243. struct of_serial_info *info = dev_get_drvdata(dev);
  244. struct uart_8250_port *port8250 = serial8250_get_port(info->line);
  245. struct uart_port *port = &port8250->port;
  246. serial8250_suspend_port(info->line);
  247. if (!uart_console(port) || console_suspend_enabled) {
  248. pm_runtime_put_sync(dev);
  249. clk_disable_unprepare(info->clk);
  250. }
  251. return 0;
  252. }
  253. static int of_serial_resume(struct device *dev)
  254. {
  255. struct of_serial_info *info = dev_get_drvdata(dev);
  256. struct uart_8250_port *port8250 = serial8250_get_port(info->line);
  257. struct uart_port *port = &port8250->port;
  258. if (!uart_console(port) || console_suspend_enabled) {
  259. pm_runtime_get_sync(dev);
  260. clk_prepare_enable(info->clk);
  261. }
  262. serial8250_resume_port(info->line);
  263. return 0;
  264. }
  265. #endif
  266. static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
  267. /*
  268. * A few common types, add more as needed.
  269. */
  270. static const struct of_device_id of_platform_serial_table[] = {
  271. { .compatible = "ns8250", .data = (void *)PORT_8250, },
  272. { .compatible = "ns16450", .data = (void *)PORT_16450, },
  273. { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
  274. { .compatible = "ns16550", .data = (void *)PORT_16550, },
  275. { .compatible = "ns16750", .data = (void *)PORT_16750, },
  276. { .compatible = "ns16850", .data = (void *)PORT_16850, },
  277. { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
  278. { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
  279. { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
  280. { .compatible = "altr,16550-FIFO32",
  281. .data = (void *)PORT_ALTR_16550_F32, },
  282. { .compatible = "altr,16550-FIFO64",
  283. .data = (void *)PORT_ALTR_16550_F64, },
  284. { .compatible = "altr,16550-FIFO128",
  285. .data = (void *)PORT_ALTR_16550_F128, },
  286. { .compatible = "mediatek,mtk-btif",
  287. .data = (void *)PORT_MTK_BTIF, },
  288. { .compatible = "mrvl,mmp-uart",
  289. .data = (void *)PORT_XSCALE, },
  290. { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
  291. { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, },
  292. { /* end of list */ },
  293. };
  294. MODULE_DEVICE_TABLE(of, of_platform_serial_table);
  295. static struct platform_driver of_platform_serial_driver = {
  296. .driver = {
  297. .name = "of_serial",
  298. .of_match_table = of_platform_serial_table,
  299. .pm = &of_serial_pm_ops,
  300. },
  301. .probe = of_platform_serial_probe,
  302. .remove = of_platform_serial_remove,
  303. };
  304. module_platform_driver(of_platform_serial_driver);
  305. MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
  306. MODULE_LICENSE("GPL");
  307. MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");