interrupts.c 4.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2007 Michal Simek
  4. * (C) Copyright 2004 Atmark Techno, Inc.
  5. *
  6. * Michal SIMEK <monstr@monstr.eu>
  7. * Yasushi SHOJI <yashi@atmark-techno.com>
  8. */
  9. #include <common.h>
  10. #include <command.h>
  11. #include <fdtdec.h>
  12. #include <malloc.h>
  13. #include <asm/microblaze_intc.h>
  14. #include <asm/asm.h>
  15. DECLARE_GLOBAL_DATA_PTR;
  16. void enable_interrupts(void)
  17. {
  18. debug("Enable interrupts for the whole CPU\n");
  19. MSRSET(0x2);
  20. }
  21. int disable_interrupts(void)
  22. {
  23. unsigned int msr;
  24. MFS(msr, rmsr);
  25. MSRCLR(0x2);
  26. return (msr & 0x2) != 0;
  27. }
  28. static struct irq_action *vecs;
  29. static u32 irq_no;
  30. /* mapping structure to interrupt controller */
  31. microblaze_intc_t *intc;
  32. /* default handler */
  33. static void def_hdlr(void)
  34. {
  35. puts("def_hdlr\n");
  36. }
  37. static void enable_one_interrupt(int irq)
  38. {
  39. int mask;
  40. int offset = 1;
  41. offset <<= irq;
  42. mask = intc->ier;
  43. intc->ier = (mask | offset);
  44. debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask,
  45. intc->ier);
  46. debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
  47. intc->iar, intc->mer);
  48. }
  49. static void disable_one_interrupt(int irq)
  50. {
  51. int mask;
  52. int offset = 1;
  53. offset <<= irq;
  54. mask = intc->ier;
  55. intc->ier = (mask & ~offset);
  56. debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask,
  57. intc->ier);
  58. debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
  59. intc->iar, intc->mer);
  60. }
  61. int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg)
  62. {
  63. struct irq_action *act;
  64. /* irq out of range */
  65. if ((irq < 0) || (irq > irq_no)) {
  66. puts("IRQ out of range\n");
  67. return -1;
  68. }
  69. act = &vecs[irq];
  70. if (hdlr) { /* enable */
  71. act->handler = hdlr;
  72. act->arg = arg;
  73. act->count = 0;
  74. enable_one_interrupt(irq);
  75. return 0;
  76. }
  77. /* Disable */
  78. act->handler = (interrupt_handler_t *)def_hdlr;
  79. act->arg = (void *)irq;
  80. disable_one_interrupt(irq);
  81. return 1;
  82. }
  83. /* initialization interrupt controller - hardware */
  84. static void intc_init(void)
  85. {
  86. intc->mer = 0;
  87. intc->ier = 0;
  88. intc->iar = 0xFFFFFFFF;
  89. /* XIntc_Start - hw_interrupt enable and all interrupt enable */
  90. intc->mer = 0x3;
  91. debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
  92. intc->iar, intc->mer);
  93. }
  94. int interrupt_init(void)
  95. {
  96. int i;
  97. const void *blob = gd->fdt_blob;
  98. int node = 0;
  99. debug("INTC: Initialization\n");
  100. node = fdt_node_offset_by_compatible(blob, node,
  101. "xlnx,xps-intc-1.00.a");
  102. if (node != -1) {
  103. fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
  104. if (base == FDT_ADDR_T_NONE)
  105. return -1;
  106. debug("INTC: Base addr %lx\n", base);
  107. intc = (microblaze_intc_t *)base;
  108. irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0);
  109. debug("INTC: IRQ NO %x\n", irq_no);
  110. } else {
  111. return node;
  112. }
  113. if (irq_no) {
  114. vecs = calloc(1, sizeof(struct irq_action) * irq_no);
  115. if (vecs == NULL) {
  116. puts("Interrupt vector allocation failed\n");
  117. return -1;
  118. }
  119. /* initialize irq list */
  120. for (i = 0; i < irq_no; i++) {
  121. vecs[i].handler = (interrupt_handler_t *)def_hdlr;
  122. vecs[i].arg = (void *)i;
  123. vecs[i].count = 0;
  124. }
  125. /* initialize intc controller */
  126. intc_init();
  127. enable_interrupts();
  128. } else {
  129. puts("Undefined interrupt controller\n");
  130. }
  131. return 0;
  132. }
  133. void interrupt_handler(void)
  134. {
  135. int irqs = intc->ivr; /* find active interrupt */
  136. int mask = 1;
  137. int value;
  138. struct irq_action *act = vecs + irqs;
  139. debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
  140. intc->iar, intc->mer);
  141. #ifdef DEBUG
  142. R14(value);
  143. #endif
  144. debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
  145. debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
  146. (u32)act->handler, act->count, (u32)act->arg);
  147. act->handler(act->arg);
  148. act->count++;
  149. intc->iar = mask << irqs;
  150. debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
  151. intc->ier, intc->iar, intc->mer);
  152. #ifdef DEBUG
  153. R14(value);
  154. #endif
  155. debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
  156. }
  157. #if defined(CONFIG_CMD_IRQ)
  158. int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, const char *argv[])
  159. {
  160. int i;
  161. struct irq_action *act = vecs;
  162. if (irq_no) {
  163. puts("\nInterrupt-Information:\n\n"
  164. "Nr Routine Arg Count\n"
  165. "-----------------------------\n");
  166. for (i = 0; i < irq_no; i++) {
  167. if (act->handler != (interrupt_handler_t *)def_hdlr) {
  168. printf("%02d %08x %08x %d\n", i,
  169. (int)act->handler, (int)act->arg,
  170. act->count);
  171. }
  172. act++;
  173. }
  174. puts("\n");
  175. } else {
  176. puts("Undefined interrupt controller\n");
  177. }
  178. return 0;
  179. }
  180. #endif