da8xx.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * da8xx.c - TI's DA8xx platform specific usb wrapper functions.
  4. *
  5. * Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
  6. *
  7. * Based on drivers/usb/musb/davinci.c
  8. *
  9. * Copyright (C) 2009 Texas Instruments Incorporated
  10. */
  11. #include <common.h>
  12. #include "musb_core.h"
  13. #include <asm/arch/da8xx-usb.h>
  14. /* MUSB platform configuration */
  15. struct musb_config musb_cfg = {
  16. .regs = (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE,
  17. .timeout = DA8XX_USB_OTG_TIMEOUT,
  18. .musb_speed = 0,
  19. };
  20. /*
  21. * This function enables VBUS by driving the GPIO Bank4 Pin 15 high.
  22. */
  23. static void enable_vbus(void)
  24. {
  25. u32 value;
  26. /* configure GPIO bank4 pin 15 in output direction */
  27. value = readl(&davinci_gpio_bank45->dir);
  28. writel((value & (~DA8XX_USB_VBUS_GPIO)), &davinci_gpio_bank45->dir);
  29. /* set GPIO bank4 pin 15 high to drive VBUS */
  30. value = readl(&davinci_gpio_bank45->set_data);
  31. writel((value | DA8XX_USB_VBUS_GPIO), &davinci_gpio_bank45->set_data);
  32. }
  33. /*
  34. * Enable the usb0 phy. This initialization procedure is explained in
  35. * the DA8xx USB user guide document.
  36. */
  37. static u8 phy_on(void)
  38. {
  39. u32 timeout;
  40. u32 cfgchip2;
  41. cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
  42. cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
  43. CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ);
  44. cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON |
  45. CFGCHIP2_REFFREQ_24MHZ;
  46. writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
  47. /* wait until the usb phy pll locks */
  48. timeout = musb_cfg.timeout;
  49. while (timeout--)
  50. if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
  51. return 1;
  52. /* USB phy was not turned on */
  53. return 0;
  54. }
  55. /*
  56. * Disable the usb phy
  57. */
  58. static void phy_off(void)
  59. {
  60. u32 cfgchip2;
  61. /*
  62. * Power down the on-chip PHY.
  63. */
  64. cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
  65. cfgchip2 &= ~CFGCHIP2_PHY_PLLON;
  66. cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN;
  67. writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
  68. }
  69. /*
  70. * This function performs DA8xx platform specific initialization for usb0.
  71. */
  72. int musb_platform_init(void)
  73. {
  74. u32 revision;
  75. /* enable psc for usb2.0 */
  76. lpsc_on(33);
  77. /* enable usb vbus */
  78. enable_vbus();
  79. /* reset the controller */
  80. writel(0x1, &da8xx_usb_regs->control);
  81. udelay(5000);
  82. /* start the on-chip usb phy and its pll */
  83. if (phy_on() == 0)
  84. return -1;
  85. /* Returns zero if e.g. not clocked */
  86. revision = readl(&da8xx_usb_regs->revision);
  87. if (revision == 0)
  88. return -1;
  89. /* Disable all interrupts */
  90. writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
  91. DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_set);
  92. return 0;
  93. }
  94. /*
  95. * This function performs DA8xx platform specific deinitialization for usb0.
  96. */
  97. void musb_platform_deinit(void)
  98. {
  99. /* Turn of the phy */
  100. phy_off();
  101. /* flush any interrupts */
  102. writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
  103. DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_clr);
  104. writel(0, &da8xx_usb_regs->eoi);
  105. }