huangliang
87498f5edd
first commit(v1.0)
|
il y a 3 ans | |
|---|---|---|
| .. | ||
| README.altera_spi | il y a 3 ans | |
| README.dual-flash | il y a 3 ans | |
| README.ftssp010_spi_test | il y a 3 ans | |
| README.sandbox-spi | il y a 3 ans | |
| README.sh_qspi_test | il y a 3 ans | |
| README.ti_qspi_am43x_test | il y a 3 ans | |
| README.ti_qspi_dra_test | il y a 3 ans | |
| README.ti_qspi_flash | il y a 3 ans | |
| status.txt | il y a 3 ans | |
README.altera_spi
SoCFPGA EPCS/EPCQx1 mini howto:
- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
- The controller base address is the "Base" in QSys + 0x400
- Set MSEL[4:0]=10010 (AS Standard)
- Load the bitstream into FPGA, enable bridges
- Only then will the driver work
- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
- The controller base address is the "Base" in QSys + 0x400
- Set MSEL[4:0]=10010 (AS Standard)
- Load the bitstream into FPGA, enable bridges
- Only then will the driver work