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SPI
huangliang 87498f5edd first commit(v1.0) %!s(int64=3) %!d(string=hai) anos
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README.altera_spi 87498f5edd first commit(v1.0) %!s(int64=3) %!d(string=hai) anos
README.dual-flash 87498f5edd first commit(v1.0) %!s(int64=3) %!d(string=hai) anos
README.ftssp010_spi_test 87498f5edd first commit(v1.0) %!s(int64=3) %!d(string=hai) anos
README.sandbox-spi 87498f5edd first commit(v1.0) %!s(int64=3) %!d(string=hai) anos
README.sh_qspi_test 87498f5edd first commit(v1.0) %!s(int64=3) %!d(string=hai) anos
README.ti_qspi_am43x_test 87498f5edd first commit(v1.0) %!s(int64=3) %!d(string=hai) anos
README.ti_qspi_dra_test 87498f5edd first commit(v1.0) %!s(int64=3) %!d(string=hai) anos
README.ti_qspi_flash 87498f5edd first commit(v1.0) %!s(int64=3) %!d(string=hai) anos
status.txt 87498f5edd first commit(v1.0) %!s(int64=3) %!d(string=hai) anos

README.altera_spi

SoCFPGA EPCS/EPCQx1 mini howto:
- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
- The controller base address is the "Base" in QSys + 0x400
- Set MSEL[4:0]=10010 (AS Standard)
- Load the bitstream into FPGA, enable bridges
- Only then will the driver work