msm-crash-dump.rst 2.4 KB

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  1. =====================
  2. MSM Crash Dump Format
  3. =====================
  4. Following a GPU hang the MSM driver outputs debugging information via
  5. /sys/kernel/dri/X/show or via devcoredump (/sys/class/devcoredump/dcdX/data).
  6. This document describes how the output is formatted.
  7. Each entry is in the form key: value. Sections headers will not have a value
  8. and all the contents of a section will be indented two spaces from the header.
  9. Each section might have multiple array entries the start of which is designated
  10. by a (-).
  11. Mappings
  12. --------
  13. kernel
  14. The kernel version that generated the dump (UTS_RELEASE).
  15. module
  16. The module that generated the crashdump.
  17. time
  18. The kernel time at crash formated as seconds.microseconds.
  19. comm
  20. Comm string for the binary that generated the fault.
  21. cmdline
  22. Command line for the binary that generated the fault.
  23. revision
  24. ID of the GPU that generated the crash formatted as
  25. core.major.minor.patchlevel separated by dots.
  26. rbbm-status
  27. The current value of RBBM_STATUS which shows what top level GPU
  28. components are in use at the time of crash.
  29. ringbuffer
  30. Section containing the contents of each ringbuffer. Each ringbuffer is
  31. identified with an id number.
  32. id
  33. Ringbuffer ID (0 based index). Each ringbuffer in the section
  34. will have its own unique id.
  35. iova
  36. GPU address of the ringbuffer.
  37. last-fence
  38. The last fence that was issued on the ringbuffer
  39. retired-fence
  40. The last fence retired on the ringbuffer.
  41. rptr
  42. The current read pointer (rptr) for the ringbuffer.
  43. wptr
  44. The current write pointer (wptr) for the ringbuffer.
  45. size
  46. Maximum size of the ringbuffer programmed in the hardware.
  47. data
  48. The contents of the ring encoded as ascii85. Only the used
  49. portions of the ring will be printed.
  50. bo
  51. List of buffers from the hanging submission if available.
  52. Each buffer object will have a uinque iova.
  53. iova
  54. GPU address of the buffer object.
  55. size
  56. Allocated size of the buffer object.
  57. data
  58. The contents of the buffer object encoded with ascii85. Only
  59. Trailing zeros at the end of the buffer will be skipped.
  60. registers
  61. Set of registers values. Each entry is on its own line enclosed
  62. by brackets { }.
  63. offset
  64. Byte offset of the register from the start of the
  65. GPU memory region.
  66. value
  67. Hexadecimal value of the register.
  68. registers-hlsq
  69. (5xx only) Register values from the HLSQ aperture.
  70. Same format as the register section.