fifo.c 34 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472
  1. // SPDX-License-Identifier: GPL-1.0+
  2. /*
  3. * Renesas USB driver
  4. *
  5. * Copyright (C) 2011 Renesas Solutions Corp.
  6. * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/io.h>
  10. #include <linux/scatterlist.h>
  11. #include "common.h"
  12. #include "pipe.h"
  13. #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
  14. #define usbhsf_is_cfifo(p, f) (usbhsf_get_cfifo(p) == f)
  15. #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
  16. /*
  17. * packet initialize
  18. */
  19. void usbhs_pkt_init(struct usbhs_pkt *pkt)
  20. {
  21. INIT_LIST_HEAD(&pkt->node);
  22. }
  23. /*
  24. * packet control function
  25. */
  26. static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
  27. {
  28. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  29. struct device *dev = usbhs_priv_to_dev(priv);
  30. dev_err(dev, "null handler\n");
  31. return -EINVAL;
  32. }
  33. static const struct usbhs_pkt_handle usbhsf_null_handler = {
  34. .prepare = usbhsf_null_handle,
  35. .try_run = usbhsf_null_handle,
  36. };
  37. void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
  38. void (*done)(struct usbhs_priv *priv,
  39. struct usbhs_pkt *pkt),
  40. void *buf, int len, int zero, int sequence)
  41. {
  42. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  43. struct device *dev = usbhs_priv_to_dev(priv);
  44. unsigned long flags;
  45. if (!done) {
  46. dev_err(dev, "no done function\n");
  47. return;
  48. }
  49. /******************** spin lock ********************/
  50. usbhs_lock(priv, flags);
  51. if (!pipe->handler) {
  52. dev_err(dev, "no handler function\n");
  53. pipe->handler = &usbhsf_null_handler;
  54. }
  55. list_move_tail(&pkt->node, &pipe->list);
  56. /*
  57. * each pkt must hold own handler.
  58. * because handler might be changed by its situation.
  59. * dma handler -> pio handler.
  60. */
  61. pkt->pipe = pipe;
  62. pkt->buf = buf;
  63. pkt->handler = pipe->handler;
  64. pkt->length = len;
  65. pkt->zero = zero;
  66. pkt->actual = 0;
  67. pkt->done = done;
  68. pkt->sequence = sequence;
  69. usbhs_unlock(priv, flags);
  70. /******************** spin unlock ******************/
  71. }
  72. static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
  73. {
  74. list_del_init(&pkt->node);
  75. }
  76. struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
  77. {
  78. return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
  79. }
  80. static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
  81. struct usbhs_fifo *fifo);
  82. static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
  83. struct usbhs_pkt *pkt);
  84. #define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
  85. #define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
  86. static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map);
  87. struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
  88. {
  89. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  90. struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
  91. unsigned long flags;
  92. /******************** spin lock ********************/
  93. usbhs_lock(priv, flags);
  94. usbhs_pipe_disable(pipe);
  95. if (!pkt)
  96. pkt = __usbhsf_pkt_get(pipe);
  97. if (pkt) {
  98. struct dma_chan *chan = NULL;
  99. if (fifo)
  100. chan = usbhsf_dma_chan_get(fifo, pkt);
  101. if (chan) {
  102. dmaengine_terminate_all(chan);
  103. usbhsf_dma_unmap(pkt);
  104. }
  105. usbhs_pipe_clear_without_sequence(pipe, 0, 0);
  106. usbhs_pipe_running(pipe, 0);
  107. __usbhsf_pkt_del(pkt);
  108. }
  109. if (fifo)
  110. usbhsf_fifo_unselect(pipe, fifo);
  111. usbhs_unlock(priv, flags);
  112. /******************** spin unlock ******************/
  113. return pkt;
  114. }
  115. enum {
  116. USBHSF_PKT_PREPARE,
  117. USBHSF_PKT_TRY_RUN,
  118. USBHSF_PKT_DMA_DONE,
  119. };
  120. static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
  121. {
  122. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  123. struct usbhs_pkt *pkt;
  124. struct device *dev = usbhs_priv_to_dev(priv);
  125. int (*func)(struct usbhs_pkt *pkt, int *is_done);
  126. unsigned long flags;
  127. int ret = 0;
  128. int is_done = 0;
  129. /******************** spin lock ********************/
  130. usbhs_lock(priv, flags);
  131. pkt = __usbhsf_pkt_get(pipe);
  132. if (!pkt)
  133. goto __usbhs_pkt_handler_end;
  134. switch (type) {
  135. case USBHSF_PKT_PREPARE:
  136. func = pkt->handler->prepare;
  137. break;
  138. case USBHSF_PKT_TRY_RUN:
  139. func = pkt->handler->try_run;
  140. break;
  141. case USBHSF_PKT_DMA_DONE:
  142. func = pkt->handler->dma_done;
  143. break;
  144. default:
  145. dev_err(dev, "unknown pkt handler\n");
  146. goto __usbhs_pkt_handler_end;
  147. }
  148. if (likely(func))
  149. ret = func(pkt, &is_done);
  150. if (is_done)
  151. __usbhsf_pkt_del(pkt);
  152. __usbhs_pkt_handler_end:
  153. usbhs_unlock(priv, flags);
  154. /******************** spin unlock ******************/
  155. if (is_done) {
  156. pkt->done(priv, pkt);
  157. usbhs_pkt_start(pipe);
  158. }
  159. return ret;
  160. }
  161. void usbhs_pkt_start(struct usbhs_pipe *pipe)
  162. {
  163. usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
  164. }
  165. /*
  166. * irq enable/disable function
  167. */
  168. #define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
  169. #define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
  170. #define usbhsf_irq_callback_ctrl(pipe, status, enable) \
  171. ({ \
  172. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
  173. struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
  174. u16 status = (1 << usbhs_pipe_number(pipe)); \
  175. if (!mod) \
  176. return; \
  177. if (enable) \
  178. mod->status |= status; \
  179. else \
  180. mod->status &= ~status; \
  181. usbhs_irq_callback_update(priv, mod); \
  182. })
  183. static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
  184. {
  185. /*
  186. * And DCP pipe can NOT use "ready interrupt" for "send"
  187. * it should use "empty" interrupt.
  188. * see
  189. * "Operation" - "Interrupt Function" - "BRDY Interrupt"
  190. *
  191. * on the other hand, normal pipe can use "ready interrupt" for "send"
  192. * even though it is single/double buffer
  193. */
  194. if (usbhs_pipe_is_dcp(pipe))
  195. usbhsf_irq_empty_ctrl(pipe, enable);
  196. else
  197. usbhsf_irq_ready_ctrl(pipe, enable);
  198. }
  199. static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
  200. {
  201. usbhsf_irq_ready_ctrl(pipe, enable);
  202. }
  203. /*
  204. * FIFO ctrl
  205. */
  206. static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
  207. struct usbhs_fifo *fifo)
  208. {
  209. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  210. usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
  211. }
  212. static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
  213. struct usbhs_fifo *fifo)
  214. {
  215. /* The FIFO port is accessible */
  216. if (usbhs_read(priv, fifo->ctr) & FRDY)
  217. return 0;
  218. return -EBUSY;
  219. }
  220. static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
  221. struct usbhs_fifo *fifo)
  222. {
  223. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  224. int ret = 0;
  225. if (!usbhs_pipe_is_dcp(pipe)) {
  226. /*
  227. * This driver checks the pipe condition first to avoid -EBUSY
  228. * from usbhsf_fifo_barrier() if the pipe is RX direction and
  229. * empty.
  230. */
  231. if (usbhs_pipe_is_dir_in(pipe))
  232. ret = usbhs_pipe_is_accessible(pipe);
  233. if (!ret)
  234. ret = usbhsf_fifo_barrier(priv, fifo);
  235. }
  236. /*
  237. * if non-DCP pipe, this driver should set BCLR when
  238. * usbhsf_fifo_barrier() returns 0.
  239. */
  240. if (!ret)
  241. usbhs_write(priv, fifo->ctr, BCLR);
  242. }
  243. static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
  244. struct usbhs_fifo *fifo)
  245. {
  246. return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
  247. }
  248. static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
  249. struct usbhs_fifo *fifo)
  250. {
  251. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  252. usbhs_pipe_select_fifo(pipe, NULL);
  253. usbhs_write(priv, fifo->sel, 0);
  254. }
  255. static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
  256. struct usbhs_fifo *fifo,
  257. int write)
  258. {
  259. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  260. struct device *dev = usbhs_priv_to_dev(priv);
  261. int timeout = 1024;
  262. u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
  263. u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
  264. if (usbhs_pipe_is_busy(pipe) ||
  265. usbhsf_fifo_is_busy(fifo))
  266. return -EBUSY;
  267. if (usbhs_pipe_is_dcp(pipe)) {
  268. base |= (1 == write) << 5; /* ISEL */
  269. if (usbhs_mod_is_host(priv))
  270. usbhs_dcp_dir_for_host(pipe, write);
  271. }
  272. /* "base" will be used below */
  273. if (usbhs_get_dparam(priv, has_sudmac) && !usbhsf_is_cfifo(priv, fifo))
  274. usbhs_write(priv, fifo->sel, base);
  275. else
  276. usbhs_write(priv, fifo->sel, base | MBW_32);
  277. /* check ISEL and CURPIPE value */
  278. while (timeout--) {
  279. if (base == (mask & usbhs_read(priv, fifo->sel))) {
  280. usbhs_pipe_select_fifo(pipe, fifo);
  281. return 0;
  282. }
  283. udelay(10);
  284. }
  285. dev_err(dev, "fifo select error\n");
  286. return -EIO;
  287. }
  288. /*
  289. * DCP status stage
  290. */
  291. static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
  292. {
  293. struct usbhs_pipe *pipe = pkt->pipe;
  294. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  295. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  296. struct device *dev = usbhs_priv_to_dev(priv);
  297. int ret;
  298. usbhs_pipe_disable(pipe);
  299. ret = usbhsf_fifo_select(pipe, fifo, 1);
  300. if (ret < 0) {
  301. dev_err(dev, "%s() faile\n", __func__);
  302. return ret;
  303. }
  304. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  305. usbhsf_fifo_clear(pipe, fifo);
  306. usbhsf_send_terminator(pipe, fifo);
  307. usbhsf_fifo_unselect(pipe, fifo);
  308. usbhsf_tx_irq_ctrl(pipe, 1);
  309. usbhs_pipe_enable(pipe);
  310. return ret;
  311. }
  312. static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
  313. {
  314. struct usbhs_pipe *pipe = pkt->pipe;
  315. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  316. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  317. struct device *dev = usbhs_priv_to_dev(priv);
  318. int ret;
  319. usbhs_pipe_disable(pipe);
  320. ret = usbhsf_fifo_select(pipe, fifo, 0);
  321. if (ret < 0) {
  322. dev_err(dev, "%s() fail\n", __func__);
  323. return ret;
  324. }
  325. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  326. usbhsf_fifo_clear(pipe, fifo);
  327. usbhsf_fifo_unselect(pipe, fifo);
  328. usbhsf_rx_irq_ctrl(pipe, 1);
  329. usbhs_pipe_enable(pipe);
  330. return ret;
  331. }
  332. static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
  333. {
  334. struct usbhs_pipe *pipe = pkt->pipe;
  335. if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
  336. usbhsf_tx_irq_ctrl(pipe, 0);
  337. else
  338. usbhsf_rx_irq_ctrl(pipe, 0);
  339. pkt->actual = pkt->length;
  340. *is_done = 1;
  341. return 0;
  342. }
  343. const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
  344. .prepare = usbhs_dcp_dir_switch_to_write,
  345. .try_run = usbhs_dcp_dir_switch_done,
  346. };
  347. const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
  348. .prepare = usbhs_dcp_dir_switch_to_read,
  349. .try_run = usbhs_dcp_dir_switch_done,
  350. };
  351. /*
  352. * DCP data stage (push)
  353. */
  354. static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
  355. {
  356. struct usbhs_pipe *pipe = pkt->pipe;
  357. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  358. /*
  359. * change handler to PIO push
  360. */
  361. pkt->handler = &usbhs_fifo_pio_push_handler;
  362. return pkt->handler->prepare(pkt, is_done);
  363. }
  364. const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
  365. .prepare = usbhsf_dcp_data_stage_try_push,
  366. };
  367. /*
  368. * DCP data stage (pop)
  369. */
  370. static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
  371. int *is_done)
  372. {
  373. struct usbhs_pipe *pipe = pkt->pipe;
  374. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  375. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
  376. if (usbhs_pipe_is_busy(pipe))
  377. return 0;
  378. /*
  379. * prepare pop for DCP should
  380. * - change DCP direction,
  381. * - clear fifo
  382. * - DATA1
  383. */
  384. usbhs_pipe_disable(pipe);
  385. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  386. usbhsf_fifo_select(pipe, fifo, 0);
  387. usbhsf_fifo_clear(pipe, fifo);
  388. usbhsf_fifo_unselect(pipe, fifo);
  389. /*
  390. * change handler to PIO pop
  391. */
  392. pkt->handler = &usbhs_fifo_pio_pop_handler;
  393. return pkt->handler->prepare(pkt, is_done);
  394. }
  395. const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
  396. .prepare = usbhsf_dcp_data_stage_prepare_pop,
  397. };
  398. /*
  399. * PIO push handler
  400. */
  401. static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
  402. {
  403. struct usbhs_pipe *pipe = pkt->pipe;
  404. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  405. struct device *dev = usbhs_priv_to_dev(priv);
  406. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  407. void __iomem *addr = priv->base + fifo->port;
  408. u8 *buf;
  409. int maxp = usbhs_pipe_get_maxpacket(pipe);
  410. int total_len;
  411. int i, ret, len;
  412. int is_short;
  413. usbhs_pipe_data_sequence(pipe, pkt->sequence);
  414. pkt->sequence = -1; /* -1 sequence will be ignored */
  415. usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
  416. ret = usbhsf_fifo_select(pipe, fifo, 1);
  417. if (ret < 0)
  418. return 0;
  419. ret = usbhs_pipe_is_accessible(pipe);
  420. if (ret < 0) {
  421. /* inaccessible pipe is not an error */
  422. ret = 0;
  423. goto usbhs_fifo_write_busy;
  424. }
  425. ret = usbhsf_fifo_barrier(priv, fifo);
  426. if (ret < 0)
  427. goto usbhs_fifo_write_busy;
  428. buf = pkt->buf + pkt->actual;
  429. len = pkt->length - pkt->actual;
  430. len = min(len, maxp);
  431. total_len = len;
  432. is_short = total_len < maxp;
  433. /*
  434. * FIXME
  435. *
  436. * 32-bit access only
  437. */
  438. if (len >= 4 && !((unsigned long)buf & 0x03)) {
  439. iowrite32_rep(addr, buf, len / 4);
  440. len %= 4;
  441. buf += total_len - len;
  442. }
  443. /* the rest operation */
  444. for (i = 0; i < len; i++)
  445. iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
  446. /*
  447. * variable update
  448. */
  449. pkt->actual += total_len;
  450. if (pkt->actual < pkt->length)
  451. *is_done = 0; /* there are remainder data */
  452. else if (is_short)
  453. *is_done = 1; /* short packet */
  454. else
  455. *is_done = !pkt->zero; /* send zero packet ? */
  456. /*
  457. * pipe/irq handling
  458. */
  459. if (is_short)
  460. usbhsf_send_terminator(pipe, fifo);
  461. usbhsf_tx_irq_ctrl(pipe, !*is_done);
  462. usbhs_pipe_running(pipe, !*is_done);
  463. usbhs_pipe_enable(pipe);
  464. dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
  465. usbhs_pipe_number(pipe),
  466. pkt->length, pkt->actual, *is_done, pkt->zero);
  467. usbhsf_fifo_unselect(pipe, fifo);
  468. return 0;
  469. usbhs_fifo_write_busy:
  470. usbhsf_fifo_unselect(pipe, fifo);
  471. /*
  472. * pipe is busy.
  473. * retry in interrupt
  474. */
  475. usbhsf_tx_irq_ctrl(pipe, 1);
  476. usbhs_pipe_running(pipe, 1);
  477. return ret;
  478. }
  479. static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
  480. {
  481. if (usbhs_pipe_is_running(pkt->pipe))
  482. return 0;
  483. return usbhsf_pio_try_push(pkt, is_done);
  484. }
  485. const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
  486. .prepare = usbhsf_pio_prepare_push,
  487. .try_run = usbhsf_pio_try_push,
  488. };
  489. /*
  490. * PIO pop handler
  491. */
  492. static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
  493. {
  494. struct usbhs_pipe *pipe = pkt->pipe;
  495. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  496. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
  497. if (usbhs_pipe_is_busy(pipe))
  498. return 0;
  499. if (usbhs_pipe_is_running(pipe))
  500. return 0;
  501. /*
  502. * pipe enable to prepare packet receive
  503. */
  504. usbhs_pipe_data_sequence(pipe, pkt->sequence);
  505. pkt->sequence = -1; /* -1 sequence will be ignored */
  506. if (usbhs_pipe_is_dcp(pipe))
  507. usbhsf_fifo_clear(pipe, fifo);
  508. usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
  509. usbhs_pipe_enable(pipe);
  510. usbhs_pipe_running(pipe, 1);
  511. usbhsf_rx_irq_ctrl(pipe, 1);
  512. return 0;
  513. }
  514. static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
  515. {
  516. struct usbhs_pipe *pipe = pkt->pipe;
  517. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  518. struct device *dev = usbhs_priv_to_dev(priv);
  519. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  520. void __iomem *addr = priv->base + fifo->port;
  521. u8 *buf;
  522. u32 data = 0;
  523. int maxp = usbhs_pipe_get_maxpacket(pipe);
  524. int rcv_len, len;
  525. int i, ret;
  526. int total_len = 0;
  527. ret = usbhsf_fifo_select(pipe, fifo, 0);
  528. if (ret < 0)
  529. return 0;
  530. ret = usbhsf_fifo_barrier(priv, fifo);
  531. if (ret < 0)
  532. goto usbhs_fifo_read_busy;
  533. rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
  534. buf = pkt->buf + pkt->actual;
  535. len = pkt->length - pkt->actual;
  536. len = min(len, rcv_len);
  537. total_len = len;
  538. /*
  539. * update actual length first here to decide disable pipe.
  540. * if this pipe keeps BUF status and all data were popped,
  541. * then, next interrupt/token will be issued again
  542. */
  543. pkt->actual += total_len;
  544. if ((pkt->actual == pkt->length) || /* receive all data */
  545. (total_len < maxp)) { /* short packet */
  546. *is_done = 1;
  547. usbhsf_rx_irq_ctrl(pipe, 0);
  548. usbhs_pipe_running(pipe, 0);
  549. /*
  550. * If function mode, since this controller is possible to enter
  551. * Control Write status stage at this timing, this driver
  552. * should not disable the pipe. If such a case happens, this
  553. * controller is not able to complete the status stage.
  554. */
  555. if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
  556. usbhs_pipe_disable(pipe); /* disable pipe first */
  557. }
  558. /*
  559. * Buffer clear if Zero-Length packet
  560. *
  561. * see
  562. * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
  563. */
  564. if (0 == rcv_len) {
  565. pkt->zero = 1;
  566. usbhsf_fifo_clear(pipe, fifo);
  567. goto usbhs_fifo_read_end;
  568. }
  569. /*
  570. * FIXME
  571. *
  572. * 32-bit access only
  573. */
  574. if (len >= 4 && !((unsigned long)buf & 0x03)) {
  575. ioread32_rep(addr, buf, len / 4);
  576. len %= 4;
  577. buf += total_len - len;
  578. }
  579. /* the rest operation */
  580. for (i = 0; i < len; i++) {
  581. if (!(i & 0x03))
  582. data = ioread32(addr);
  583. buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
  584. }
  585. usbhs_fifo_read_end:
  586. dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
  587. usbhs_pipe_number(pipe),
  588. pkt->length, pkt->actual, *is_done, pkt->zero);
  589. usbhs_fifo_read_busy:
  590. usbhsf_fifo_unselect(pipe, fifo);
  591. return ret;
  592. }
  593. const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
  594. .prepare = usbhsf_prepare_pop,
  595. .try_run = usbhsf_pio_try_pop,
  596. };
  597. /*
  598. * DCP ctrol statge handler
  599. */
  600. static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
  601. {
  602. usbhs_dcp_control_transfer_done(pkt->pipe);
  603. *is_done = 1;
  604. return 0;
  605. }
  606. const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
  607. .prepare = usbhsf_ctrl_stage_end,
  608. .try_run = usbhsf_ctrl_stage_end,
  609. };
  610. /*
  611. * DMA fifo functions
  612. */
  613. static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
  614. struct usbhs_pkt *pkt)
  615. {
  616. if (&usbhs_fifo_dma_push_handler == pkt->handler)
  617. return fifo->tx_chan;
  618. if (&usbhs_fifo_dma_pop_handler == pkt->handler)
  619. return fifo->rx_chan;
  620. return NULL;
  621. }
  622. static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
  623. struct usbhs_pkt *pkt)
  624. {
  625. struct usbhs_fifo *fifo;
  626. int i;
  627. usbhs_for_each_dfifo(priv, fifo, i) {
  628. if (usbhsf_dma_chan_get(fifo, pkt) &&
  629. !usbhsf_fifo_is_busy(fifo))
  630. return fifo;
  631. }
  632. return NULL;
  633. }
  634. #define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
  635. #define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
  636. static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
  637. struct usbhs_fifo *fifo,
  638. u16 dreqe)
  639. {
  640. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  641. usbhs_bset(priv, fifo->sel, DREQE, dreqe);
  642. }
  643. static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
  644. {
  645. struct usbhs_pipe *pipe = pkt->pipe;
  646. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  647. struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
  648. struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
  649. struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
  650. return info->dma_map_ctrl(chan->device->dev, pkt, map);
  651. }
  652. static void usbhsf_dma_complete(void *arg);
  653. static void usbhsf_dma_xfer_preparing(struct usbhs_pkt *pkt)
  654. {
  655. struct usbhs_pipe *pipe = pkt->pipe;
  656. struct usbhs_fifo *fifo;
  657. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  658. struct dma_async_tx_descriptor *desc;
  659. struct dma_chan *chan;
  660. struct device *dev = usbhs_priv_to_dev(priv);
  661. enum dma_transfer_direction dir;
  662. fifo = usbhs_pipe_to_fifo(pipe);
  663. if (!fifo)
  664. return;
  665. chan = usbhsf_dma_chan_get(fifo, pkt);
  666. dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
  667. desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
  668. pkt->trans, dir,
  669. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  670. if (!desc)
  671. return;
  672. desc->callback = usbhsf_dma_complete;
  673. desc->callback_param = pipe;
  674. pkt->cookie = dmaengine_submit(desc);
  675. if (pkt->cookie < 0) {
  676. dev_err(dev, "Failed to submit dma descriptor\n");
  677. return;
  678. }
  679. dev_dbg(dev, " %s %d (%d/ %d)\n",
  680. fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
  681. usbhs_pipe_running(pipe, 1);
  682. usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
  683. dma_async_issue_pending(chan);
  684. usbhsf_dma_start(pipe, fifo);
  685. usbhs_pipe_enable(pipe);
  686. }
  687. static void xfer_work(struct work_struct *work)
  688. {
  689. struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
  690. struct usbhs_pipe *pipe = pkt->pipe;
  691. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  692. unsigned long flags;
  693. usbhs_lock(priv, flags);
  694. usbhsf_dma_xfer_preparing(pkt);
  695. usbhs_unlock(priv, flags);
  696. }
  697. /*
  698. * DMA push handler
  699. */
  700. static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
  701. {
  702. struct usbhs_pipe *pipe = pkt->pipe;
  703. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  704. struct usbhs_fifo *fifo;
  705. int len = pkt->length - pkt->actual;
  706. int ret;
  707. uintptr_t align_mask;
  708. if (usbhs_pipe_is_busy(pipe))
  709. return 0;
  710. /* use PIO if packet is less than pio_dma_border or pipe is DCP */
  711. if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
  712. usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
  713. goto usbhsf_pio_prepare_push;
  714. /* check data length if this driver don't use USB-DMAC */
  715. if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
  716. goto usbhsf_pio_prepare_push;
  717. /* check buffer alignment */
  718. align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
  719. USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
  720. if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
  721. goto usbhsf_pio_prepare_push;
  722. /* return at this time if the pipe is running */
  723. if (usbhs_pipe_is_running(pipe))
  724. return 0;
  725. /* get enable DMA fifo */
  726. fifo = usbhsf_get_dma_fifo(priv, pkt);
  727. if (!fifo)
  728. goto usbhsf_pio_prepare_push;
  729. ret = usbhsf_fifo_select(pipe, fifo, 0);
  730. if (ret < 0)
  731. goto usbhsf_pio_prepare_push;
  732. if (usbhsf_dma_map(pkt) < 0)
  733. goto usbhsf_pio_prepare_push_unselect;
  734. pkt->trans = len;
  735. usbhsf_tx_irq_ctrl(pipe, 0);
  736. /* FIXME: Workaound for usb dmac that driver can be used in atomic */
  737. if (usbhs_get_dparam(priv, has_usb_dmac)) {
  738. usbhsf_dma_xfer_preparing(pkt);
  739. } else {
  740. INIT_WORK(&pkt->work, xfer_work);
  741. schedule_work(&pkt->work);
  742. }
  743. return 0;
  744. usbhsf_pio_prepare_push_unselect:
  745. usbhsf_fifo_unselect(pipe, fifo);
  746. usbhsf_pio_prepare_push:
  747. /*
  748. * change handler to PIO
  749. */
  750. pkt->handler = &usbhs_fifo_pio_push_handler;
  751. return pkt->handler->prepare(pkt, is_done);
  752. }
  753. static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
  754. {
  755. struct usbhs_pipe *pipe = pkt->pipe;
  756. int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);
  757. pkt->actual += pkt->trans;
  758. if (pkt->actual < pkt->length)
  759. *is_done = 0; /* there are remainder data */
  760. else if (is_short)
  761. *is_done = 1; /* short packet */
  762. else
  763. *is_done = !pkt->zero; /* send zero packet? */
  764. usbhs_pipe_running(pipe, !*is_done);
  765. usbhsf_dma_stop(pipe, pipe->fifo);
  766. usbhsf_dma_unmap(pkt);
  767. usbhsf_fifo_unselect(pipe, pipe->fifo);
  768. if (!*is_done) {
  769. /* change handler to PIO */
  770. pkt->handler = &usbhs_fifo_pio_push_handler;
  771. return pkt->handler->try_run(pkt, is_done);
  772. }
  773. return 0;
  774. }
  775. const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
  776. .prepare = usbhsf_dma_prepare_push,
  777. .dma_done = usbhsf_dma_push_done,
  778. };
  779. /*
  780. * DMA pop handler
  781. */
  782. static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
  783. int *is_done)
  784. {
  785. return usbhsf_prepare_pop(pkt, is_done);
  786. }
  787. static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
  788. int *is_done)
  789. {
  790. struct usbhs_pipe *pipe = pkt->pipe;
  791. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  792. struct usbhs_fifo *fifo;
  793. int ret;
  794. if (usbhs_pipe_is_busy(pipe))
  795. return 0;
  796. /* use PIO if packet is less than pio_dma_border or pipe is DCP */
  797. if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
  798. usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
  799. goto usbhsf_pio_prepare_pop;
  800. fifo = usbhsf_get_dma_fifo(priv, pkt);
  801. if (!fifo)
  802. goto usbhsf_pio_prepare_pop;
  803. if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
  804. goto usbhsf_pio_prepare_pop;
  805. /* return at this time if the pipe is running */
  806. if (usbhs_pipe_is_running(pipe))
  807. return 0;
  808. usbhs_pipe_config_change_bfre(pipe, 1);
  809. ret = usbhsf_fifo_select(pipe, fifo, 0);
  810. if (ret < 0)
  811. goto usbhsf_pio_prepare_pop;
  812. if (usbhsf_dma_map(pkt) < 0)
  813. goto usbhsf_pio_prepare_pop_unselect;
  814. /* DMA */
  815. /*
  816. * usbhs_fifo_dma_pop_handler :: prepare
  817. * enabled irq to come here.
  818. * but it is no longer needed for DMA. disable it.
  819. */
  820. usbhsf_rx_irq_ctrl(pipe, 0);
  821. pkt->trans = pkt->length;
  822. usbhsf_dma_xfer_preparing(pkt);
  823. return 0;
  824. usbhsf_pio_prepare_pop_unselect:
  825. usbhsf_fifo_unselect(pipe, fifo);
  826. usbhsf_pio_prepare_pop:
  827. /*
  828. * change handler to PIO
  829. */
  830. pkt->handler = &usbhs_fifo_pio_pop_handler;
  831. usbhs_pipe_config_change_bfre(pipe, 0);
  832. return pkt->handler->prepare(pkt, is_done);
  833. }
  834. static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
  835. {
  836. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  837. if (usbhs_get_dparam(priv, has_usb_dmac))
  838. return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
  839. else
  840. return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
  841. }
  842. static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
  843. {
  844. struct usbhs_pipe *pipe = pkt->pipe;
  845. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  846. struct usbhs_fifo *fifo;
  847. int len, ret;
  848. if (usbhs_pipe_is_busy(pipe))
  849. return 0;
  850. if (usbhs_pipe_is_dcp(pipe))
  851. goto usbhsf_pio_prepare_pop;
  852. /* get enable DMA fifo */
  853. fifo = usbhsf_get_dma_fifo(priv, pkt);
  854. if (!fifo)
  855. goto usbhsf_pio_prepare_pop;
  856. if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
  857. goto usbhsf_pio_prepare_pop;
  858. ret = usbhsf_fifo_select(pipe, fifo, 0);
  859. if (ret < 0)
  860. goto usbhsf_pio_prepare_pop;
  861. /* use PIO if packet is less than pio_dma_border */
  862. len = usbhsf_fifo_rcv_len(priv, fifo);
  863. len = min(pkt->length - pkt->actual, len);
  864. if (len & 0x7) /* 8byte alignment */
  865. goto usbhsf_pio_prepare_pop_unselect;
  866. if (len < usbhs_get_dparam(priv, pio_dma_border))
  867. goto usbhsf_pio_prepare_pop_unselect;
  868. ret = usbhsf_fifo_barrier(priv, fifo);
  869. if (ret < 0)
  870. goto usbhsf_pio_prepare_pop_unselect;
  871. if (usbhsf_dma_map(pkt) < 0)
  872. goto usbhsf_pio_prepare_pop_unselect;
  873. /* DMA */
  874. /*
  875. * usbhs_fifo_dma_pop_handler :: prepare
  876. * enabled irq to come here.
  877. * but it is no longer needed for DMA. disable it.
  878. */
  879. usbhsf_rx_irq_ctrl(pipe, 0);
  880. pkt->trans = len;
  881. INIT_WORK(&pkt->work, xfer_work);
  882. schedule_work(&pkt->work);
  883. return 0;
  884. usbhsf_pio_prepare_pop_unselect:
  885. usbhsf_fifo_unselect(pipe, fifo);
  886. usbhsf_pio_prepare_pop:
  887. /*
  888. * change handler to PIO
  889. */
  890. pkt->handler = &usbhs_fifo_pio_pop_handler;
  891. return pkt->handler->try_run(pkt, is_done);
  892. }
  893. static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
  894. {
  895. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  896. BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
  897. return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
  898. }
  899. static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
  900. {
  901. struct usbhs_pipe *pipe = pkt->pipe;
  902. int maxp = usbhs_pipe_get_maxpacket(pipe);
  903. usbhsf_dma_stop(pipe, pipe->fifo);
  904. usbhsf_dma_unmap(pkt);
  905. usbhsf_fifo_unselect(pipe, pipe->fifo);
  906. pkt->actual += pkt->trans;
  907. if ((pkt->actual == pkt->length) || /* receive all data */
  908. (pkt->trans < maxp)) { /* short packet */
  909. *is_done = 1;
  910. usbhs_pipe_running(pipe, 0);
  911. } else {
  912. /* re-enable */
  913. usbhs_pipe_running(pipe, 0);
  914. usbhsf_prepare_pop(pkt, is_done);
  915. }
  916. return 0;
  917. }
  918. static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
  919. struct dma_chan *chan, int dtln)
  920. {
  921. struct usbhs_pipe *pipe = pkt->pipe;
  922. struct dma_tx_state state;
  923. size_t received_size;
  924. int maxp = usbhs_pipe_get_maxpacket(pipe);
  925. dmaengine_tx_status(chan, pkt->cookie, &state);
  926. received_size = pkt->length - state.residue;
  927. if (dtln) {
  928. received_size -= USBHS_USB_DMAC_XFER_SIZE;
  929. received_size &= ~(maxp - 1);
  930. received_size += dtln;
  931. }
  932. return received_size;
  933. }
  934. static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
  935. int *is_done)
  936. {
  937. struct usbhs_pipe *pipe = pkt->pipe;
  938. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  939. struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
  940. struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
  941. int rcv_len;
  942. /*
  943. * Since the driver disables rx_irq in DMA mode, the interrupt handler
  944. * cannot the BRDYSTS. So, the function clears it here because the
  945. * driver may use PIO mode next time.
  946. */
  947. usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
  948. rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
  949. usbhsf_fifo_clear(pipe, fifo);
  950. pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
  951. usbhs_pipe_running(pipe, 0);
  952. usbhsf_dma_stop(pipe, fifo);
  953. usbhsf_dma_unmap(pkt);
  954. usbhsf_fifo_unselect(pipe, pipe->fifo);
  955. /* The driver can assume the rx transaction is always "done" */
  956. *is_done = 1;
  957. return 0;
  958. }
  959. static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
  960. {
  961. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  962. if (usbhs_get_dparam(priv, has_usb_dmac))
  963. return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
  964. else
  965. return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
  966. }
  967. const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
  968. .prepare = usbhsf_dma_prepare_pop,
  969. .try_run = usbhsf_dma_try_pop,
  970. .dma_done = usbhsf_dma_pop_done
  971. };
  972. /*
  973. * DMA setting
  974. */
  975. static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
  976. {
  977. struct sh_dmae_slave *slave = param;
  978. /*
  979. * FIXME
  980. *
  981. * usbhs doesn't recognize id = 0 as valid DMA
  982. */
  983. if (0 == slave->shdma_slave.slave_id)
  984. return false;
  985. chan->private = slave;
  986. return true;
  987. }
  988. static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
  989. {
  990. if (fifo->tx_chan)
  991. dma_release_channel(fifo->tx_chan);
  992. if (fifo->rx_chan)
  993. dma_release_channel(fifo->rx_chan);
  994. fifo->tx_chan = NULL;
  995. fifo->rx_chan = NULL;
  996. }
  997. static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo)
  998. {
  999. dma_cap_mask_t mask;
  1000. dma_cap_zero(mask);
  1001. dma_cap_set(DMA_SLAVE, mask);
  1002. fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
  1003. &fifo->tx_slave);
  1004. dma_cap_zero(mask);
  1005. dma_cap_set(DMA_SLAVE, mask);
  1006. fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
  1007. &fifo->rx_slave);
  1008. }
  1009. static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
  1010. int channel)
  1011. {
  1012. char name[16];
  1013. /*
  1014. * To avoid complex handing for DnFIFOs, the driver uses each
  1015. * DnFIFO as TX or RX direction (not bi-direction).
  1016. * So, the driver uses odd channels for TX, even channels for RX.
  1017. */
  1018. snprintf(name, sizeof(name), "ch%d", channel);
  1019. if (channel & 1) {
  1020. fifo->tx_chan = dma_request_slave_channel_reason(dev, name);
  1021. if (IS_ERR(fifo->tx_chan))
  1022. fifo->tx_chan = NULL;
  1023. } else {
  1024. fifo->rx_chan = dma_request_slave_channel_reason(dev, name);
  1025. if (IS_ERR(fifo->rx_chan))
  1026. fifo->rx_chan = NULL;
  1027. }
  1028. }
  1029. static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
  1030. int channel)
  1031. {
  1032. struct device *dev = usbhs_priv_to_dev(priv);
  1033. if (dev->of_node)
  1034. usbhsf_dma_init_dt(dev, fifo, channel);
  1035. else
  1036. usbhsf_dma_init_pdev(fifo);
  1037. if (fifo->tx_chan || fifo->rx_chan)
  1038. dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
  1039. fifo->name,
  1040. fifo->tx_chan ? "[TX]" : " ",
  1041. fifo->rx_chan ? "[RX]" : " ");
  1042. }
  1043. /*
  1044. * irq functions
  1045. */
  1046. static int usbhsf_irq_empty(struct usbhs_priv *priv,
  1047. struct usbhs_irq_state *irq_state)
  1048. {
  1049. struct usbhs_pipe *pipe;
  1050. struct device *dev = usbhs_priv_to_dev(priv);
  1051. int i, ret;
  1052. if (!irq_state->bempsts) {
  1053. dev_err(dev, "debug %s !!\n", __func__);
  1054. return -EIO;
  1055. }
  1056. dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
  1057. /*
  1058. * search interrupted "pipe"
  1059. * not "uep".
  1060. */
  1061. usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
  1062. if (!(irq_state->bempsts & (1 << i)))
  1063. continue;
  1064. ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
  1065. if (ret < 0)
  1066. dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
  1067. }
  1068. return 0;
  1069. }
  1070. static int usbhsf_irq_ready(struct usbhs_priv *priv,
  1071. struct usbhs_irq_state *irq_state)
  1072. {
  1073. struct usbhs_pipe *pipe;
  1074. struct device *dev = usbhs_priv_to_dev(priv);
  1075. int i, ret;
  1076. if (!irq_state->brdysts) {
  1077. dev_err(dev, "debug %s !!\n", __func__);
  1078. return -EIO;
  1079. }
  1080. dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
  1081. /*
  1082. * search interrupted "pipe"
  1083. * not "uep".
  1084. */
  1085. usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
  1086. if (!(irq_state->brdysts & (1 << i)))
  1087. continue;
  1088. ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
  1089. if (ret < 0)
  1090. dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
  1091. }
  1092. return 0;
  1093. }
  1094. static void usbhsf_dma_complete(void *arg)
  1095. {
  1096. struct usbhs_pipe *pipe = arg;
  1097. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  1098. struct device *dev = usbhs_priv_to_dev(priv);
  1099. int ret;
  1100. ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
  1101. if (ret < 0)
  1102. dev_err(dev, "dma_complete run_error %d : %d\n",
  1103. usbhs_pipe_number(pipe), ret);
  1104. }
  1105. void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)
  1106. {
  1107. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  1108. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  1109. /* clear DCP FIFO of transmission */
  1110. if (usbhsf_fifo_select(pipe, fifo, 1) < 0)
  1111. return;
  1112. usbhsf_fifo_clear(pipe, fifo);
  1113. usbhsf_fifo_unselect(pipe, fifo);
  1114. /* clear DCP FIFO of reception */
  1115. if (usbhsf_fifo_select(pipe, fifo, 0) < 0)
  1116. return;
  1117. usbhsf_fifo_clear(pipe, fifo);
  1118. usbhsf_fifo_unselect(pipe, fifo);
  1119. }
  1120. /*
  1121. * fifo init
  1122. */
  1123. void usbhs_fifo_init(struct usbhs_priv *priv)
  1124. {
  1125. struct usbhs_mod *mod = usbhs_mod_get_current(priv);
  1126. struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
  1127. struct usbhs_fifo *dfifo;
  1128. int i;
  1129. mod->irq_empty = usbhsf_irq_empty;
  1130. mod->irq_ready = usbhsf_irq_ready;
  1131. mod->irq_bempsts = 0;
  1132. mod->irq_brdysts = 0;
  1133. cfifo->pipe = NULL;
  1134. usbhs_for_each_dfifo(priv, dfifo, i)
  1135. dfifo->pipe = NULL;
  1136. }
  1137. void usbhs_fifo_quit(struct usbhs_priv *priv)
  1138. {
  1139. struct usbhs_mod *mod = usbhs_mod_get_current(priv);
  1140. mod->irq_empty = NULL;
  1141. mod->irq_ready = NULL;
  1142. mod->irq_bempsts = 0;
  1143. mod->irq_brdysts = 0;
  1144. }
  1145. #define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \
  1146. do { \
  1147. fifo = usbhsf_get_dnfifo(priv, channel); \
  1148. fifo->name = "D"#channel"FIFO"; \
  1149. fifo->port = fifo_port; \
  1150. fifo->sel = D##channel##FIFOSEL; \
  1151. fifo->ctr = D##channel##FIFOCTR; \
  1152. fifo->tx_slave.shdma_slave.slave_id = \
  1153. usbhs_get_dparam(priv, d##channel##_tx_id); \
  1154. fifo->rx_slave.shdma_slave.slave_id = \
  1155. usbhs_get_dparam(priv, d##channel##_rx_id); \
  1156. usbhsf_dma_init(priv, fifo, channel); \
  1157. } while (0)
  1158. #define USBHS_DFIFO_INIT(priv, fifo, channel) \
  1159. __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
  1160. #define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \
  1161. __USBHS_DFIFO_INIT(priv, fifo, channel, 0)
  1162. int usbhs_fifo_probe(struct usbhs_priv *priv)
  1163. {
  1164. struct usbhs_fifo *fifo;
  1165. /* CFIFO */
  1166. fifo = usbhsf_get_cfifo(priv);
  1167. fifo->name = "CFIFO";
  1168. fifo->port = CFIFO;
  1169. fifo->sel = CFIFOSEL;
  1170. fifo->ctr = CFIFOCTR;
  1171. /* DFIFO */
  1172. USBHS_DFIFO_INIT(priv, fifo, 0);
  1173. USBHS_DFIFO_INIT(priv, fifo, 1);
  1174. USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2);
  1175. USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3);
  1176. return 0;
  1177. }
  1178. void usbhs_fifo_remove(struct usbhs_priv *priv)
  1179. {
  1180. struct usbhs_fifo *fifo;
  1181. int i;
  1182. usbhs_for_each_dfifo(priv, fifo, i)
  1183. usbhsf_dma_quit(priv, fifo);
  1184. }