mux.c 2.8 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Muxing for Gumstix Pepper and AM335x-based boards
  4. *
  5. * Copyright (C) 2014, Gumstix, Incorporated - http://www.gumstix.com/
  6. */
  7. #include <common.h>
  8. #include <asm/arch/sys_proto.h>
  9. #include <asm/arch/hardware.h>
  10. #include <asm/arch/mux.h>
  11. #include <asm/io.h>
  12. #include <i2c.h>
  13. #include "board.h"
  14. static struct module_pin_mux uart0_pin_mux[] = {
  15. {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
  16. {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
  17. {-1},
  18. };
  19. static struct module_pin_mux mmc0_pin_mux[] = {
  20. {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
  21. {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
  22. {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
  23. {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
  24. {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
  25. {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
  26. {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
  27. {-1},
  28. };
  29. static struct module_pin_mux i2c0_pin_mux[] = {
  30. /* I2C_DATA */
  31. {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
  32. /* I2C_SCLK */
  33. {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
  34. {-1},
  35. };
  36. static struct module_pin_mux rgmii1_pin_mux[] = {
  37. {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */
  38. {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */
  39. {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
  40. {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */
  41. {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */
  42. {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */
  43. {OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */
  44. {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */
  45. {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */
  46. {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */
  47. {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */
  48. {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */
  49. {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
  50. {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
  51. {OFFSET(rmii1_refclk), MODE(7) | RXACTIVE}, /* ETH_INT */
  52. {OFFSET(mii1_col), MODE(7) | PULLUP_EN}, /* PHY_NRESET */
  53. {OFFSET(xdma_event_intr1), MODE(3)},
  54. {-1},
  55. };
  56. void enable_uart0_pin_mux(void)
  57. {
  58. configure_module_pin_mux(uart0_pin_mux);
  59. }
  60. void enable_i2c0_pin_mux(void)
  61. {
  62. configure_module_pin_mux(i2c0_pin_mux);
  63. }
  64. /*
  65. * Do board-specific muxes.
  66. */
  67. void enable_board_pin_mux(void)
  68. {
  69. /* I2C0 */
  70. configure_module_pin_mux(i2c0_pin_mux);
  71. /* SD Card */
  72. configure_module_pin_mux(mmc0_pin_mux);
  73. /* Ethernet pinmux. */
  74. configure_module_pin_mux(rgmii1_pin_mux);
  75. }