rx51.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2012
  4. * Ивайло Димитров <freemangordon@abv.bg>
  5. *
  6. * (C) Copyright 2011-2012
  7. * Pali Rohár <pali.rohar@gmail.com>
  8. *
  9. * (C) Copyright 2010
  10. * Alistair Buxton <a.j.buxton@gmail.com>
  11. *
  12. * Derived from Beagle Board and 3430 SDP code:
  13. * (C) Copyright 2004-2008
  14. * Texas Instruments, <www.ti.com>
  15. *
  16. * Author :
  17. * Sunil Kumar <sunilsaini05@gmail.com>
  18. * Shashi Ranjan <shashiranjanmca05@gmail.com>
  19. *
  20. * Richard Woodruff <r-woodruff2@ti.com>
  21. * Syed Mohammed Khasim <khasim@ti.com>
  22. */
  23. #include <common.h>
  24. #include <watchdog.h>
  25. #include <malloc.h>
  26. #include <twl4030.h>
  27. #include <i2c.h>
  28. #include <video_fb.h>
  29. #include <asm/io.h>
  30. #include <asm/setup.h>
  31. #include <asm/bitops.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/arch/mux.h>
  34. #include <asm/arch/sys_proto.h>
  35. #include <asm/arch/mmc_host_def.h>
  36. #include "rx51.h"
  37. #include "tag_omap.h"
  38. DECLARE_GLOBAL_DATA_PTR;
  39. GraphicDevice gdev;
  40. const omap3_sysinfo sysinfo = {
  41. DDR_STACKED,
  42. "Nokia RX-51",
  43. "OneNAND"
  44. };
  45. /* This structure contains default omap tags needed for booting Maemo 5 */
  46. static struct tag_omap omap[] = {
  47. OMAP_TAG_UART_CONFIG(0x04),
  48. OMAP_TAG_SERIAL_CONSOLE_CONFIG(0x03, 0x01C200),
  49. OMAP_TAG_LCD_CONFIG("acx565akm", "internal", 90, 0x18),
  50. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_focus", 0x44, 0x1, 0x2, 0x0),
  51. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_launch", 0x45, 0x1, 0x2, 0x0),
  52. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_shutter", 0x6e, 0x1, 0x0, 0x0),
  53. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_apeslpx", 0x46, 0x2, 0x2, 0x0),
  54. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_bsi", 0x9d, 0x2, 0x2, 0x0),
  55. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_en", 0x4a, 0x2, 0x2, 0x0),
  56. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst", 0x4b, 0x6, 0x2, 0x0),
  57. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst_rq", 0x49, 0x6, 0x2, 0x0),
  58. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_wddis", 0x0d, 0x2, 0x2, 0x0),
  59. OMAP_TAG_GPIO_SWITCH_CONFIG("headphone", 0xb1, 0x1, 0x1, 0x0),
  60. OMAP_TAG_GPIO_SWITCH_CONFIG("kb_lock", 0x71, 0x1, 0x0, 0x0),
  61. OMAP_TAG_GPIO_SWITCH_CONFIG("proximity", 0x59, 0x0, 0x0, 0x0),
  62. OMAP_TAG_GPIO_SWITCH_CONFIG("sleep_ind", 0xa2, 0x2, 0x2, 0x0),
  63. OMAP_TAG_GPIO_SWITCH_CONFIG("slide", GPIO_SLIDE, 0x0, 0x0, 0x0),
  64. OMAP_TAG_WLAN_CX3110X_CONFIG(0x25, 0xff, 87, 42, -1),
  65. OMAP_TAG_PARTITION_CONFIG(PART1_NAME, PART1_SIZE * PART1_MULL,
  66. PART1_OFFS, PART1_MASK),
  67. OMAP_TAG_PARTITION_CONFIG(PART2_NAME, PART2_SIZE * PART2_MULL,
  68. PART2_OFFS, PART2_MASK),
  69. OMAP_TAG_PARTITION_CONFIG(PART3_NAME, PART3_SIZE * PART3_MULL,
  70. PART3_OFFS, PART3_MASK),
  71. OMAP_TAG_PARTITION_CONFIG(PART4_NAME, PART4_SIZE * PART4_MULL,
  72. PART4_OFFS, PART4_MASK),
  73. OMAP_TAG_PARTITION_CONFIG(PART5_NAME, PART5_SIZE * PART5_MULL,
  74. PART5_OFFS, PART5_MASK),
  75. OMAP_TAG_PARTITION_CONFIG(PART6_NAME, PART6_SIZE * PART6_MULL,
  76. PART6_OFFS, PART6_MASK),
  77. OMAP_TAG_BOOT_REASON_CONFIG("pwr_key"),
  78. OMAP_TAG_VERSION_STR_CONFIG("product", "RX-51"),
  79. OMAP_TAG_VERSION_STR_CONFIG("hw-build", "2101"),
  80. OMAP_TAG_VERSION_STR_CONFIG("nolo", "1.4.14"),
  81. OMAP_TAG_VERSION_STR_CONFIG("boot-mode", "normal"),
  82. { }
  83. };
  84. static char *boot_reason_ptr;
  85. static char *hw_build_ptr;
  86. static char *nolo_version_ptr;
  87. static char *boot_mode_ptr;
  88. /*
  89. * Routine: init_omap_tags
  90. * Description: Initialize pointers to values in tag_omap
  91. */
  92. static void init_omap_tags(void)
  93. {
  94. char *component;
  95. char *version;
  96. int i = 0;
  97. while (omap[i].hdr.tag) {
  98. switch (omap[i].hdr.tag) {
  99. case OMAP_TAG_BOOT_REASON:
  100. boot_reason_ptr = omap[i].u.boot_reason.reason_str;
  101. break;
  102. case OMAP_TAG_VERSION_STR:
  103. component = omap[i].u.version.component;
  104. version = omap[i].u.version.version;
  105. if (strcmp(component, "hw-build") == 0)
  106. hw_build_ptr = version;
  107. else if (strcmp(component, "nolo") == 0)
  108. nolo_version_ptr = version;
  109. else if (strcmp(component, "boot-mode") == 0)
  110. boot_mode_ptr = version;
  111. break;
  112. default:
  113. break;
  114. }
  115. i++;
  116. }
  117. }
  118. static void reuse_omap_atags(struct tag_omap *t)
  119. {
  120. char *component;
  121. char *version;
  122. while (t->hdr.tag) {
  123. switch (t->hdr.tag) {
  124. case OMAP_TAG_BOOT_REASON:
  125. memset(boot_reason_ptr, 0, 12);
  126. strcpy(boot_reason_ptr, t->u.boot_reason.reason_str);
  127. break;
  128. case OMAP_TAG_VERSION_STR:
  129. component = t->u.version.component;
  130. version = t->u.version.version;
  131. if (strcmp(component, "hw-build") == 0) {
  132. memset(hw_build_ptr, 0, 12);
  133. strcpy(hw_build_ptr, version);
  134. } else if (strcmp(component, "nolo") == 0) {
  135. memset(nolo_version_ptr, 0, 12);
  136. strcpy(nolo_version_ptr, version);
  137. } else if (strcmp(component, "boot-mode") == 0) {
  138. memset(boot_mode_ptr, 0, 12);
  139. strcpy(boot_mode_ptr, version);
  140. }
  141. break;
  142. default:
  143. break;
  144. }
  145. t = tag_omap_next(t);
  146. }
  147. }
  148. /*
  149. * Routine: reuse_atags
  150. * Description: Reuse atags from previous bootloader.
  151. * Reuse only only HW build, boot reason, boot mode and nolo
  152. */
  153. static void reuse_atags(void)
  154. {
  155. struct tag *t = (struct tag *)gd->bd->bi_boot_params;
  156. /* First tag must be ATAG_CORE */
  157. if (t->hdr.tag != ATAG_CORE)
  158. return;
  159. if (!boot_reason_ptr || !hw_build_ptr)
  160. return;
  161. /* Last tag must be ATAG_NONE */
  162. while (t->hdr.tag != ATAG_NONE) {
  163. switch (t->hdr.tag) {
  164. case ATAG_REVISION:
  165. memset(hw_build_ptr, 0, 12);
  166. sprintf(hw_build_ptr, "%x", t->u.revision.rev);
  167. break;
  168. case ATAG_BOARD:
  169. reuse_omap_atags((struct tag_omap *)&t->u);
  170. break;
  171. default:
  172. break;
  173. }
  174. t = tag_next(t);
  175. }
  176. }
  177. /*
  178. * Routine: board_init
  179. * Description: Early hardware init.
  180. */
  181. int board_init(void)
  182. {
  183. /* in SRAM or SDRAM, finish GPMC */
  184. gpmc_init();
  185. /* boot param addr */
  186. gd->bd->bi_boot_params = OMAP34XX_SDRC_CS0 + 0x100;
  187. return 0;
  188. }
  189. /*
  190. * Routine: get_board_revision
  191. * Description: Return board revision.
  192. */
  193. u32 get_board_rev(void)
  194. {
  195. return simple_strtol(hw_build_ptr, NULL, 16);
  196. }
  197. /*
  198. * Routine: setup_board_tags
  199. * Description: Append board specific boot tags.
  200. */
  201. void setup_board_tags(struct tag **in_params)
  202. {
  203. int setup_console_atag;
  204. char *setup_boot_reason_atag;
  205. char *setup_boot_mode_atag;
  206. char *str;
  207. int i;
  208. int size;
  209. int total_size;
  210. struct tag *params;
  211. struct tag_omap *t;
  212. params = (struct tag *)gd->bd->bi_boot_params;
  213. params->u.core.flags = 0x0;
  214. params->u.core.pagesize = 0x1000;
  215. params->u.core.rootdev = 0x0;
  216. /* append omap atag only if env setup_omap_atag is set to 1 */
  217. str = env_get("setup_omap_atag");
  218. if (!str || str[0] != '1')
  219. return;
  220. str = env_get("setup_console_atag");
  221. if (str && str[0] == '1')
  222. setup_console_atag = 1;
  223. else
  224. setup_console_atag = 0;
  225. setup_boot_reason_atag = env_get("setup_boot_reason_atag");
  226. setup_boot_mode_atag = env_get("setup_boot_mode_atag");
  227. params = *in_params;
  228. t = (struct tag_omap *)&params->u;
  229. total_size = sizeof(struct tag_header);
  230. for (i = 0; omap[i].hdr.tag; i++) {
  231. /* skip serial console tag */
  232. if (!setup_console_atag &&
  233. omap[i].hdr.tag == OMAP_TAG_SERIAL_CONSOLE)
  234. continue;
  235. size = omap[i].hdr.size + sizeof(struct tag_omap_header);
  236. memcpy(t, &omap[i], size);
  237. /* set uart tag to 0 - disable serial console */
  238. if (!setup_console_atag && omap[i].hdr.tag == OMAP_TAG_UART)
  239. t->u.uart.enabled_uarts = 0;
  240. /* change boot reason */
  241. if (setup_boot_reason_atag &&
  242. omap[i].hdr.tag == OMAP_TAG_BOOT_REASON) {
  243. memset(t->u.boot_reason.reason_str, 0, 12);
  244. strcpy(t->u.boot_reason.reason_str,
  245. setup_boot_reason_atag);
  246. }
  247. /* change boot mode */
  248. if (setup_boot_mode_atag &&
  249. omap[i].hdr.tag == OMAP_TAG_VERSION_STR &&
  250. strcmp(omap[i].u.version.component, "boot-mode") == 0) {
  251. memset(t->u.version.version, 0, 12);
  252. strcpy(t->u.version.version, setup_boot_mode_atag);
  253. }
  254. total_size += size;
  255. t = tag_omap_next(t);
  256. }
  257. params->hdr.tag = ATAG_BOARD;
  258. params->hdr.size = total_size >> 2;
  259. params = tag_next(params);
  260. *in_params = params;
  261. }
  262. /*
  263. * Routine: video_hw_init
  264. * Description: Set up the GraphicDevice depending on sys_boot.
  265. */
  266. void *video_hw_init(void)
  267. {
  268. /* fill in Graphic Device */
  269. gdev.frameAdrs = 0x8f9c0000;
  270. gdev.winSizeX = 800;
  271. gdev.winSizeY = 480;
  272. gdev.gdfBytesPP = 2;
  273. gdev.gdfIndex = GDF_16BIT_565RGB;
  274. memset((void *)gdev.frameAdrs, 0, 0xbb800);
  275. return (void *) &gdev;
  276. }
  277. /*
  278. * Routine: twl4030_regulator_set_mode
  279. * Description: Set twl4030 regulator mode over i2c powerbus.
  280. */
  281. static void twl4030_regulator_set_mode(u8 id, u8 mode)
  282. {
  283. u16 msg = MSG_SINGULAR(DEV_GRP_P1, id, mode);
  284. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  285. TWL4030_PM_MASTER_PB_WORD_MSB, msg >> 8);
  286. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  287. TWL4030_PM_MASTER_PB_WORD_LSB, msg & 0xff);
  288. }
  289. static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
  290. {
  291. u32 i, num_params = *parameters;
  292. u32 *sram_scratch_space = (u32 *)OMAP3_PUBLIC_SRAM_SCRATCH_AREA;
  293. /*
  294. * copy the parameters to an un-cached area to avoid coherency
  295. * issues
  296. */
  297. for (i = 0; i < num_params; i++) {
  298. __raw_writel(*parameters, sram_scratch_space);
  299. parameters++;
  300. sram_scratch_space++;
  301. }
  302. /* Now make the PPA call */
  303. do_omap3_emu_romcode_call(service_id, OMAP3_PUBLIC_SRAM_SCRATCH_AREA);
  304. }
  305. void omap3_set_aux_cr_secure(u32 acr)
  306. {
  307. struct emu_hal_params_rx51 emu_romcode_params = { 0, };
  308. emu_romcode_params.num_params = 2;
  309. emu_romcode_params.param1 = acr;
  310. omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR,
  311. (u32 *)&emu_romcode_params);
  312. }
  313. /*
  314. * Routine: omap3_update_aux_cr_secure_rx51
  315. * Description: Modify the contents Auxiliary Control Register.
  316. * Parameters:
  317. * set_bits - bits to set in ACR
  318. * clr_bits - bits to clear in ACR
  319. */
  320. static void omap3_update_aux_cr_secure_rx51(u32 set_bits, u32 clear_bits)
  321. {
  322. u32 acr;
  323. /* Read ACR */
  324. asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
  325. acr &= ~clear_bits;
  326. acr |= set_bits;
  327. omap3_set_aux_cr_secure(acr);
  328. }
  329. /*
  330. * Routine: misc_init_r
  331. * Description: Configure board specific parts.
  332. */
  333. int misc_init_r(void)
  334. {
  335. char buf[12];
  336. u8 state;
  337. /* reset lp5523 led */
  338. i2c_set_bus_num(1);
  339. state = 0xff;
  340. i2c_write(0x32, 0x3d, 1, &state, 1);
  341. i2c_set_bus_num(0);
  342. /* initialize twl4030 power managment */
  343. twl4030_power_init();
  344. /* set VSIM to 1.8V */
  345. twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
  346. TWL4030_PM_RECEIVER_VSIM_VSEL_18,
  347. TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
  348. TWL4030_PM_RECEIVER_DEV_GRP_P1);
  349. /* store I2C access state */
  350. twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  351. &state);
  352. /* enable I2C access to powerbus (needed for twl4030 regulator) */
  353. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  354. 0x02);
  355. /* set VAUX3, VSIM and VMMC1 state to active - enable eMMC memory */
  356. twl4030_regulator_set_mode(RES_VAUX3, RES_STATE_ACTIVE);
  357. twl4030_regulator_set_mode(RES_VSIM, RES_STATE_ACTIVE);
  358. twl4030_regulator_set_mode(RES_VMMC1, RES_STATE_ACTIVE);
  359. /* restore I2C access state */
  360. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  361. state);
  362. /* set env variable attkernaddr for relocated kernel */
  363. sprintf(buf, "%#x", KERNEL_ADDRESS);
  364. env_set("attkernaddr", buf);
  365. /* initialize omap tags */
  366. init_omap_tags();
  367. /* reuse atags from previous bootloader */
  368. reuse_atags();
  369. omap_die_id_display();
  370. print_cpuinfo();
  371. /*
  372. * Cortex-A8(r1p0..r1p2) errata 430973 workaround
  373. * Set IBE bit in Auxiliary Control Register
  374. *
  375. * Call this routine only on real secure device
  376. * Qemu does not implement secure PPA and crash
  377. */
  378. if (get_device_type() == HS_DEVICE)
  379. omap3_update_aux_cr_secure_rx51(1 << 6, 0);
  380. return 0;
  381. }
  382. /*
  383. * Routine: set_muxconf_regs
  384. * Description: Setting up the configuration Mux registers specific to the
  385. * hardware. Many pins need to be moved from protect to primary
  386. * mode.
  387. */
  388. void set_muxconf_regs(void)
  389. {
  390. MUX_RX51();
  391. }
  392. static unsigned long int twl_wd_time; /* last time of watchdog reset */
  393. static unsigned long int twl_i2c_lock;
  394. /*
  395. * Routine: hw_watchdog_reset
  396. * Description: Reset timeout of twl4030 watchdog.
  397. */
  398. void hw_watchdog_reset(void)
  399. {
  400. u8 timeout = 0;
  401. /* do not reset watchdog too often - max every 4s */
  402. if (get_timer(twl_wd_time) < 4 * CONFIG_SYS_HZ)
  403. return;
  404. /* localy lock twl4030 i2c bus */
  405. if (test_and_set_bit(0, &twl_i2c_lock))
  406. return;
  407. /* read actual watchdog timeout */
  408. twl4030_i2c_read_u8(TWL4030_CHIP_PM_RECEIVER,
  409. TWL4030_PM_RECEIVER_WATCHDOG_CFG, &timeout);
  410. /* timeout 0 means watchdog is disabled */
  411. /* reset watchdog timeout to 31s (maximum) */
  412. if (timeout != 0)
  413. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
  414. TWL4030_PM_RECEIVER_WATCHDOG_CFG, 31);
  415. /* store last watchdog reset time */
  416. twl_wd_time = get_timer(0);
  417. /* localy unlock twl4030 i2c bus */
  418. test_and_clear_bit(0, &twl_i2c_lock);
  419. }
  420. /*
  421. * TWL4030 keypad handler for cfb_console
  422. */
  423. static const char keymap[] = {
  424. /* normal */
  425. 'q', 'o', 'p', ',', '\b', 0, 'a', 's',
  426. 'w', 'd', 'f', 'g', 'h', 'j', 'k', 'l',
  427. 'e', '.', 0, '\r', 0, 'z', 'x', 'c',
  428. 'r', 'v', 'b', 'n', 'm', ' ', ' ', 0,
  429. 't', 0, 0, 0, 0, 0, 0, 0,
  430. 'y', 0, 0, 0, 0, 0, 0, 0,
  431. 'u', 0, 0, 0, 0, 0, 0, 0,
  432. 'i', 5, 6, 0, 0, 0, 0, 0,
  433. /* fn */
  434. '1', '9', '0', '=', '\b', 0, '*', '+',
  435. '2', '#', '-', '_', '(', ')', '&', '!',
  436. '3', '?', '^', '\r', 0, 156, '$', 238,
  437. '4', '/', '\\', '"', '\'', '@', 0, '<',
  438. '5', '|', '>', 0, 0, 0, 0, 0,
  439. '6', 0, 0, 0, 0, 0, 0, 0,
  440. '7', 0, 0, 0, 0, 0, 0, 0,
  441. '8', 16, 17, 0, 0, 0, 0, 0,
  442. };
  443. static u8 keys[8];
  444. static u8 old_keys[8] = {0, 0, 0, 0, 0, 0, 0, 0};
  445. #define KEYBUF_SIZE 32
  446. static u8 keybuf[KEYBUF_SIZE];
  447. static u8 keybuf_head;
  448. static u8 keybuf_tail;
  449. /*
  450. * Routine: rx51_kp_init
  451. * Description: Initialize HW keyboard.
  452. */
  453. int rx51_kp_init(void)
  454. {
  455. int ret = 0;
  456. u8 ctrl;
  457. ret = twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
  458. TWL4030_KEYPAD_KEYP_CTRL_REG, &ctrl);
  459. if (ret)
  460. return ret;
  461. /* turn on keyboard and use hardware scanning */
  462. ctrl |= TWL4030_KEYPAD_CTRL_KBD_ON;
  463. ctrl |= TWL4030_KEYPAD_CTRL_SOFT_NRST;
  464. ctrl |= TWL4030_KEYPAD_CTRL_SOFTMODEN;
  465. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  466. TWL4030_KEYPAD_KEYP_CTRL_REG, ctrl);
  467. /* enable key event status */
  468. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  469. TWL4030_KEYPAD_KEYP_IMR1, 0xfe);
  470. /* enable interrupt generation on rising and falling */
  471. /* this is a workaround for qemu twl4030 emulation */
  472. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  473. TWL4030_KEYPAD_KEYP_EDR, 0x57);
  474. /* enable ISR clear on read */
  475. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  476. TWL4030_KEYPAD_KEYP_SIH_CTRL, 0x05);
  477. return 0;
  478. }
  479. static void rx51_kp_fill(u8 k, u8 mods)
  480. {
  481. /* check if some cursor key without meta fn key was pressed */
  482. if (!(mods & 2) && (k == 18 || k == 31 || k == 33 || k == 34)) {
  483. keybuf[keybuf_tail++] = '\e';
  484. keybuf_tail %= KEYBUF_SIZE;
  485. keybuf[keybuf_tail++] = '[';
  486. keybuf_tail %= KEYBUF_SIZE;
  487. if (k == 18) /* up */
  488. keybuf[keybuf_tail++] = 'A';
  489. else if (k == 31) /* left */
  490. keybuf[keybuf_tail++] = 'D';
  491. else if (k == 33) /* down */
  492. keybuf[keybuf_tail++] = 'B';
  493. else if (k == 34) /* right */
  494. keybuf[keybuf_tail++] = 'C';
  495. keybuf_tail %= KEYBUF_SIZE;
  496. return;
  497. }
  498. if (mods & 2) { /* fn meta key was pressed */
  499. k = keymap[k+64];
  500. } else {
  501. k = keymap[k];
  502. if (mods & 1) { /* ctrl key was pressed */
  503. if (k >= 'a' && k <= 'z')
  504. k -= 'a' - 1;
  505. }
  506. if (mods & 4) { /* shift key was pressed */
  507. if (k >= 'a' && k <= 'z')
  508. k += 'A' - 'a';
  509. else if (k == '.')
  510. k = ':';
  511. else if (k == ',')
  512. k = ';';
  513. }
  514. }
  515. keybuf[keybuf_tail++] = k;
  516. keybuf_tail %= KEYBUF_SIZE;
  517. }
  518. /*
  519. * Routine: rx51_kp_tstc
  520. * Description: Test if key was pressed (from buffer).
  521. */
  522. int rx51_kp_tstc(struct stdio_dev *sdev)
  523. {
  524. u8 c, r, dk, i;
  525. u8 intr;
  526. u8 mods;
  527. /* localy lock twl4030 i2c bus */
  528. if (test_and_set_bit(0, &twl_i2c_lock))
  529. return 0;
  530. /* twl4030 remembers up to 2 events */
  531. for (i = 0; i < 2; i++) {
  532. /* check interrupt register for events */
  533. twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
  534. TWL4030_KEYPAD_KEYP_ISR1 + (2 * i), &intr);
  535. /* no event */
  536. if (!(intr&1))
  537. continue;
  538. /* read the key state */
  539. i2c_read(TWL4030_CHIP_KEYPAD,
  540. TWL4030_KEYPAD_FULL_CODE_7_0, 1, keys, 8);
  541. /* cut out modifier keys from the keystate */
  542. mods = keys[4] >> 4;
  543. keys[4] &= 0x0f;
  544. for (c = 0; c < 8; c++) {
  545. /* get newly pressed keys only */
  546. dk = ((keys[c] ^ old_keys[c])&keys[c]);
  547. old_keys[c] = keys[c];
  548. /* fill the keybuf */
  549. for (r = 0; r < 8; r++) {
  550. if (dk&1)
  551. rx51_kp_fill((c*8)+r, mods);
  552. dk = dk >> 1;
  553. }
  554. }
  555. }
  556. /* localy unlock twl4030 i2c bus */
  557. test_and_clear_bit(0, &twl_i2c_lock);
  558. return (KEYBUF_SIZE + keybuf_tail - keybuf_head)%KEYBUF_SIZE;
  559. }
  560. /*
  561. * Routine: rx51_kp_getc
  562. * Description: Get last pressed key (from buffer).
  563. */
  564. int rx51_kp_getc(struct stdio_dev *sdev)
  565. {
  566. keybuf_head %= KEYBUF_SIZE;
  567. while (!rx51_kp_tstc(sdev))
  568. WATCHDOG_RESET();
  569. return keybuf[keybuf_head++];
  570. }
  571. /*
  572. * Routine: board_mmc_init
  573. * Description: Initialize mmc devices.
  574. */
  575. int board_mmc_init(bd_t *bis)
  576. {
  577. omap_mmc_init(0, 0, 0, -1, -1);
  578. omap_mmc_init(1, 0, 0, -1, -1);
  579. return 0;
  580. }
  581. void board_mmc_power_init(void)
  582. {
  583. twl4030_power_mmc_init(0);
  584. twl4030_power_mmc_init(1);
  585. }