universal.c 8.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2010 Samsung Electronics
  4. * Minkyu Kang <mk7.kang@samsung.com>
  5. * Kyungmin Park <kyungmin.park@samsung.com>
  6. */
  7. #include <common.h>
  8. #include <spi.h>
  9. #include <lcd.h>
  10. #include <asm/io.h>
  11. #include <asm/gpio.h>
  12. #include <asm/arch/adc.h>
  13. #include <asm/arch/pinmux.h>
  14. #include <asm/arch/watchdog.h>
  15. #include <ld9040.h>
  16. #include <power/pmic.h>
  17. #include <usb.h>
  18. #include <usb/dwc2_udc.h>
  19. #include <asm/arch/cpu.h>
  20. #include <power/max8998_pmic.h>
  21. #include <libtizen.h>
  22. #include <samsung/misc.h>
  23. #include <usb_mass_storage.h>
  24. #include <asm/mach-types.h>
  25. DECLARE_GLOBAL_DATA_PTR;
  26. unsigned int board_rev;
  27. static int init_pmic_lcd(void);
  28. u32 get_board_rev(void)
  29. {
  30. return board_rev;
  31. }
  32. int exynos_power_init(void)
  33. {
  34. return init_pmic_lcd();
  35. }
  36. static int get_hwrev(void)
  37. {
  38. return board_rev & 0xFF;
  39. }
  40. static unsigned short get_adc_value(int channel)
  41. {
  42. struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
  43. unsigned short ret = 0;
  44. unsigned int reg;
  45. unsigned int loop = 0;
  46. writel(channel & 0xF, &adc->adcmux);
  47. writel((1 << 14) | (49 << 6), &adc->adccon);
  48. writel(1000 & 0xffff, &adc->adcdly);
  49. writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
  50. udelay(10);
  51. writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
  52. udelay(10);
  53. do {
  54. udelay(1);
  55. reg = readl(&adc->adccon);
  56. } while (!(reg & (1 << 15)) && (loop++ < 1000));
  57. ret = readl(&adc->adcdat0) & 0xFFF;
  58. return ret;
  59. }
  60. static int adc_power_control(int on)
  61. {
  62. struct udevice *dev;
  63. int ret;
  64. u8 reg;
  65. ret = pmic_get("max8998-pmic", &dev);
  66. if (ret) {
  67. puts("Failed to get MAX8998!\n");
  68. return ret;
  69. }
  70. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
  71. if (on)
  72. reg |= MAX8998_LDO4;
  73. else
  74. reg &= ~MAX8998_LDO4;
  75. ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
  76. if (ret) {
  77. puts("MAX8998 LDO setting error\n");
  78. return -EINVAL;
  79. }
  80. return 0;
  81. }
  82. static unsigned int get_hw_revision(void)
  83. {
  84. int hwrev, mode0, mode1;
  85. adc_power_control(1);
  86. mode0 = get_adc_value(1); /* HWREV_MODE0 */
  87. mode1 = get_adc_value(2); /* HWREV_MODE1 */
  88. /*
  89. * XXX Always set the default hwrev as the latest board
  90. * ADC = (voltage) / 3.3 * 4096
  91. */
  92. hwrev = 3;
  93. #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
  94. if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
  95. hwrev = 0x0; /* 0.01V 0.01V */
  96. if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
  97. hwrev = 0x1; /* 610mV 0.01V */
  98. if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
  99. hwrev = 0x2; /* 1.16V 0.01V */
  100. if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
  101. hwrev = 0x3; /* 1.79V 0.01V */
  102. #undef IS_RANGE
  103. debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
  104. adc_power_control(0);
  105. return hwrev;
  106. }
  107. static void check_hw_revision(void)
  108. {
  109. int hwrev;
  110. hwrev = get_hw_revision();
  111. board_rev |= hwrev;
  112. }
  113. #ifdef CONFIG_USB_GADGET
  114. static int s5pc210_phy_control(int on)
  115. {
  116. struct udevice *dev;
  117. int ret;
  118. u8 reg;
  119. ret = pmic_get("max8998-pmic", &dev);
  120. if (ret) {
  121. puts("Failed to get MAX8998!\n");
  122. return ret;
  123. }
  124. if (on) {
  125. reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
  126. reg |= MAX8998_SAFEOUT1;
  127. ret |= pmic_reg_write(dev,
  128. MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
  129. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
  130. reg |= MAX8998_LDO3;
  131. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
  132. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
  133. reg |= MAX8998_LDO8;
  134. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
  135. } else {
  136. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
  137. reg &= ~MAX8998_LDO8;
  138. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
  139. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
  140. reg &= ~MAX8998_LDO3;
  141. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
  142. reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
  143. reg &= ~MAX8998_SAFEOUT1;
  144. ret |= pmic_reg_write(dev,
  145. MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
  146. }
  147. if (ret) {
  148. puts("MAX8998 LDO setting error!\n");
  149. return -EINVAL;
  150. }
  151. return 0;
  152. }
  153. struct dwc2_plat_otg_data s5pc210_otg_data = {
  154. .phy_control = s5pc210_phy_control,
  155. .regs_phy = EXYNOS4_USBPHY_BASE,
  156. .regs_otg = EXYNOS4_USBOTG_BASE,
  157. .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
  158. .usb_flags = PHY0_SLEEP,
  159. };
  160. #endif
  161. int board_usb_init(int index, enum usb_init_type init)
  162. {
  163. debug("USB_udc_probe\n");
  164. return dwc2_udc_probe(&s5pc210_otg_data);
  165. }
  166. int exynos_early_init_f(void)
  167. {
  168. wdt_stop();
  169. return 0;
  170. }
  171. static int init_pmic_lcd(void)
  172. {
  173. struct udevice *dev;
  174. unsigned char val;
  175. int ret = 0;
  176. ret = pmic_get("max8998-pmic", &dev);
  177. if (ret) {
  178. puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
  179. return ret;
  180. }
  181. /* LDO7 1.8V */
  182. val = 0x02; /* (1800 - 1600) / 100; */
  183. ret |= pmic_reg_write(dev, MAX8998_REG_LDO7, val);
  184. /* LDO17 3.0V */
  185. val = 0xe; /* (3000 - 1600) / 100; */
  186. ret |= pmic_reg_write(dev, MAX8998_REG_LDO17, val);
  187. /* Disable unneeded regulators */
  188. /*
  189. * ONOFF1
  190. * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
  191. * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
  192. */
  193. val = 0xB9;
  194. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, val);
  195. /* ONOFF2
  196. * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
  197. * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
  198. */
  199. val = 0x50;
  200. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, val);
  201. /* ONOFF3
  202. * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
  203. * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
  204. */
  205. val = 0x00;
  206. ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF3, val);
  207. if (ret) {
  208. puts("LCD pmic initialisation error!\n");
  209. return -EINVAL;
  210. }
  211. return 0;
  212. }
  213. void exynos_cfg_lcd_gpio(void)
  214. {
  215. unsigned int i, f3_end = 4;
  216. for (i = 0; i < 8; i++) {
  217. /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
  218. gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
  219. gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
  220. gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
  221. /* pull-up/down disable */
  222. gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
  223. gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
  224. gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
  225. /* drive strength to max (24bit) */
  226. gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
  227. gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
  228. gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
  229. gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
  230. gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
  231. gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
  232. }
  233. for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
  234. /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
  235. gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
  236. /* pull-up/down disable */
  237. gpio_set_pull(i, S5P_GPIO_PULL_NONE);
  238. /* drive strength to max (24bit) */
  239. gpio_set_drv(i, S5P_GPIO_DRV_4X);
  240. gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
  241. }
  242. /* gpio pad configuration for LCD reset. */
  243. gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
  244. gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
  245. }
  246. int mipi_power(void)
  247. {
  248. return 0;
  249. }
  250. void exynos_reset_lcd(void)
  251. {
  252. gpio_set_value(EXYNOS4_GPIO_Y45, 1);
  253. udelay(10000);
  254. gpio_set_value(EXYNOS4_GPIO_Y45, 0);
  255. udelay(10000);
  256. gpio_set_value(EXYNOS4_GPIO_Y45, 1);
  257. udelay(100);
  258. }
  259. void exynos_lcd_power_on(void)
  260. {
  261. struct udevice *dev;
  262. int ret;
  263. u8 reg;
  264. ret = pmic_get("max8998-pmic", &dev);
  265. if (ret) {
  266. puts("Failed to get MAX8998!\n");
  267. return;
  268. }
  269. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
  270. reg |= MAX8998_LDO17;
  271. ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
  272. if (ret) {
  273. puts("MAX8998 LDO setting error\n");
  274. return;
  275. }
  276. reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
  277. reg |= MAX8998_LDO7;
  278. ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
  279. if (ret) {
  280. puts("MAX8998 LDO setting error\n");
  281. return;
  282. }
  283. }
  284. void exynos_cfg_ldo(void)
  285. {
  286. ld9040_cfg_ldo();
  287. }
  288. void exynos_enable_ldo(unsigned int onoff)
  289. {
  290. ld9040_enable_ldo(onoff);
  291. }
  292. int exynos_init(void)
  293. {
  294. gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
  295. switch (get_hwrev()) {
  296. case 0:
  297. /*
  298. * Set the low to enable LDO_EN
  299. * But when you use the test board for eMMC booting
  300. * you should set it HIGH since it removes the inverter
  301. */
  302. /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
  303. gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
  304. gpio_direction_output(EXYNOS4_GPIO_E36, 0);
  305. break;
  306. default:
  307. /*
  308. * Default reset state is High and there's no inverter
  309. * But set it as HIGH to ensure
  310. */
  311. /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
  312. gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
  313. gpio_direction_output(EXYNOS4_GPIO_E13, 1);
  314. break;
  315. }
  316. check_hw_revision();
  317. printf("HW Revision:\t0x%x\n", board_rev);
  318. return 0;
  319. }
  320. #ifdef CONFIG_LCD
  321. void exynos_lcd_misc_init(vidinfo_t *vid)
  322. {
  323. #ifdef CONFIG_TIZEN
  324. get_tizen_logo_info(vid);
  325. #endif
  326. /* for LD9040. */
  327. vid->pclk_name = 1; /* MPLL */
  328. vid->sclk_div = 1;
  329. env_set("lcdinfo", "lcd=ld9040");
  330. }
  331. #endif