hw_breakpoint.c 9.6 KB

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  1. /*
  2. * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
  3. * using the CPU's debug registers. Derived from
  4. * "arch/x86/kernel/hw_breakpoint.c"
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19. *
  20. * Copyright 2010 IBM Corporation
  21. * Author: K.Prasad <prasad@linux.vnet.ibm.com>
  22. *
  23. */
  24. #include <linux/hw_breakpoint.h>
  25. #include <linux/notifier.h>
  26. #include <linux/kprobes.h>
  27. #include <linux/percpu.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/smp.h>
  31. #include <asm/hw_breakpoint.h>
  32. #include <asm/processor.h>
  33. #include <asm/sstep.h>
  34. #include <asm/debug.h>
  35. #include <linux/uaccess.h>
  36. /*
  37. * Stores the breakpoints currently in use on each breakpoint address
  38. * register for every cpu
  39. */
  40. static DEFINE_PER_CPU(struct perf_event *, bp_per_reg);
  41. /*
  42. * Returns total number of data or instruction breakpoints available.
  43. */
  44. int hw_breakpoint_slots(int type)
  45. {
  46. if (type == TYPE_DATA)
  47. return HBP_NUM;
  48. return 0; /* no instruction breakpoints available */
  49. }
  50. /*
  51. * Install a perf counter breakpoint.
  52. *
  53. * We seek a free debug address register and use it for this
  54. * breakpoint.
  55. *
  56. * Atomic: we hold the counter->ctx->lock and we only handle variables
  57. * and registers local to this cpu.
  58. */
  59. int arch_install_hw_breakpoint(struct perf_event *bp)
  60. {
  61. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  62. struct perf_event **slot = this_cpu_ptr(&bp_per_reg);
  63. *slot = bp;
  64. /*
  65. * Do not install DABR values if the instruction must be single-stepped.
  66. * If so, DABR will be populated in single_step_dabr_instruction().
  67. */
  68. if (current->thread.last_hit_ubp != bp)
  69. __set_breakpoint(info);
  70. return 0;
  71. }
  72. /*
  73. * Uninstall the breakpoint contained in the given counter.
  74. *
  75. * First we search the debug address register it uses and then we disable
  76. * it.
  77. *
  78. * Atomic: we hold the counter->ctx->lock and we only handle variables
  79. * and registers local to this cpu.
  80. */
  81. void arch_uninstall_hw_breakpoint(struct perf_event *bp)
  82. {
  83. struct perf_event **slot = this_cpu_ptr(&bp_per_reg);
  84. if (*slot != bp) {
  85. WARN_ONCE(1, "Can't find the breakpoint");
  86. return;
  87. }
  88. *slot = NULL;
  89. hw_breakpoint_disable();
  90. }
  91. /*
  92. * Perform cleanup of arch-specific counters during unregistration
  93. * of the perf-event
  94. */
  95. void arch_unregister_hw_breakpoint(struct perf_event *bp)
  96. {
  97. /*
  98. * If the breakpoint is unregistered between a hw_breakpoint_handler()
  99. * and the single_step_dabr_instruction(), then cleanup the breakpoint
  100. * restoration variables to prevent dangling pointers.
  101. * FIXME, this should not be using bp->ctx at all! Sayeth peterz.
  102. */
  103. if (bp->ctx && bp->ctx->task && bp->ctx->task != ((void *)-1L))
  104. bp->ctx->task->thread.last_hit_ubp = NULL;
  105. }
  106. /*
  107. * Check for virtual address in kernel space.
  108. */
  109. int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw)
  110. {
  111. return is_kernel_addr(hw->address);
  112. }
  113. int arch_bp_generic_fields(int type, int *gen_bp_type)
  114. {
  115. *gen_bp_type = 0;
  116. if (type & HW_BRK_TYPE_READ)
  117. *gen_bp_type |= HW_BREAKPOINT_R;
  118. if (type & HW_BRK_TYPE_WRITE)
  119. *gen_bp_type |= HW_BREAKPOINT_W;
  120. if (*gen_bp_type == 0)
  121. return -EINVAL;
  122. return 0;
  123. }
  124. /*
  125. * Validate the arch-specific HW Breakpoint register settings
  126. */
  127. int hw_breakpoint_arch_parse(struct perf_event *bp,
  128. const struct perf_event_attr *attr,
  129. struct arch_hw_breakpoint *hw)
  130. {
  131. int ret = -EINVAL, length_max;
  132. if (!bp)
  133. return ret;
  134. hw->type = HW_BRK_TYPE_TRANSLATE;
  135. if (attr->bp_type & HW_BREAKPOINT_R)
  136. hw->type |= HW_BRK_TYPE_READ;
  137. if (attr->bp_type & HW_BREAKPOINT_W)
  138. hw->type |= HW_BRK_TYPE_WRITE;
  139. if (hw->type == HW_BRK_TYPE_TRANSLATE)
  140. /* must set alteast read or write */
  141. return ret;
  142. if (!attr->exclude_user)
  143. hw->type |= HW_BRK_TYPE_USER;
  144. if (!attr->exclude_kernel)
  145. hw->type |= HW_BRK_TYPE_KERNEL;
  146. if (!attr->exclude_hv)
  147. hw->type |= HW_BRK_TYPE_HYP;
  148. hw->address = attr->bp_addr;
  149. hw->len = attr->bp_len;
  150. /*
  151. * Since breakpoint length can be a maximum of HW_BREAKPOINT_LEN(8)
  152. * and breakpoint addresses are aligned to nearest double-word
  153. * HW_BREAKPOINT_ALIGN by rounding off to the lower address, the
  154. * 'symbolsize' should satisfy the check below.
  155. */
  156. if (!ppc_breakpoint_available())
  157. return -ENODEV;
  158. length_max = 8; /* DABR */
  159. if (cpu_has_feature(CPU_FTR_DAWR)) {
  160. length_max = 512 ; /* 64 doublewords */
  161. /* DAWR region can't cross 512 boundary */
  162. if ((attr->bp_addr >> 9) !=
  163. ((attr->bp_addr + attr->bp_len - 1) >> 9))
  164. return -EINVAL;
  165. }
  166. if (hw->len >
  167. (length_max - (hw->address & HW_BREAKPOINT_ALIGN)))
  168. return -EINVAL;
  169. return 0;
  170. }
  171. /*
  172. * Restores the breakpoint on the debug registers.
  173. * Invoke this function if it is known that the execution context is
  174. * about to change to cause loss of MSR_SE settings.
  175. */
  176. void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs)
  177. {
  178. struct arch_hw_breakpoint *info;
  179. if (likely(!tsk->thread.last_hit_ubp))
  180. return;
  181. info = counter_arch_bp(tsk->thread.last_hit_ubp);
  182. regs->msr &= ~MSR_SE;
  183. __set_breakpoint(info);
  184. tsk->thread.last_hit_ubp = NULL;
  185. }
  186. /*
  187. * Handle debug exception notifications.
  188. */
  189. int hw_breakpoint_handler(struct die_args *args)
  190. {
  191. int rc = NOTIFY_STOP;
  192. struct perf_event *bp;
  193. struct pt_regs *regs = args->regs;
  194. #ifndef CONFIG_PPC_8xx
  195. int stepped = 1;
  196. unsigned int instr;
  197. #endif
  198. struct arch_hw_breakpoint *info;
  199. unsigned long dar = regs->dar;
  200. /* Disable breakpoints during exception handling */
  201. hw_breakpoint_disable();
  202. /*
  203. * The counter may be concurrently released but that can only
  204. * occur from a call_rcu() path. We can then safely fetch
  205. * the breakpoint, use its callback, touch its counter
  206. * while we are in an rcu_read_lock() path.
  207. */
  208. rcu_read_lock();
  209. bp = __this_cpu_read(bp_per_reg);
  210. if (!bp) {
  211. rc = NOTIFY_DONE;
  212. goto out;
  213. }
  214. info = counter_arch_bp(bp);
  215. /*
  216. * Return early after invoking user-callback function without restoring
  217. * DABR if the breakpoint is from ptrace which always operates in
  218. * one-shot mode. The ptrace-ed process will receive the SIGTRAP signal
  219. * generated in do_dabr().
  220. */
  221. if (bp->overflow_handler == ptrace_triggered) {
  222. perf_bp_event(bp, regs);
  223. rc = NOTIFY_DONE;
  224. goto out;
  225. }
  226. /*
  227. * Verify if dar lies within the address range occupied by the symbol
  228. * being watched to filter extraneous exceptions. If it doesn't,
  229. * we still need to single-step the instruction, but we don't
  230. * generate an event.
  231. */
  232. info->type &= ~HW_BRK_TYPE_EXTRANEOUS_IRQ;
  233. if (!((bp->attr.bp_addr <= dar) &&
  234. (dar - bp->attr.bp_addr < bp->attr.bp_len)))
  235. info->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ;
  236. #ifndef CONFIG_PPC_8xx
  237. /* Do not emulate user-space instructions, instead single-step them */
  238. if (user_mode(regs)) {
  239. current->thread.last_hit_ubp = bp;
  240. regs->msr |= MSR_SE;
  241. goto out;
  242. }
  243. stepped = 0;
  244. instr = 0;
  245. if (!__get_user_inatomic(instr, (unsigned int *) regs->nip))
  246. stepped = emulate_step(regs, instr);
  247. /*
  248. * emulate_step() could not execute it. We've failed in reliably
  249. * handling the hw-breakpoint. Unregister it and throw a warning
  250. * message to let the user know about it.
  251. */
  252. if (!stepped) {
  253. WARN(1, "Unable to handle hardware breakpoint. Breakpoint at "
  254. "0x%lx will be disabled.", info->address);
  255. perf_event_disable_inatomic(bp);
  256. goto out;
  257. }
  258. #endif
  259. /*
  260. * As a policy, the callback is invoked in a 'trigger-after-execute'
  261. * fashion
  262. */
  263. if (!(info->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))
  264. perf_bp_event(bp, regs);
  265. __set_breakpoint(info);
  266. out:
  267. rcu_read_unlock();
  268. return rc;
  269. }
  270. NOKPROBE_SYMBOL(hw_breakpoint_handler);
  271. /*
  272. * Handle single-step exceptions following a DABR hit.
  273. */
  274. static int single_step_dabr_instruction(struct die_args *args)
  275. {
  276. struct pt_regs *regs = args->regs;
  277. struct perf_event *bp = NULL;
  278. struct arch_hw_breakpoint *info;
  279. bp = current->thread.last_hit_ubp;
  280. /*
  281. * Check if we are single-stepping as a result of a
  282. * previous HW Breakpoint exception
  283. */
  284. if (!bp)
  285. return NOTIFY_DONE;
  286. info = counter_arch_bp(bp);
  287. /*
  288. * We shall invoke the user-defined callback function in the single
  289. * stepping handler to confirm to 'trigger-after-execute' semantics
  290. */
  291. if (!(info->type & HW_BRK_TYPE_EXTRANEOUS_IRQ))
  292. perf_bp_event(bp, regs);
  293. __set_breakpoint(info);
  294. current->thread.last_hit_ubp = NULL;
  295. /*
  296. * If the process was being single-stepped by ptrace, let the
  297. * other single-step actions occur (e.g. generate SIGTRAP).
  298. */
  299. if (test_thread_flag(TIF_SINGLESTEP))
  300. return NOTIFY_DONE;
  301. return NOTIFY_STOP;
  302. }
  303. NOKPROBE_SYMBOL(single_step_dabr_instruction);
  304. /*
  305. * Handle debug exception notifications.
  306. */
  307. int hw_breakpoint_exceptions_notify(
  308. struct notifier_block *unused, unsigned long val, void *data)
  309. {
  310. int ret = NOTIFY_DONE;
  311. switch (val) {
  312. case DIE_DABR_MATCH:
  313. ret = hw_breakpoint_handler(data);
  314. break;
  315. case DIE_SSTEP:
  316. ret = single_step_dabr_instruction(data);
  317. break;
  318. }
  319. return ret;
  320. }
  321. NOKPROBE_SYMBOL(hw_breakpoint_exceptions_notify);
  322. /*
  323. * Release the user breakpoints used by ptrace
  324. */
  325. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  326. {
  327. struct thread_struct *t = &tsk->thread;
  328. unregister_hw_breakpoint(t->ptrace_bps[0]);
  329. t->ptrace_bps[0] = NULL;
  330. }
  331. void hw_breakpoint_pmu_read(struct perf_event *bp)
  332. {
  333. /* TODO */
  334. }