marvell.c 57 KB

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  1. /*
  2. * drivers/net/phy/marvell.c
  3. *
  4. * Driver for Marvell PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/string.h>
  20. #include <linux/ctype.h>
  21. #include <linux/errno.h>
  22. #include <linux/unistd.h>
  23. #include <linux/hwmon.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/init.h>
  26. #include <linux/delay.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/mm.h>
  32. #include <linux/module.h>
  33. #include <linux/mii.h>
  34. #include <linux/ethtool.h>
  35. #include <linux/phy.h>
  36. #include <linux/marvell_phy.h>
  37. #include <linux/of.h>
  38. #include <linux/io.h>
  39. #include <asm/irq.h>
  40. #include <linux/uaccess.h>
  41. #define MII_MARVELL_PHY_PAGE 22
  42. #define MII_MARVELL_COPPER_PAGE 0x00
  43. #define MII_MARVELL_FIBER_PAGE 0x01
  44. #define MII_MARVELL_MSCR_PAGE 0x02
  45. #define MII_MARVELL_LED_PAGE 0x03
  46. #define MII_MARVELL_MISC_TEST_PAGE 0x06
  47. #define MII_MARVELL_WOL_PAGE 0x11
  48. #define MII_M1011_IEVENT 0x13
  49. #define MII_M1011_IEVENT_CLEAR 0x0000
  50. #define MII_M1011_IMASK 0x12
  51. #define MII_M1011_IMASK_INIT 0x6400
  52. #define MII_M1011_IMASK_CLEAR 0x0000
  53. #define MII_M1011_PHY_SCR 0x10
  54. #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
  55. #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
  56. #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
  57. #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
  58. #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
  59. #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
  60. #define MII_M1111_PHY_LED_CONTROL 0x18
  61. #define MII_M1111_PHY_LED_DIRECT 0x4100
  62. #define MII_M1111_PHY_LED_COMBINE 0x411c
  63. #define MII_M1111_PHY_EXT_CR 0x14
  64. #define MII_M1111_RGMII_RX_DELAY BIT(7)
  65. #define MII_M1111_RGMII_TX_DELAY BIT(1)
  66. #define MII_M1111_PHY_EXT_SR 0x1b
  67. #define MII_M1111_HWCFG_MODE_MASK 0xf
  68. #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
  69. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  70. #define MII_M1111_HWCFG_MODE_RTBI 0x7
  71. #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
  72. #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
  73. #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
  74. #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
  75. #define MII_88E1121_PHY_MSCR_REG 21
  76. #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
  77. #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
  78. #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
  79. #define MII_88E1121_MISC_TEST 0x1a
  80. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
  81. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
  82. #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
  83. #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
  84. #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
  85. #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
  86. #define MII_88E1510_TEMP_SENSOR 0x1b
  87. #define MII_88E1510_TEMP_SENSOR_MASK 0xff
  88. #define MII_88E6390_MISC_TEST 0x1b
  89. #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
  90. #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
  91. #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
  92. #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
  93. #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
  94. #define MII_88E6390_TEMP_SENSOR 0x1c
  95. #define MII_88E6390_TEMP_SENSOR_MASK 0xff
  96. #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
  97. #define MII_88E1318S_PHY_MSCR1_REG 16
  98. #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
  99. /* Copper Specific Interrupt Enable Register */
  100. #define MII_88E1318S_PHY_CSIER 0x12
  101. /* WOL Event Interrupt Enable */
  102. #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
  103. /* LED Timer Control Register */
  104. #define MII_88E1318S_PHY_LED_TCR 0x12
  105. #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
  106. #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
  107. #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
  108. /* Magic Packet MAC address registers */
  109. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
  110. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
  111. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
  112. #define MII_88E1318S_PHY_WOL_CTRL 0x10
  113. #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
  114. #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
  115. #define MII_PHY_LED_CTRL 16
  116. #define MII_88E1121_PHY_LED_DEF 0x0030
  117. #define MII_88E1510_PHY_LED_DEF 0x1177
  118. #define MII_M1011_PHY_STATUS 0x11
  119. #define MII_M1011_PHY_STATUS_1000 0x8000
  120. #define MII_M1011_PHY_STATUS_100 0x4000
  121. #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
  122. #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  123. #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
  124. #define MII_M1011_PHY_STATUS_LINK 0x0400
  125. #define MII_88E3016_PHY_SPEC_CTRL 0x10
  126. #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
  127. #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
  128. #define MII_88E1510_GEN_CTRL_REG_1 0x14
  129. #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
  130. #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
  131. #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
  132. #define LPA_FIBER_1000HALF 0x40
  133. #define LPA_FIBER_1000FULL 0x20
  134. #define LPA_PAUSE_FIBER 0x180
  135. #define LPA_PAUSE_ASYM_FIBER 0x100
  136. #define ADVERTISE_FIBER_1000HALF 0x40
  137. #define ADVERTISE_FIBER_1000FULL 0x20
  138. #define ADVERTISE_PAUSE_FIBER 0x180
  139. #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
  140. #define REGISTER_LINK_STATUS 0x400
  141. #define NB_FIBER_STATS 1
  142. MODULE_DESCRIPTION("Marvell PHY driver");
  143. MODULE_AUTHOR("Andy Fleming");
  144. MODULE_LICENSE("GPL");
  145. struct marvell_hw_stat {
  146. const char *string;
  147. u8 page;
  148. u8 reg;
  149. u8 bits;
  150. };
  151. static struct marvell_hw_stat marvell_hw_stats[] = {
  152. { "phy_receive_errors_copper", 0, 21, 16},
  153. { "phy_idle_errors", 0, 10, 8 },
  154. { "phy_receive_errors_fiber", 1, 21, 16},
  155. };
  156. struct marvell_priv {
  157. u64 stats[ARRAY_SIZE(marvell_hw_stats)];
  158. char *hwmon_name;
  159. struct device *hwmon_dev;
  160. };
  161. static int marvell_read_page(struct phy_device *phydev)
  162. {
  163. return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
  164. }
  165. static int marvell_write_page(struct phy_device *phydev, int page)
  166. {
  167. return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  168. }
  169. static int marvell_set_page(struct phy_device *phydev, int page)
  170. {
  171. return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  172. }
  173. static int marvell_ack_interrupt(struct phy_device *phydev)
  174. {
  175. int err;
  176. /* Clear the interrupts by reading the reg */
  177. err = phy_read(phydev, MII_M1011_IEVENT);
  178. if (err < 0)
  179. return err;
  180. return 0;
  181. }
  182. static int marvell_config_intr(struct phy_device *phydev)
  183. {
  184. int err;
  185. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  186. err = phy_write(phydev, MII_M1011_IMASK,
  187. MII_M1011_IMASK_INIT);
  188. else
  189. err = phy_write(phydev, MII_M1011_IMASK,
  190. MII_M1011_IMASK_CLEAR);
  191. return err;
  192. }
  193. static int marvell_set_polarity(struct phy_device *phydev, int polarity)
  194. {
  195. int reg;
  196. int err;
  197. int val;
  198. /* get the current settings */
  199. reg = phy_read(phydev, MII_M1011_PHY_SCR);
  200. if (reg < 0)
  201. return reg;
  202. val = reg;
  203. val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
  204. switch (polarity) {
  205. case ETH_TP_MDI:
  206. val |= MII_M1011_PHY_SCR_MDI;
  207. break;
  208. case ETH_TP_MDI_X:
  209. val |= MII_M1011_PHY_SCR_MDI_X;
  210. break;
  211. case ETH_TP_MDI_AUTO:
  212. case ETH_TP_MDI_INVALID:
  213. default:
  214. val |= MII_M1011_PHY_SCR_AUTO_CROSS;
  215. break;
  216. }
  217. if (val != reg) {
  218. /* Set the new polarity value in the register */
  219. err = phy_write(phydev, MII_M1011_PHY_SCR, val);
  220. if (err)
  221. return err;
  222. }
  223. return 0;
  224. }
  225. static int marvell_set_downshift(struct phy_device *phydev, bool enable,
  226. u8 retries)
  227. {
  228. int reg;
  229. reg = phy_read(phydev, MII_M1011_PHY_SCR);
  230. if (reg < 0)
  231. return reg;
  232. reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
  233. reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
  234. if (enable)
  235. reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
  236. return phy_write(phydev, MII_M1011_PHY_SCR, reg);
  237. }
  238. static int marvell_config_aneg(struct phy_device *phydev)
  239. {
  240. int err;
  241. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  242. if (err < 0)
  243. return err;
  244. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  245. MII_M1111_PHY_LED_DIRECT);
  246. if (err < 0)
  247. return err;
  248. err = genphy_config_aneg(phydev);
  249. if (err < 0)
  250. return err;
  251. if (phydev->autoneg != AUTONEG_ENABLE) {
  252. /* A write to speed/duplex bits (that is performed by
  253. * genphy_config_aneg() call above) must be followed by
  254. * a software reset. Otherwise, the write has no effect.
  255. */
  256. err = genphy_soft_reset(phydev);
  257. if (err < 0)
  258. return err;
  259. }
  260. return 0;
  261. }
  262. static int m88e1101_config_aneg(struct phy_device *phydev)
  263. {
  264. int err;
  265. /* This Marvell PHY has an errata which requires
  266. * that certain registers get written in order
  267. * to restart autonegotiation
  268. */
  269. err = genphy_soft_reset(phydev);
  270. if (err < 0)
  271. return err;
  272. err = phy_write(phydev, 0x1d, 0x1f);
  273. if (err < 0)
  274. return err;
  275. err = phy_write(phydev, 0x1e, 0x200c);
  276. if (err < 0)
  277. return err;
  278. err = phy_write(phydev, 0x1d, 0x5);
  279. if (err < 0)
  280. return err;
  281. err = phy_write(phydev, 0x1e, 0);
  282. if (err < 0)
  283. return err;
  284. err = phy_write(phydev, 0x1e, 0x100);
  285. if (err < 0)
  286. return err;
  287. return marvell_config_aneg(phydev);
  288. }
  289. static int m88e1111_config_aneg(struct phy_device *phydev)
  290. {
  291. int err;
  292. /* The Marvell PHY has an errata which requires
  293. * that certain registers get written in order
  294. * to restart autonegotiation
  295. */
  296. err = genphy_soft_reset(phydev);
  297. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  298. if (err < 0)
  299. return err;
  300. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  301. MII_M1111_PHY_LED_DIRECT);
  302. if (err < 0)
  303. return err;
  304. err = genphy_config_aneg(phydev);
  305. if (err < 0)
  306. return err;
  307. if (phydev->autoneg != AUTONEG_ENABLE) {
  308. /* A write to speed/duplex bits (that is performed by
  309. * genphy_config_aneg() call above) must be followed by
  310. * a software reset. Otherwise, the write has no effect.
  311. */
  312. err = genphy_soft_reset(phydev);
  313. if (err < 0)
  314. return err;
  315. }
  316. return 0;
  317. }
  318. #ifdef CONFIG_OF_MDIO
  319. /* Set and/or override some configuration registers based on the
  320. * marvell,reg-init property stored in the of_node for the phydev.
  321. *
  322. * marvell,reg-init = <reg-page reg mask value>,...;
  323. *
  324. * There may be one or more sets of <reg-page reg mask value>:
  325. *
  326. * reg-page: which register bank to use.
  327. * reg: the register.
  328. * mask: if non-zero, ANDed with existing register value.
  329. * value: ORed with the masked value and written to the regiser.
  330. *
  331. */
  332. static int marvell_of_reg_init(struct phy_device *phydev)
  333. {
  334. const __be32 *paddr;
  335. int len, i, saved_page, current_page, ret = 0;
  336. if (!phydev->mdio.dev.of_node)
  337. return 0;
  338. paddr = of_get_property(phydev->mdio.dev.of_node,
  339. "marvell,reg-init", &len);
  340. if (!paddr || len < (4 * sizeof(*paddr)))
  341. return 0;
  342. saved_page = phy_save_page(phydev);
  343. if (saved_page < 0)
  344. goto err;
  345. current_page = saved_page;
  346. len /= sizeof(*paddr);
  347. for (i = 0; i < len - 3; i += 4) {
  348. u16 page = be32_to_cpup(paddr + i);
  349. u16 reg = be32_to_cpup(paddr + i + 1);
  350. u16 mask = be32_to_cpup(paddr + i + 2);
  351. u16 val_bits = be32_to_cpup(paddr + i + 3);
  352. int val;
  353. if (page != current_page) {
  354. current_page = page;
  355. ret = marvell_write_page(phydev, page);
  356. if (ret < 0)
  357. goto err;
  358. }
  359. val = 0;
  360. if (mask) {
  361. val = __phy_read(phydev, reg);
  362. if (val < 0) {
  363. ret = val;
  364. goto err;
  365. }
  366. val &= mask;
  367. }
  368. val |= val_bits;
  369. ret = __phy_write(phydev, reg, val);
  370. if (ret < 0)
  371. goto err;
  372. }
  373. err:
  374. return phy_restore_page(phydev, saved_page, ret);
  375. }
  376. #else
  377. static int marvell_of_reg_init(struct phy_device *phydev)
  378. {
  379. return 0;
  380. }
  381. #endif /* CONFIG_OF_MDIO */
  382. static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
  383. {
  384. int mscr;
  385. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
  386. mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
  387. MII_88E1121_PHY_MSCR_TX_DELAY;
  388. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
  389. mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
  390. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
  391. mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
  392. else
  393. mscr = 0;
  394. return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  395. MII_88E1121_PHY_MSCR_REG,
  396. MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
  397. }
  398. static int m88e1121_config_aneg(struct phy_device *phydev)
  399. {
  400. int err = 0;
  401. if (phy_interface_is_rgmii(phydev)) {
  402. err = m88e1121_config_aneg_rgmii_delays(phydev);
  403. if (err < 0)
  404. return err;
  405. }
  406. err = genphy_soft_reset(phydev);
  407. if (err < 0)
  408. return err;
  409. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  410. if (err < 0)
  411. return err;
  412. return genphy_config_aneg(phydev);
  413. }
  414. static int m88e1318_config_aneg(struct phy_device *phydev)
  415. {
  416. int err;
  417. err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  418. MII_88E1318S_PHY_MSCR1_REG,
  419. 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
  420. if (err < 0)
  421. return err;
  422. return m88e1121_config_aneg(phydev);
  423. }
  424. /**
  425. * ethtool_adv_to_fiber_adv_t
  426. * @ethadv: the ethtool advertisement settings
  427. *
  428. * A small helper function that translates ethtool advertisement
  429. * settings to phy autonegotiation advertisements for the
  430. * MII_ADV register for fiber link.
  431. */
  432. static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
  433. {
  434. u32 result = 0;
  435. if (ethadv & ADVERTISED_1000baseT_Half)
  436. result |= ADVERTISE_FIBER_1000HALF;
  437. if (ethadv & ADVERTISED_1000baseT_Full)
  438. result |= ADVERTISE_FIBER_1000FULL;
  439. if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
  440. result |= LPA_PAUSE_ASYM_FIBER;
  441. else if (ethadv & ADVERTISE_PAUSE_CAP)
  442. result |= (ADVERTISE_PAUSE_FIBER
  443. & (~ADVERTISE_PAUSE_ASYM_FIBER));
  444. return result;
  445. }
  446. /**
  447. * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
  448. * @phydev: target phy_device struct
  449. *
  450. * Description: If auto-negotiation is enabled, we configure the
  451. * advertising, and then restart auto-negotiation. If it is not
  452. * enabled, then we write the BMCR. Adapted for fiber link in
  453. * some Marvell's devices.
  454. */
  455. static int marvell_config_aneg_fiber(struct phy_device *phydev)
  456. {
  457. int changed = 0;
  458. int err;
  459. int adv, oldadv;
  460. u32 advertise;
  461. if (phydev->autoneg != AUTONEG_ENABLE)
  462. return genphy_setup_forced(phydev);
  463. /* Only allow advertising what this PHY supports */
  464. phydev->advertising &= phydev->supported;
  465. advertise = phydev->advertising;
  466. /* Setup fiber advertisement */
  467. adv = phy_read(phydev, MII_ADVERTISE);
  468. if (adv < 0)
  469. return adv;
  470. oldadv = adv;
  471. adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
  472. | LPA_PAUSE_FIBER);
  473. adv |= ethtool_adv_to_fiber_adv_t(advertise);
  474. if (adv != oldadv) {
  475. err = phy_write(phydev, MII_ADVERTISE, adv);
  476. if (err < 0)
  477. return err;
  478. changed = 1;
  479. }
  480. if (changed == 0) {
  481. /* Advertisement hasn't changed, but maybe aneg was never on to
  482. * begin with? Or maybe phy was isolated?
  483. */
  484. int ctl = phy_read(phydev, MII_BMCR);
  485. if (ctl < 0)
  486. return ctl;
  487. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  488. changed = 1; /* do restart aneg */
  489. }
  490. /* Only restart aneg if we are advertising something different
  491. * than we were before.
  492. */
  493. if (changed > 0)
  494. changed = genphy_restart_aneg(phydev);
  495. return changed;
  496. }
  497. static int m88e1510_config_aneg(struct phy_device *phydev)
  498. {
  499. int err;
  500. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  501. if (err < 0)
  502. goto error;
  503. /* Configure the copper link first */
  504. err = m88e1318_config_aneg(phydev);
  505. if (err < 0)
  506. goto error;
  507. /* Do not touch the fiber page if we're in copper->sgmii mode */
  508. if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
  509. return 0;
  510. /* Then the fiber link */
  511. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  512. if (err < 0)
  513. goto error;
  514. err = marvell_config_aneg_fiber(phydev);
  515. if (err < 0)
  516. goto error;
  517. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  518. error:
  519. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  520. return err;
  521. }
  522. static void marvell_config_led(struct phy_device *phydev)
  523. {
  524. u16 def_config;
  525. int err;
  526. switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
  527. /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
  528. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
  529. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
  530. def_config = MII_88E1121_PHY_LED_DEF;
  531. break;
  532. /* Default PHY LED config:
  533. * LED[0] .. 1000Mbps Link
  534. * LED[1] .. 100Mbps Link
  535. * LED[2] .. Blink, Activity
  536. */
  537. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
  538. def_config = MII_88E1510_PHY_LED_DEF;
  539. break;
  540. default:
  541. return;
  542. }
  543. err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
  544. def_config);
  545. if (err < 0)
  546. pr_warn("Fail to config marvell phy LED.\n");
  547. }
  548. static int marvell_config_init(struct phy_device *phydev)
  549. {
  550. /* Set defalut LED */
  551. marvell_config_led(phydev);
  552. /* Set registers from marvell,reg-init DT property */
  553. return marvell_of_reg_init(phydev);
  554. }
  555. static int m88e1116r_config_init(struct phy_device *phydev)
  556. {
  557. int err;
  558. err = genphy_soft_reset(phydev);
  559. if (err < 0)
  560. return err;
  561. msleep(500);
  562. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  563. if (err < 0)
  564. return err;
  565. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  566. if (err < 0)
  567. return err;
  568. err = marvell_set_downshift(phydev, true, 8);
  569. if (err < 0)
  570. return err;
  571. if (phy_interface_is_rgmii(phydev)) {
  572. err = m88e1121_config_aneg_rgmii_delays(phydev);
  573. if (err < 0)
  574. return err;
  575. }
  576. err = genphy_soft_reset(phydev);
  577. if (err < 0)
  578. return err;
  579. return marvell_config_init(phydev);
  580. }
  581. static int m88e3016_config_init(struct phy_device *phydev)
  582. {
  583. int ret;
  584. /* Enable Scrambler and Auto-Crossover */
  585. ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
  586. MII_88E3016_DISABLE_SCRAMBLER,
  587. MII_88E3016_AUTO_MDIX_CROSSOVER);
  588. if (ret < 0)
  589. return ret;
  590. return marvell_config_init(phydev);
  591. }
  592. static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
  593. u16 mode,
  594. int fibre_copper_auto)
  595. {
  596. if (fibre_copper_auto)
  597. mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
  598. return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
  599. MII_M1111_HWCFG_MODE_MASK |
  600. MII_M1111_HWCFG_FIBER_COPPER_AUTO |
  601. MII_M1111_HWCFG_FIBER_COPPER_RES,
  602. mode);
  603. }
  604. static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
  605. {
  606. int delay;
  607. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  608. delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
  609. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
  610. delay = MII_M1111_RGMII_RX_DELAY;
  611. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
  612. delay = MII_M1111_RGMII_TX_DELAY;
  613. } else {
  614. delay = 0;
  615. }
  616. return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
  617. MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
  618. delay);
  619. }
  620. static int m88e1111_config_init_rgmii(struct phy_device *phydev)
  621. {
  622. int temp;
  623. int err;
  624. err = m88e1111_config_init_rgmii_delays(phydev);
  625. if (err < 0)
  626. return err;
  627. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  628. if (temp < 0)
  629. return temp;
  630. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  631. if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
  632. temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
  633. else
  634. temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
  635. return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  636. }
  637. static int m88e1111_config_init_sgmii(struct phy_device *phydev)
  638. {
  639. int err;
  640. err = m88e1111_config_init_hwcfg_mode(
  641. phydev,
  642. MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  643. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  644. if (err < 0)
  645. return err;
  646. /* make sure copper is selected */
  647. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  648. }
  649. static int m88e1111_config_init_rtbi(struct phy_device *phydev)
  650. {
  651. int err;
  652. err = m88e1111_config_init_rgmii_delays(phydev);
  653. if (err < 0)
  654. return err;
  655. err = m88e1111_config_init_hwcfg_mode(
  656. phydev,
  657. MII_M1111_HWCFG_MODE_RTBI,
  658. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  659. if (err < 0)
  660. return err;
  661. /* soft reset */
  662. err = genphy_soft_reset(phydev);
  663. if (err < 0)
  664. return err;
  665. return m88e1111_config_init_hwcfg_mode(
  666. phydev,
  667. MII_M1111_HWCFG_MODE_RTBI,
  668. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  669. }
  670. static int m88e1111_config_init(struct phy_device *phydev)
  671. {
  672. int err;
  673. if (phy_interface_is_rgmii(phydev)) {
  674. err = m88e1111_config_init_rgmii(phydev);
  675. if (err < 0)
  676. return err;
  677. }
  678. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  679. err = m88e1111_config_init_sgmii(phydev);
  680. if (err < 0)
  681. return err;
  682. }
  683. if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
  684. err = m88e1111_config_init_rtbi(phydev);
  685. if (err < 0)
  686. return err;
  687. }
  688. err = marvell_of_reg_init(phydev);
  689. if (err < 0)
  690. return err;
  691. return genphy_soft_reset(phydev);
  692. }
  693. static int m88e1318_config_init(struct phy_device *phydev)
  694. {
  695. if (phy_interrupt_is_valid(phydev)) {
  696. int err = phy_modify_paged(
  697. phydev, MII_MARVELL_LED_PAGE,
  698. MII_88E1318S_PHY_LED_TCR,
  699. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  700. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  701. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  702. if (err < 0)
  703. return err;
  704. }
  705. return marvell_config_init(phydev);
  706. }
  707. static int m88e1510_config_init(struct phy_device *phydev)
  708. {
  709. int err;
  710. /* SGMII-to-Copper mode initialization */
  711. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  712. /* Select page 18 */
  713. err = marvell_set_page(phydev, 18);
  714. if (err < 0)
  715. return err;
  716. /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
  717. err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  718. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
  719. MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
  720. if (err < 0)
  721. return err;
  722. /* PHY reset is necessary after changing MODE[2:0] */
  723. err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
  724. MII_88E1510_GEN_CTRL_REG_1_RESET);
  725. if (err < 0)
  726. return err;
  727. /* Reset page selection */
  728. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  729. if (err < 0)
  730. return err;
  731. }
  732. return m88e1318_config_init(phydev);
  733. }
  734. static int m88e1118_config_aneg(struct phy_device *phydev)
  735. {
  736. int err;
  737. err = genphy_soft_reset(phydev);
  738. if (err < 0)
  739. return err;
  740. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  741. if (err < 0)
  742. return err;
  743. err = genphy_config_aneg(phydev);
  744. return 0;
  745. }
  746. static int m88e1118_config_init(struct phy_device *phydev)
  747. {
  748. int err;
  749. /* Change address */
  750. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  751. if (err < 0)
  752. return err;
  753. /* Enable 1000 Mbit */
  754. err = phy_write(phydev, 0x15, 0x1070);
  755. if (err < 0)
  756. return err;
  757. /* Change address */
  758. err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
  759. if (err < 0)
  760. return err;
  761. /* Adjust LED Control */
  762. if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
  763. err = phy_write(phydev, 0x10, 0x1100);
  764. else
  765. err = phy_write(phydev, 0x10, 0x021e);
  766. if (err < 0)
  767. return err;
  768. err = marvell_of_reg_init(phydev);
  769. if (err < 0)
  770. return err;
  771. /* Reset address */
  772. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  773. if (err < 0)
  774. return err;
  775. return genphy_soft_reset(phydev);
  776. }
  777. static int m88e1149_config_init(struct phy_device *phydev)
  778. {
  779. int err;
  780. /* Change address */
  781. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  782. if (err < 0)
  783. return err;
  784. /* Enable 1000 Mbit */
  785. err = phy_write(phydev, 0x15, 0x1048);
  786. if (err < 0)
  787. return err;
  788. err = marvell_of_reg_init(phydev);
  789. if (err < 0)
  790. return err;
  791. /* Reset address */
  792. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  793. if (err < 0)
  794. return err;
  795. return genphy_soft_reset(phydev);
  796. }
  797. static int m88e1145_config_init_rgmii(struct phy_device *phydev)
  798. {
  799. int err;
  800. err = m88e1111_config_init_rgmii_delays(phydev);
  801. if (err < 0)
  802. return err;
  803. if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
  804. err = phy_write(phydev, 0x1d, 0x0012);
  805. if (err < 0)
  806. return err;
  807. err = phy_modify(phydev, 0x1e, 0x0fc0,
  808. 2 << 9 | /* 36 ohm */
  809. 2 << 6); /* 39 ohm */
  810. if (err < 0)
  811. return err;
  812. err = phy_write(phydev, 0x1d, 0x3);
  813. if (err < 0)
  814. return err;
  815. err = phy_write(phydev, 0x1e, 0x8000);
  816. }
  817. return err;
  818. }
  819. static int m88e1145_config_init_sgmii(struct phy_device *phydev)
  820. {
  821. return m88e1111_config_init_hwcfg_mode(
  822. phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  823. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  824. }
  825. static int m88e1145_config_init(struct phy_device *phydev)
  826. {
  827. int err;
  828. /* Take care of errata E0 & E1 */
  829. err = phy_write(phydev, 0x1d, 0x001b);
  830. if (err < 0)
  831. return err;
  832. err = phy_write(phydev, 0x1e, 0x418f);
  833. if (err < 0)
  834. return err;
  835. err = phy_write(phydev, 0x1d, 0x0016);
  836. if (err < 0)
  837. return err;
  838. err = phy_write(phydev, 0x1e, 0xa2da);
  839. if (err < 0)
  840. return err;
  841. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  842. err = m88e1145_config_init_rgmii(phydev);
  843. if (err < 0)
  844. return err;
  845. }
  846. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  847. err = m88e1145_config_init_sgmii(phydev);
  848. if (err < 0)
  849. return err;
  850. }
  851. err = marvell_of_reg_init(phydev);
  852. if (err < 0)
  853. return err;
  854. return 0;
  855. }
  856. /* The VOD can be out of specification on link up. Poke an
  857. * undocumented register, in an undocumented page, with a magic value
  858. * to fix this.
  859. */
  860. static int m88e6390_errata(struct phy_device *phydev)
  861. {
  862. int err;
  863. err = phy_write(phydev, MII_BMCR,
  864. BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
  865. if (err)
  866. return err;
  867. usleep_range(300, 400);
  868. err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
  869. if (err)
  870. return err;
  871. return genphy_soft_reset(phydev);
  872. }
  873. static int m88e6390_config_aneg(struct phy_device *phydev)
  874. {
  875. int err;
  876. err = m88e6390_errata(phydev);
  877. if (err)
  878. return err;
  879. return m88e1510_config_aneg(phydev);
  880. }
  881. /**
  882. * fiber_lpa_to_ethtool_lpa_t
  883. * @lpa: value of the MII_LPA register for fiber link
  884. *
  885. * A small helper function that translates MII_LPA
  886. * bits to ethtool LP advertisement settings.
  887. */
  888. static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
  889. {
  890. u32 result = 0;
  891. if (lpa & LPA_FIBER_1000HALF)
  892. result |= ADVERTISED_1000baseT_Half;
  893. if (lpa & LPA_FIBER_1000FULL)
  894. result |= ADVERTISED_1000baseT_Full;
  895. return result;
  896. }
  897. /**
  898. * marvell_update_link - update link status in real time in @phydev
  899. * @phydev: target phy_device struct
  900. *
  901. * Description: Update the value in phydev->link to reflect the
  902. * current link value.
  903. */
  904. static int marvell_update_link(struct phy_device *phydev, int fiber)
  905. {
  906. int status;
  907. /* Use the generic register for copper link, or specific
  908. * register for fiber case
  909. */
  910. if (fiber) {
  911. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  912. if (status < 0)
  913. return status;
  914. if ((status & REGISTER_LINK_STATUS) == 0)
  915. phydev->link = 0;
  916. else
  917. phydev->link = 1;
  918. } else {
  919. return genphy_update_link(phydev);
  920. }
  921. return 0;
  922. }
  923. static int marvell_read_status_page_an(struct phy_device *phydev,
  924. int fiber)
  925. {
  926. int status;
  927. int lpa;
  928. int lpagb;
  929. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  930. if (status < 0)
  931. return status;
  932. lpa = phy_read(phydev, MII_LPA);
  933. if (lpa < 0)
  934. return lpa;
  935. lpagb = phy_read(phydev, MII_STAT1000);
  936. if (lpagb < 0)
  937. return lpagb;
  938. if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
  939. phydev->duplex = DUPLEX_FULL;
  940. else
  941. phydev->duplex = DUPLEX_HALF;
  942. status = status & MII_M1011_PHY_STATUS_SPD_MASK;
  943. phydev->pause = 0;
  944. phydev->asym_pause = 0;
  945. switch (status) {
  946. case MII_M1011_PHY_STATUS_1000:
  947. phydev->speed = SPEED_1000;
  948. break;
  949. case MII_M1011_PHY_STATUS_100:
  950. phydev->speed = SPEED_100;
  951. break;
  952. default:
  953. phydev->speed = SPEED_10;
  954. break;
  955. }
  956. if (!fiber) {
  957. phydev->lp_advertising =
  958. mii_stat1000_to_ethtool_lpa_t(lpagb) |
  959. mii_lpa_to_ethtool_lpa_t(lpa);
  960. if (phydev->duplex == DUPLEX_FULL) {
  961. phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
  962. phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
  963. }
  964. } else {
  965. /* The fiber link is only 1000M capable */
  966. phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
  967. if (phydev->duplex == DUPLEX_FULL) {
  968. if (!(lpa & LPA_PAUSE_FIBER)) {
  969. phydev->pause = 0;
  970. phydev->asym_pause = 0;
  971. } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
  972. phydev->pause = 1;
  973. phydev->asym_pause = 1;
  974. } else {
  975. phydev->pause = 1;
  976. phydev->asym_pause = 0;
  977. }
  978. }
  979. }
  980. return 0;
  981. }
  982. static int marvell_read_status_page_fixed(struct phy_device *phydev)
  983. {
  984. int bmcr = phy_read(phydev, MII_BMCR);
  985. if (bmcr < 0)
  986. return bmcr;
  987. if (bmcr & BMCR_FULLDPLX)
  988. phydev->duplex = DUPLEX_FULL;
  989. else
  990. phydev->duplex = DUPLEX_HALF;
  991. if (bmcr & BMCR_SPEED1000)
  992. phydev->speed = SPEED_1000;
  993. else if (bmcr & BMCR_SPEED100)
  994. phydev->speed = SPEED_100;
  995. else
  996. phydev->speed = SPEED_10;
  997. phydev->pause = 0;
  998. phydev->asym_pause = 0;
  999. phydev->lp_advertising = 0;
  1000. return 0;
  1001. }
  1002. /* marvell_read_status_page
  1003. *
  1004. * Description:
  1005. * Check the link, then figure out the current state
  1006. * by comparing what we advertise with what the link partner
  1007. * advertises. Start by checking the gigabit possibilities,
  1008. * then move on to 10/100.
  1009. */
  1010. static int marvell_read_status_page(struct phy_device *phydev, int page)
  1011. {
  1012. int fiber;
  1013. int err;
  1014. /* Detect and update the link, but return if there
  1015. * was an error
  1016. */
  1017. if (page == MII_MARVELL_FIBER_PAGE)
  1018. fiber = 1;
  1019. else
  1020. fiber = 0;
  1021. err = marvell_update_link(phydev, fiber);
  1022. if (err)
  1023. return err;
  1024. if (phydev->autoneg == AUTONEG_ENABLE)
  1025. err = marvell_read_status_page_an(phydev, fiber);
  1026. else
  1027. err = marvell_read_status_page_fixed(phydev);
  1028. return err;
  1029. }
  1030. /* marvell_read_status
  1031. *
  1032. * Some Marvell's phys have two modes: fiber and copper.
  1033. * Both need status checked.
  1034. * Description:
  1035. * First, check the fiber link and status.
  1036. * If the fiber link is down, check the copper link and status which
  1037. * will be the default value if both link are down.
  1038. */
  1039. static int marvell_read_status(struct phy_device *phydev)
  1040. {
  1041. int err;
  1042. /* Check the fiber mode first */
  1043. if (phydev->supported & SUPPORTED_FIBRE &&
  1044. phydev->interface != PHY_INTERFACE_MODE_SGMII) {
  1045. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1046. if (err < 0)
  1047. goto error;
  1048. err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
  1049. if (err < 0)
  1050. goto error;
  1051. /* If the fiber link is up, it is the selected and
  1052. * used link. In this case, we need to stay in the
  1053. * fiber page. Please to be careful about that, avoid
  1054. * to restore Copper page in other functions which
  1055. * could break the behaviour for some fiber phy like
  1056. * 88E1512.
  1057. */
  1058. if (phydev->link)
  1059. return 0;
  1060. /* If fiber link is down, check and save copper mode state */
  1061. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1062. if (err < 0)
  1063. goto error;
  1064. }
  1065. return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
  1066. error:
  1067. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1068. return err;
  1069. }
  1070. /* marvell_suspend
  1071. *
  1072. * Some Marvell's phys have two modes: fiber and copper.
  1073. * Both need to be suspended
  1074. */
  1075. static int marvell_suspend(struct phy_device *phydev)
  1076. {
  1077. int err;
  1078. /* Suspend the fiber mode first */
  1079. if (!(phydev->supported & SUPPORTED_FIBRE)) {
  1080. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1081. if (err < 0)
  1082. goto error;
  1083. /* With the page set, use the generic suspend */
  1084. err = genphy_suspend(phydev);
  1085. if (err < 0)
  1086. goto error;
  1087. /* Then, the copper link */
  1088. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1089. if (err < 0)
  1090. goto error;
  1091. }
  1092. /* With the page set, use the generic suspend */
  1093. return genphy_suspend(phydev);
  1094. error:
  1095. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1096. return err;
  1097. }
  1098. /* marvell_resume
  1099. *
  1100. * Some Marvell's phys have two modes: fiber and copper.
  1101. * Both need to be resumed
  1102. */
  1103. static int marvell_resume(struct phy_device *phydev)
  1104. {
  1105. int err;
  1106. /* Resume the fiber mode first */
  1107. if (!(phydev->supported & SUPPORTED_FIBRE)) {
  1108. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1109. if (err < 0)
  1110. goto error;
  1111. /* With the page set, use the generic resume */
  1112. err = genphy_resume(phydev);
  1113. if (err < 0)
  1114. goto error;
  1115. /* Then, the copper link */
  1116. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1117. if (err < 0)
  1118. goto error;
  1119. }
  1120. /* With the page set, use the generic resume */
  1121. return genphy_resume(phydev);
  1122. error:
  1123. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1124. return err;
  1125. }
  1126. static int marvell_aneg_done(struct phy_device *phydev)
  1127. {
  1128. int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
  1129. return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
  1130. }
  1131. static int m88e1121_did_interrupt(struct phy_device *phydev)
  1132. {
  1133. int imask;
  1134. imask = phy_read(phydev, MII_M1011_IEVENT);
  1135. if (imask & MII_M1011_IMASK_INIT)
  1136. return 1;
  1137. return 0;
  1138. }
  1139. static void m88e1318_get_wol(struct phy_device *phydev,
  1140. struct ethtool_wolinfo *wol)
  1141. {
  1142. int oldpage, ret = 0;
  1143. wol->supported = WAKE_MAGIC;
  1144. wol->wolopts = 0;
  1145. oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
  1146. if (oldpage < 0)
  1147. goto error;
  1148. ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
  1149. if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
  1150. wol->wolopts |= WAKE_MAGIC;
  1151. error:
  1152. phy_restore_page(phydev, oldpage, ret);
  1153. }
  1154. static int m88e1318_set_wol(struct phy_device *phydev,
  1155. struct ethtool_wolinfo *wol)
  1156. {
  1157. int err = 0, oldpage;
  1158. oldpage = phy_save_page(phydev);
  1159. if (oldpage < 0)
  1160. goto error;
  1161. if (wol->wolopts & WAKE_MAGIC) {
  1162. /* Explicitly switch to page 0x00, just to be sure */
  1163. err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
  1164. if (err < 0)
  1165. goto error;
  1166. /* If WOL event happened once, the LED[2] interrupt pin
  1167. * will not be cleared unless we reading the interrupt status
  1168. * register. If interrupts are in use, the normal interrupt
  1169. * handling will clear the WOL event. Clear the WOL event
  1170. * before enabling it if !phy_interrupt_is_valid()
  1171. */
  1172. if (!phy_interrupt_is_valid(phydev))
  1173. __phy_read(phydev, MII_M1011_IEVENT);
  1174. /* Enable the WOL interrupt */
  1175. err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
  1176. MII_88E1318S_PHY_CSIER_WOL_EIE);
  1177. if (err < 0)
  1178. goto error;
  1179. err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
  1180. if (err < 0)
  1181. goto error;
  1182. /* Setup LED[2] as interrupt pin (active low) */
  1183. err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
  1184. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  1185. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  1186. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  1187. if (err < 0)
  1188. goto error;
  1189. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1190. if (err < 0)
  1191. goto error;
  1192. /* Store the device address for the magic packet */
  1193. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
  1194. ((phydev->attached_dev->dev_addr[5] << 8) |
  1195. phydev->attached_dev->dev_addr[4]));
  1196. if (err < 0)
  1197. goto error;
  1198. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
  1199. ((phydev->attached_dev->dev_addr[3] << 8) |
  1200. phydev->attached_dev->dev_addr[2]));
  1201. if (err < 0)
  1202. goto error;
  1203. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
  1204. ((phydev->attached_dev->dev_addr[1] << 8) |
  1205. phydev->attached_dev->dev_addr[0]));
  1206. if (err < 0)
  1207. goto error;
  1208. /* Clear WOL status and enable magic packet matching */
  1209. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
  1210. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
  1211. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
  1212. if (err < 0)
  1213. goto error;
  1214. } else {
  1215. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1216. if (err < 0)
  1217. goto error;
  1218. /* Clear WOL status and disable magic packet matching */
  1219. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1220. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
  1221. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
  1222. if (err < 0)
  1223. goto error;
  1224. }
  1225. error:
  1226. return phy_restore_page(phydev, oldpage, err);
  1227. }
  1228. static int marvell_get_sset_count(struct phy_device *phydev)
  1229. {
  1230. if (phydev->supported & SUPPORTED_FIBRE)
  1231. return ARRAY_SIZE(marvell_hw_stats);
  1232. else
  1233. return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
  1234. }
  1235. static void marvell_get_strings(struct phy_device *phydev, u8 *data)
  1236. {
  1237. int count = marvell_get_sset_count(phydev);
  1238. int i;
  1239. for (i = 0; i < count; i++) {
  1240. strlcpy(data + i * ETH_GSTRING_LEN,
  1241. marvell_hw_stats[i].string, ETH_GSTRING_LEN);
  1242. }
  1243. }
  1244. static u64 marvell_get_stat(struct phy_device *phydev, int i)
  1245. {
  1246. struct marvell_hw_stat stat = marvell_hw_stats[i];
  1247. struct marvell_priv *priv = phydev->priv;
  1248. int val;
  1249. u64 ret;
  1250. val = phy_read_paged(phydev, stat.page, stat.reg);
  1251. if (val < 0) {
  1252. ret = U64_MAX;
  1253. } else {
  1254. val = val & ((1 << stat.bits) - 1);
  1255. priv->stats[i] += val;
  1256. ret = priv->stats[i];
  1257. }
  1258. return ret;
  1259. }
  1260. static void marvell_get_stats(struct phy_device *phydev,
  1261. struct ethtool_stats *stats, u64 *data)
  1262. {
  1263. int count = marvell_get_sset_count(phydev);
  1264. int i;
  1265. for (i = 0; i < count; i++)
  1266. data[i] = marvell_get_stat(phydev, i);
  1267. }
  1268. #ifdef CONFIG_HWMON
  1269. static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
  1270. {
  1271. int oldpage;
  1272. int ret = 0;
  1273. int val;
  1274. *temp = 0;
  1275. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1276. if (oldpage < 0)
  1277. goto error;
  1278. /* Enable temperature sensor */
  1279. ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
  1280. if (ret < 0)
  1281. goto error;
  1282. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  1283. ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  1284. if (ret < 0)
  1285. goto error;
  1286. /* Wait for temperature to stabilize */
  1287. usleep_range(10000, 12000);
  1288. val = __phy_read(phydev, MII_88E1121_MISC_TEST);
  1289. if (val < 0) {
  1290. ret = val;
  1291. goto error;
  1292. }
  1293. /* Disable temperature sensor */
  1294. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  1295. ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  1296. if (ret < 0)
  1297. goto error;
  1298. *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
  1299. error:
  1300. return phy_restore_page(phydev, oldpage, ret);
  1301. }
  1302. static int m88e1121_hwmon_read(struct device *dev,
  1303. enum hwmon_sensor_types type,
  1304. u32 attr, int channel, long *temp)
  1305. {
  1306. struct phy_device *phydev = dev_get_drvdata(dev);
  1307. int err;
  1308. switch (attr) {
  1309. case hwmon_temp_input:
  1310. err = m88e1121_get_temp(phydev, temp);
  1311. break;
  1312. default:
  1313. return -EOPNOTSUPP;
  1314. }
  1315. return err;
  1316. }
  1317. static umode_t m88e1121_hwmon_is_visible(const void *data,
  1318. enum hwmon_sensor_types type,
  1319. u32 attr, int channel)
  1320. {
  1321. if (type != hwmon_temp)
  1322. return 0;
  1323. switch (attr) {
  1324. case hwmon_temp_input:
  1325. return 0444;
  1326. default:
  1327. return 0;
  1328. }
  1329. }
  1330. static u32 m88e1121_hwmon_chip_config[] = {
  1331. HWMON_C_REGISTER_TZ,
  1332. 0
  1333. };
  1334. static const struct hwmon_channel_info m88e1121_hwmon_chip = {
  1335. .type = hwmon_chip,
  1336. .config = m88e1121_hwmon_chip_config,
  1337. };
  1338. static u32 m88e1121_hwmon_temp_config[] = {
  1339. HWMON_T_INPUT,
  1340. 0
  1341. };
  1342. static const struct hwmon_channel_info m88e1121_hwmon_temp = {
  1343. .type = hwmon_temp,
  1344. .config = m88e1121_hwmon_temp_config,
  1345. };
  1346. static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
  1347. &m88e1121_hwmon_chip,
  1348. &m88e1121_hwmon_temp,
  1349. NULL
  1350. };
  1351. static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
  1352. .is_visible = m88e1121_hwmon_is_visible,
  1353. .read = m88e1121_hwmon_read,
  1354. };
  1355. static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
  1356. .ops = &m88e1121_hwmon_hwmon_ops,
  1357. .info = m88e1121_hwmon_info,
  1358. };
  1359. static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
  1360. {
  1361. int ret;
  1362. *temp = 0;
  1363. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1364. MII_88E1510_TEMP_SENSOR);
  1365. if (ret < 0)
  1366. return ret;
  1367. *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
  1368. return 0;
  1369. }
  1370. static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
  1371. {
  1372. int ret;
  1373. *temp = 0;
  1374. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1375. MII_88E1121_MISC_TEST);
  1376. if (ret < 0)
  1377. return ret;
  1378. *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
  1379. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
  1380. /* convert to mC */
  1381. *temp *= 1000;
  1382. return 0;
  1383. }
  1384. static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
  1385. {
  1386. temp = temp / 1000;
  1387. temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
  1388. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1389. MII_88E1121_MISC_TEST,
  1390. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
  1391. temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
  1392. }
  1393. static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
  1394. {
  1395. int ret;
  1396. *alarm = false;
  1397. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  1398. MII_88E1121_MISC_TEST);
  1399. if (ret < 0)
  1400. return ret;
  1401. *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
  1402. return 0;
  1403. }
  1404. static int m88e1510_hwmon_read(struct device *dev,
  1405. enum hwmon_sensor_types type,
  1406. u32 attr, int channel, long *temp)
  1407. {
  1408. struct phy_device *phydev = dev_get_drvdata(dev);
  1409. int err;
  1410. switch (attr) {
  1411. case hwmon_temp_input:
  1412. err = m88e1510_get_temp(phydev, temp);
  1413. break;
  1414. case hwmon_temp_crit:
  1415. err = m88e1510_get_temp_critical(phydev, temp);
  1416. break;
  1417. case hwmon_temp_max_alarm:
  1418. err = m88e1510_get_temp_alarm(phydev, temp);
  1419. break;
  1420. default:
  1421. return -EOPNOTSUPP;
  1422. }
  1423. return err;
  1424. }
  1425. static int m88e1510_hwmon_write(struct device *dev,
  1426. enum hwmon_sensor_types type,
  1427. u32 attr, int channel, long temp)
  1428. {
  1429. struct phy_device *phydev = dev_get_drvdata(dev);
  1430. int err;
  1431. switch (attr) {
  1432. case hwmon_temp_crit:
  1433. err = m88e1510_set_temp_critical(phydev, temp);
  1434. break;
  1435. default:
  1436. return -EOPNOTSUPP;
  1437. }
  1438. return err;
  1439. }
  1440. static umode_t m88e1510_hwmon_is_visible(const void *data,
  1441. enum hwmon_sensor_types type,
  1442. u32 attr, int channel)
  1443. {
  1444. if (type != hwmon_temp)
  1445. return 0;
  1446. switch (attr) {
  1447. case hwmon_temp_input:
  1448. case hwmon_temp_max_alarm:
  1449. return 0444;
  1450. case hwmon_temp_crit:
  1451. return 0644;
  1452. default:
  1453. return 0;
  1454. }
  1455. }
  1456. static u32 m88e1510_hwmon_temp_config[] = {
  1457. HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
  1458. 0
  1459. };
  1460. static const struct hwmon_channel_info m88e1510_hwmon_temp = {
  1461. .type = hwmon_temp,
  1462. .config = m88e1510_hwmon_temp_config,
  1463. };
  1464. static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
  1465. &m88e1121_hwmon_chip,
  1466. &m88e1510_hwmon_temp,
  1467. NULL
  1468. };
  1469. static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
  1470. .is_visible = m88e1510_hwmon_is_visible,
  1471. .read = m88e1510_hwmon_read,
  1472. .write = m88e1510_hwmon_write,
  1473. };
  1474. static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
  1475. .ops = &m88e1510_hwmon_hwmon_ops,
  1476. .info = m88e1510_hwmon_info,
  1477. };
  1478. static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
  1479. {
  1480. int sum = 0;
  1481. int oldpage;
  1482. int ret = 0;
  1483. int i;
  1484. *temp = 0;
  1485. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1486. if (oldpage < 0)
  1487. goto error;
  1488. /* Enable temperature sensor */
  1489. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  1490. if (ret < 0)
  1491. goto error;
  1492. ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
  1493. ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
  1494. MII_88E6390_MISC_TEST_SAMPLE_1S;
  1495. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  1496. if (ret < 0)
  1497. goto error;
  1498. /* Wait for temperature to stabilize */
  1499. usleep_range(10000, 12000);
  1500. /* Reading the temperature sense has an errata. You need to read
  1501. * a number of times and take an average.
  1502. */
  1503. for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
  1504. ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
  1505. if (ret < 0)
  1506. goto error;
  1507. sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
  1508. }
  1509. sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
  1510. *temp = (sum - 75) * 1000;
  1511. /* Disable temperature sensor */
  1512. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  1513. if (ret < 0)
  1514. goto error;
  1515. ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
  1516. ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
  1517. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  1518. error:
  1519. phy_restore_page(phydev, oldpage, ret);
  1520. return ret;
  1521. }
  1522. static int m88e6390_hwmon_read(struct device *dev,
  1523. enum hwmon_sensor_types type,
  1524. u32 attr, int channel, long *temp)
  1525. {
  1526. struct phy_device *phydev = dev_get_drvdata(dev);
  1527. int err;
  1528. switch (attr) {
  1529. case hwmon_temp_input:
  1530. err = m88e6390_get_temp(phydev, temp);
  1531. break;
  1532. default:
  1533. return -EOPNOTSUPP;
  1534. }
  1535. return err;
  1536. }
  1537. static umode_t m88e6390_hwmon_is_visible(const void *data,
  1538. enum hwmon_sensor_types type,
  1539. u32 attr, int channel)
  1540. {
  1541. if (type != hwmon_temp)
  1542. return 0;
  1543. switch (attr) {
  1544. case hwmon_temp_input:
  1545. return 0444;
  1546. default:
  1547. return 0;
  1548. }
  1549. }
  1550. static u32 m88e6390_hwmon_temp_config[] = {
  1551. HWMON_T_INPUT,
  1552. 0
  1553. };
  1554. static const struct hwmon_channel_info m88e6390_hwmon_temp = {
  1555. .type = hwmon_temp,
  1556. .config = m88e6390_hwmon_temp_config,
  1557. };
  1558. static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
  1559. &m88e1121_hwmon_chip,
  1560. &m88e6390_hwmon_temp,
  1561. NULL
  1562. };
  1563. static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
  1564. .is_visible = m88e6390_hwmon_is_visible,
  1565. .read = m88e6390_hwmon_read,
  1566. };
  1567. static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
  1568. .ops = &m88e6390_hwmon_hwmon_ops,
  1569. .info = m88e6390_hwmon_info,
  1570. };
  1571. static int marvell_hwmon_name(struct phy_device *phydev)
  1572. {
  1573. struct marvell_priv *priv = phydev->priv;
  1574. struct device *dev = &phydev->mdio.dev;
  1575. const char *devname = dev_name(dev);
  1576. size_t len = strlen(devname);
  1577. int i, j;
  1578. priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
  1579. if (!priv->hwmon_name)
  1580. return -ENOMEM;
  1581. for (i = j = 0; i < len && devname[i]; i++) {
  1582. if (isalnum(devname[i]))
  1583. priv->hwmon_name[j++] = devname[i];
  1584. }
  1585. return 0;
  1586. }
  1587. static int marvell_hwmon_probe(struct phy_device *phydev,
  1588. const struct hwmon_chip_info *chip)
  1589. {
  1590. struct marvell_priv *priv = phydev->priv;
  1591. struct device *dev = &phydev->mdio.dev;
  1592. int err;
  1593. err = marvell_hwmon_name(phydev);
  1594. if (err)
  1595. return err;
  1596. priv->hwmon_dev = devm_hwmon_device_register_with_info(
  1597. dev, priv->hwmon_name, phydev, chip, NULL);
  1598. return PTR_ERR_OR_ZERO(priv->hwmon_dev);
  1599. }
  1600. static int m88e1121_hwmon_probe(struct phy_device *phydev)
  1601. {
  1602. return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
  1603. }
  1604. static int m88e1510_hwmon_probe(struct phy_device *phydev)
  1605. {
  1606. return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
  1607. }
  1608. static int m88e6390_hwmon_probe(struct phy_device *phydev)
  1609. {
  1610. return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
  1611. }
  1612. #else
  1613. static int m88e1121_hwmon_probe(struct phy_device *phydev)
  1614. {
  1615. return 0;
  1616. }
  1617. static int m88e1510_hwmon_probe(struct phy_device *phydev)
  1618. {
  1619. return 0;
  1620. }
  1621. static int m88e6390_hwmon_probe(struct phy_device *phydev)
  1622. {
  1623. return 0;
  1624. }
  1625. #endif
  1626. static int marvell_probe(struct phy_device *phydev)
  1627. {
  1628. struct marvell_priv *priv;
  1629. priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
  1630. if (!priv)
  1631. return -ENOMEM;
  1632. phydev->priv = priv;
  1633. return 0;
  1634. }
  1635. static int m88e1121_probe(struct phy_device *phydev)
  1636. {
  1637. int err;
  1638. err = marvell_probe(phydev);
  1639. if (err)
  1640. return err;
  1641. return m88e1121_hwmon_probe(phydev);
  1642. }
  1643. static int m88e1510_probe(struct phy_device *phydev)
  1644. {
  1645. int err;
  1646. err = marvell_probe(phydev);
  1647. if (err)
  1648. return err;
  1649. return m88e1510_hwmon_probe(phydev);
  1650. }
  1651. static int m88e6390_probe(struct phy_device *phydev)
  1652. {
  1653. int err;
  1654. err = marvell_probe(phydev);
  1655. if (err)
  1656. return err;
  1657. return m88e6390_hwmon_probe(phydev);
  1658. }
  1659. static struct phy_driver marvell_drivers[] = {
  1660. {
  1661. .phy_id = MARVELL_PHY_ID_88E1101,
  1662. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1663. .name = "Marvell 88E1101",
  1664. .features = PHY_GBIT_FEATURES,
  1665. .flags = PHY_HAS_INTERRUPT,
  1666. .probe = marvell_probe,
  1667. .config_init = &marvell_config_init,
  1668. .config_aneg = &m88e1101_config_aneg,
  1669. .ack_interrupt = &marvell_ack_interrupt,
  1670. .config_intr = &marvell_config_intr,
  1671. .resume = &genphy_resume,
  1672. .suspend = &genphy_suspend,
  1673. .read_page = marvell_read_page,
  1674. .write_page = marvell_write_page,
  1675. .get_sset_count = marvell_get_sset_count,
  1676. .get_strings = marvell_get_strings,
  1677. .get_stats = marvell_get_stats,
  1678. },
  1679. {
  1680. .phy_id = MARVELL_PHY_ID_88E1112,
  1681. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1682. .name = "Marvell 88E1112",
  1683. .features = PHY_GBIT_FEATURES,
  1684. .flags = PHY_HAS_INTERRUPT,
  1685. .probe = marvell_probe,
  1686. .config_init = &m88e1111_config_init,
  1687. .config_aneg = &marvell_config_aneg,
  1688. .ack_interrupt = &marvell_ack_interrupt,
  1689. .config_intr = &marvell_config_intr,
  1690. .resume = &genphy_resume,
  1691. .suspend = &genphy_suspend,
  1692. .read_page = marvell_read_page,
  1693. .write_page = marvell_write_page,
  1694. .get_sset_count = marvell_get_sset_count,
  1695. .get_strings = marvell_get_strings,
  1696. .get_stats = marvell_get_stats,
  1697. },
  1698. {
  1699. .phy_id = MARVELL_PHY_ID_88E1111,
  1700. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1701. .name = "Marvell 88E1111",
  1702. .features = PHY_GBIT_FEATURES,
  1703. .flags = PHY_HAS_INTERRUPT,
  1704. .probe = marvell_probe,
  1705. .config_init = &m88e1111_config_init,
  1706. .config_aneg = &m88e1111_config_aneg,
  1707. .read_status = &marvell_read_status,
  1708. .ack_interrupt = &marvell_ack_interrupt,
  1709. .config_intr = &marvell_config_intr,
  1710. .resume = &genphy_resume,
  1711. .suspend = &genphy_suspend,
  1712. .read_page = marvell_read_page,
  1713. .write_page = marvell_write_page,
  1714. .get_sset_count = marvell_get_sset_count,
  1715. .get_strings = marvell_get_strings,
  1716. .get_stats = marvell_get_stats,
  1717. },
  1718. {
  1719. .phy_id = MARVELL_PHY_ID_88E1118,
  1720. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1721. .name = "Marvell 88E1118",
  1722. .features = PHY_GBIT_FEATURES,
  1723. .flags = PHY_HAS_INTERRUPT,
  1724. .probe = marvell_probe,
  1725. .config_init = &m88e1118_config_init,
  1726. .config_aneg = &m88e1118_config_aneg,
  1727. .ack_interrupt = &marvell_ack_interrupt,
  1728. .config_intr = &marvell_config_intr,
  1729. .resume = &genphy_resume,
  1730. .suspend = &genphy_suspend,
  1731. .read_page = marvell_read_page,
  1732. .write_page = marvell_write_page,
  1733. .get_sset_count = marvell_get_sset_count,
  1734. .get_strings = marvell_get_strings,
  1735. .get_stats = marvell_get_stats,
  1736. },
  1737. {
  1738. .phy_id = MARVELL_PHY_ID_88E1121R,
  1739. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1740. .name = "Marvell 88E1121R",
  1741. .features = PHY_GBIT_FEATURES,
  1742. .flags = PHY_HAS_INTERRUPT,
  1743. .probe = &m88e1121_probe,
  1744. .config_init = &marvell_config_init,
  1745. .config_aneg = &m88e1121_config_aneg,
  1746. .read_status = &marvell_read_status,
  1747. .ack_interrupt = &marvell_ack_interrupt,
  1748. .config_intr = &marvell_config_intr,
  1749. .did_interrupt = &m88e1121_did_interrupt,
  1750. .resume = &genphy_resume,
  1751. .suspend = &genphy_suspend,
  1752. .read_page = marvell_read_page,
  1753. .write_page = marvell_write_page,
  1754. .get_sset_count = marvell_get_sset_count,
  1755. .get_strings = marvell_get_strings,
  1756. .get_stats = marvell_get_stats,
  1757. },
  1758. {
  1759. .phy_id = MARVELL_PHY_ID_88E1318S,
  1760. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1761. .name = "Marvell 88E1318S",
  1762. .features = PHY_GBIT_FEATURES,
  1763. .flags = PHY_HAS_INTERRUPT,
  1764. .probe = marvell_probe,
  1765. .config_init = &m88e1318_config_init,
  1766. .config_aneg = &m88e1318_config_aneg,
  1767. .read_status = &marvell_read_status,
  1768. .ack_interrupt = &marvell_ack_interrupt,
  1769. .config_intr = &marvell_config_intr,
  1770. .did_interrupt = &m88e1121_did_interrupt,
  1771. .get_wol = &m88e1318_get_wol,
  1772. .set_wol = &m88e1318_set_wol,
  1773. .resume = &genphy_resume,
  1774. .suspend = &genphy_suspend,
  1775. .read_page = marvell_read_page,
  1776. .write_page = marvell_write_page,
  1777. .get_sset_count = marvell_get_sset_count,
  1778. .get_strings = marvell_get_strings,
  1779. .get_stats = marvell_get_stats,
  1780. },
  1781. {
  1782. .phy_id = MARVELL_PHY_ID_88E1145,
  1783. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1784. .name = "Marvell 88E1145",
  1785. .features = PHY_GBIT_FEATURES,
  1786. .flags = PHY_HAS_INTERRUPT,
  1787. .probe = marvell_probe,
  1788. .config_init = &m88e1145_config_init,
  1789. .config_aneg = &m88e1101_config_aneg,
  1790. .read_status = &genphy_read_status,
  1791. .ack_interrupt = &marvell_ack_interrupt,
  1792. .config_intr = &marvell_config_intr,
  1793. .resume = &genphy_resume,
  1794. .suspend = &genphy_suspend,
  1795. .read_page = marvell_read_page,
  1796. .write_page = marvell_write_page,
  1797. .get_sset_count = marvell_get_sset_count,
  1798. .get_strings = marvell_get_strings,
  1799. .get_stats = marvell_get_stats,
  1800. },
  1801. {
  1802. .phy_id = MARVELL_PHY_ID_88E1149R,
  1803. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1804. .name = "Marvell 88E1149R",
  1805. .features = PHY_GBIT_FEATURES,
  1806. .flags = PHY_HAS_INTERRUPT,
  1807. .probe = marvell_probe,
  1808. .config_init = &m88e1149_config_init,
  1809. .config_aneg = &m88e1118_config_aneg,
  1810. .ack_interrupt = &marvell_ack_interrupt,
  1811. .config_intr = &marvell_config_intr,
  1812. .resume = &genphy_resume,
  1813. .suspend = &genphy_suspend,
  1814. .read_page = marvell_read_page,
  1815. .write_page = marvell_write_page,
  1816. .get_sset_count = marvell_get_sset_count,
  1817. .get_strings = marvell_get_strings,
  1818. .get_stats = marvell_get_stats,
  1819. },
  1820. {
  1821. .phy_id = MARVELL_PHY_ID_88E1240,
  1822. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1823. .name = "Marvell 88E1240",
  1824. .features = PHY_GBIT_FEATURES,
  1825. .flags = PHY_HAS_INTERRUPT,
  1826. .probe = marvell_probe,
  1827. .config_init = &m88e1111_config_init,
  1828. .config_aneg = &marvell_config_aneg,
  1829. .ack_interrupt = &marvell_ack_interrupt,
  1830. .config_intr = &marvell_config_intr,
  1831. .resume = &genphy_resume,
  1832. .suspend = &genphy_suspend,
  1833. .read_page = marvell_read_page,
  1834. .write_page = marvell_write_page,
  1835. .get_sset_count = marvell_get_sset_count,
  1836. .get_strings = marvell_get_strings,
  1837. .get_stats = marvell_get_stats,
  1838. },
  1839. {
  1840. .phy_id = MARVELL_PHY_ID_88E1116R,
  1841. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1842. .name = "Marvell 88E1116R",
  1843. #ifdef CONFIG_BOARD_ARK1668E_FPGA
  1844. .features = PHY_BASIC_FEATURES,
  1845. #else
  1846. .features = PHY_GBIT_FEATURES,
  1847. #endif
  1848. .flags = PHY_HAS_INTERRUPT,
  1849. .probe = marvell_probe,
  1850. .config_init = &m88e1116r_config_init,
  1851. .ack_interrupt = &marvell_ack_interrupt,
  1852. .config_intr = &marvell_config_intr,
  1853. .resume = &genphy_resume,
  1854. .suspend = &genphy_suspend,
  1855. .read_page = marvell_read_page,
  1856. .write_page = marvell_write_page,
  1857. .get_sset_count = marvell_get_sset_count,
  1858. .get_strings = marvell_get_strings,
  1859. .get_stats = marvell_get_stats,
  1860. },
  1861. {
  1862. .phy_id = MARVELL_PHY_ID_88E1510,
  1863. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1864. .name = "Marvell 88E1510",
  1865. .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
  1866. .flags = PHY_HAS_INTERRUPT,
  1867. .probe = &m88e1510_probe,
  1868. .config_init = &m88e1510_config_init,
  1869. .config_aneg = &m88e1510_config_aneg,
  1870. .read_status = &marvell_read_status,
  1871. .ack_interrupt = &marvell_ack_interrupt,
  1872. .config_intr = &marvell_config_intr,
  1873. .did_interrupt = &m88e1121_did_interrupt,
  1874. .get_wol = &m88e1318_get_wol,
  1875. .set_wol = &m88e1318_set_wol,
  1876. .resume = &marvell_resume,
  1877. .suspend = &marvell_suspend,
  1878. .read_page = marvell_read_page,
  1879. .write_page = marvell_write_page,
  1880. .get_sset_count = marvell_get_sset_count,
  1881. .get_strings = marvell_get_strings,
  1882. .get_stats = marvell_get_stats,
  1883. .set_loopback = genphy_loopback,
  1884. },
  1885. {
  1886. .phy_id = MARVELL_PHY_ID_88E1540,
  1887. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1888. .name = "Marvell 88E1540",
  1889. .features = PHY_GBIT_FEATURES,
  1890. .flags = PHY_HAS_INTERRUPT,
  1891. .probe = m88e1510_probe,
  1892. .config_init = &marvell_config_init,
  1893. .config_aneg = &m88e1510_config_aneg,
  1894. .read_status = &marvell_read_status,
  1895. .ack_interrupt = &marvell_ack_interrupt,
  1896. .config_intr = &marvell_config_intr,
  1897. .did_interrupt = &m88e1121_did_interrupt,
  1898. .resume = &genphy_resume,
  1899. .suspend = &genphy_suspend,
  1900. .read_page = marvell_read_page,
  1901. .write_page = marvell_write_page,
  1902. .get_sset_count = marvell_get_sset_count,
  1903. .get_strings = marvell_get_strings,
  1904. .get_stats = marvell_get_stats,
  1905. },
  1906. {
  1907. .phy_id = MARVELL_PHY_ID_88E1545,
  1908. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1909. .name = "Marvell 88E1545",
  1910. .probe = m88e1510_probe,
  1911. .features = PHY_GBIT_FEATURES,
  1912. .flags = PHY_HAS_INTERRUPT,
  1913. .config_init = &marvell_config_init,
  1914. .config_aneg = &m88e1510_config_aneg,
  1915. .read_status = &marvell_read_status,
  1916. .ack_interrupt = &marvell_ack_interrupt,
  1917. .config_intr = &marvell_config_intr,
  1918. .did_interrupt = &m88e1121_did_interrupt,
  1919. .resume = &genphy_resume,
  1920. .suspend = &genphy_suspend,
  1921. .read_page = marvell_read_page,
  1922. .write_page = marvell_write_page,
  1923. .get_sset_count = marvell_get_sset_count,
  1924. .get_strings = marvell_get_strings,
  1925. .get_stats = marvell_get_stats,
  1926. },
  1927. {
  1928. .phy_id = MARVELL_PHY_ID_88E3016,
  1929. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1930. .name = "Marvell 88E3016",
  1931. .features = PHY_BASIC_FEATURES,
  1932. .flags = PHY_HAS_INTERRUPT,
  1933. .probe = marvell_probe,
  1934. .config_init = &m88e3016_config_init,
  1935. .aneg_done = &marvell_aneg_done,
  1936. .read_status = &marvell_read_status,
  1937. .ack_interrupt = &marvell_ack_interrupt,
  1938. .config_intr = &marvell_config_intr,
  1939. .did_interrupt = &m88e1121_did_interrupt,
  1940. .resume = &genphy_resume,
  1941. .suspend = &genphy_suspend,
  1942. .read_page = marvell_read_page,
  1943. .write_page = marvell_write_page,
  1944. .get_sset_count = marvell_get_sset_count,
  1945. .get_strings = marvell_get_strings,
  1946. .get_stats = marvell_get_stats,
  1947. },
  1948. {
  1949. .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
  1950. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1951. .name = "Marvell 88E6341 Family",
  1952. .features = PHY_GBIT_FEATURES,
  1953. .flags = PHY_HAS_INTERRUPT,
  1954. .probe = m88e1510_probe,
  1955. .config_init = &marvell_config_init,
  1956. .config_aneg = &m88e6390_config_aneg,
  1957. .read_status = &marvell_read_status,
  1958. .ack_interrupt = &marvell_ack_interrupt,
  1959. .config_intr = &marvell_config_intr,
  1960. .did_interrupt = &m88e1121_did_interrupt,
  1961. .resume = &genphy_resume,
  1962. .suspend = &genphy_suspend,
  1963. .read_page = marvell_read_page,
  1964. .write_page = marvell_write_page,
  1965. .get_sset_count = marvell_get_sset_count,
  1966. .get_strings = marvell_get_strings,
  1967. .get_stats = marvell_get_stats,
  1968. },
  1969. {
  1970. .phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
  1971. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1972. .name = "Marvell 88E6390 Family",
  1973. .features = PHY_GBIT_FEATURES,
  1974. .flags = PHY_HAS_INTERRUPT,
  1975. .probe = m88e6390_probe,
  1976. .config_init = &marvell_config_init,
  1977. .config_aneg = &m88e6390_config_aneg,
  1978. .read_status = &marvell_read_status,
  1979. .ack_interrupt = &marvell_ack_interrupt,
  1980. .config_intr = &marvell_config_intr,
  1981. .did_interrupt = &m88e1121_did_interrupt,
  1982. .resume = &genphy_resume,
  1983. .suspend = &genphy_suspend,
  1984. .read_page = marvell_read_page,
  1985. .write_page = marvell_write_page,
  1986. .get_sset_count = marvell_get_sset_count,
  1987. .get_strings = marvell_get_strings,
  1988. .get_stats = marvell_get_stats,
  1989. },
  1990. };
  1991. module_phy_driver(marvell_drivers);
  1992. static struct mdio_device_id __maybe_unused marvell_tbl[] = {
  1993. { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
  1994. { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
  1995. { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
  1996. { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
  1997. { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
  1998. { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
  1999. { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
  2000. { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
  2001. { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
  2002. { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
  2003. { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
  2004. { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
  2005. { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
  2006. { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
  2007. { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
  2008. { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
  2009. { }
  2010. };
  2011. MODULE_DEVICE_TABLE(mdio, marvell_tbl);