qdio_main.c 45 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  4. *
  5. * Copyright IBM Corp. 2000, 2008
  6. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  7. * Jan Glauber <jang@linux.vnet.ibm.com>
  8. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  9. */
  10. #include <linux/module.h>
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/timer.h>
  14. #include <linux/delay.h>
  15. #include <linux/gfp.h>
  16. #include <linux/io.h>
  17. #include <linux/atomic.h>
  18. #include <asm/debug.h>
  19. #include <asm/qdio.h>
  20. #include <asm/ipl.h>
  21. #include "cio.h"
  22. #include "css.h"
  23. #include "device.h"
  24. #include "qdio.h"
  25. #include "qdio_debug.h"
  26. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  27. "Jan Glauber <jang@linux.vnet.ibm.com>");
  28. MODULE_DESCRIPTION("QDIO base support");
  29. MODULE_LICENSE("GPL");
  30. static inline int do_siga_sync(unsigned long schid,
  31. unsigned int out_mask, unsigned int in_mask,
  32. unsigned int fc)
  33. {
  34. register unsigned long __fc asm ("0") = fc;
  35. register unsigned long __schid asm ("1") = schid;
  36. register unsigned long out asm ("2") = out_mask;
  37. register unsigned long in asm ("3") = in_mask;
  38. int cc;
  39. asm volatile(
  40. " siga 0\n"
  41. " ipm %0\n"
  42. " srl %0,28\n"
  43. : "=d" (cc)
  44. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  45. return cc;
  46. }
  47. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  48. unsigned int fc)
  49. {
  50. register unsigned long __fc asm ("0") = fc;
  51. register unsigned long __schid asm ("1") = schid;
  52. register unsigned long __mask asm ("2") = mask;
  53. int cc;
  54. asm volatile(
  55. " siga 0\n"
  56. " ipm %0\n"
  57. " srl %0,28\n"
  58. : "=d" (cc)
  59. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
  60. return cc;
  61. }
  62. /**
  63. * do_siga_output - perform SIGA-w/wt function
  64. * @schid: subchannel id or in case of QEBSM the subchannel token
  65. * @mask: which output queues to process
  66. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  67. * @fc: function code to perform
  68. * @aob: asynchronous operation block
  69. *
  70. * Returns condition code.
  71. * Note: For IQDC unicast queues only the highest priority queue is processed.
  72. */
  73. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  74. unsigned int *bb, unsigned int fc,
  75. unsigned long aob)
  76. {
  77. register unsigned long __fc asm("0") = fc;
  78. register unsigned long __schid asm("1") = schid;
  79. register unsigned long __mask asm("2") = mask;
  80. register unsigned long __aob asm("3") = aob;
  81. int cc;
  82. asm volatile(
  83. " siga 0\n"
  84. " ipm %0\n"
  85. " srl %0,28\n"
  86. : "=d" (cc), "+d" (__fc), "+d" (__aob)
  87. : "d" (__schid), "d" (__mask)
  88. : "cc");
  89. *bb = __fc >> 31;
  90. return cc;
  91. }
  92. /**
  93. * qdio_do_eqbs - extract buffer states for QEBSM
  94. * @q: queue to manipulate
  95. * @state: state of the extracted buffers
  96. * @start: buffer number to start at
  97. * @count: count of buffers to examine
  98. * @auto_ack: automatically acknowledge buffers
  99. *
  100. * Returns the number of successfully extracted equal buffer states.
  101. * Stops processing if a state is different from the last buffers state.
  102. */
  103. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  104. int start, int count, int auto_ack)
  105. {
  106. int tmp_count = count, tmp_start = start, nr = q->nr;
  107. unsigned int ccq = 0;
  108. qperf_inc(q, eqbs);
  109. if (!q->is_input_q)
  110. nr += q->irq_ptr->nr_input_qs;
  111. again:
  112. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  113. auto_ack);
  114. switch (ccq) {
  115. case 0:
  116. case 32:
  117. /* all done, or next buffer state different */
  118. return count - tmp_count;
  119. case 96:
  120. /* not all buffers processed */
  121. qperf_inc(q, eqbs_partial);
  122. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
  123. tmp_count);
  124. return count - tmp_count;
  125. case 97:
  126. /* no buffer processed */
  127. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  128. goto again;
  129. default:
  130. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  131. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  132. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  133. q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE, q->nr,
  134. q->first_to_kick, count, q->irq_ptr->int_parm);
  135. return 0;
  136. }
  137. }
  138. /**
  139. * qdio_do_sqbs - set buffer states for QEBSM
  140. * @q: queue to manipulate
  141. * @state: new state of the buffers
  142. * @start: first buffer number to change
  143. * @count: how many buffers to change
  144. *
  145. * Returns the number of successfully changed buffers.
  146. * Does retrying until the specified count of buffer states is set or an
  147. * error occurs.
  148. */
  149. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  150. int count)
  151. {
  152. unsigned int ccq = 0;
  153. int tmp_count = count, tmp_start = start;
  154. int nr = q->nr;
  155. if (!count)
  156. return 0;
  157. qperf_inc(q, sqbs);
  158. if (!q->is_input_q)
  159. nr += q->irq_ptr->nr_input_qs;
  160. again:
  161. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  162. switch (ccq) {
  163. case 0:
  164. case 32:
  165. /* all done, or active buffer adapter-owned */
  166. WARN_ON_ONCE(tmp_count);
  167. return count - tmp_count;
  168. case 96:
  169. /* not all buffers processed */
  170. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  171. qperf_inc(q, sqbs_partial);
  172. goto again;
  173. default:
  174. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  175. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  176. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  177. q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE, q->nr,
  178. q->first_to_kick, count, q->irq_ptr->int_parm);
  179. return 0;
  180. }
  181. }
  182. /*
  183. * Returns number of examined buffers and their common state in *state.
  184. * Requested number of buffers-to-examine must be > 0.
  185. */
  186. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  187. unsigned char *state, unsigned int count,
  188. int auto_ack, int merge_pending)
  189. {
  190. unsigned char __state = 0;
  191. int i;
  192. if (is_qebsm(q))
  193. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  194. /* get initial state: */
  195. __state = q->slsb.val[bufnr];
  196. if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
  197. __state = SLSB_P_OUTPUT_EMPTY;
  198. for (i = 1; i < count; i++) {
  199. bufnr = next_buf(bufnr);
  200. /* merge PENDING into EMPTY: */
  201. if (merge_pending &&
  202. q->slsb.val[bufnr] == SLSB_P_OUTPUT_PENDING &&
  203. __state == SLSB_P_OUTPUT_EMPTY)
  204. continue;
  205. /* stop if next state differs from initial state: */
  206. if (q->slsb.val[bufnr] != __state)
  207. break;
  208. }
  209. *state = __state;
  210. return i;
  211. }
  212. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  213. unsigned char *state, int auto_ack)
  214. {
  215. return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
  216. }
  217. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  218. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  219. unsigned char state, int count)
  220. {
  221. int i;
  222. if (is_qebsm(q))
  223. return qdio_do_sqbs(q, state, bufnr, count);
  224. for (i = 0; i < count; i++) {
  225. xchg(&q->slsb.val[bufnr], state);
  226. bufnr = next_buf(bufnr);
  227. }
  228. return count;
  229. }
  230. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  231. unsigned char state)
  232. {
  233. return set_buf_states(q, bufnr, state, 1);
  234. }
  235. /* set slsb states to initial state */
  236. static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  237. {
  238. struct qdio_q *q;
  239. int i;
  240. for_each_input_queue(irq_ptr, q, i)
  241. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  242. QDIO_MAX_BUFFERS_PER_Q);
  243. for_each_output_queue(irq_ptr, q, i)
  244. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  245. QDIO_MAX_BUFFERS_PER_Q);
  246. }
  247. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  248. unsigned int input)
  249. {
  250. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  251. unsigned int fc = QDIO_SIGA_SYNC;
  252. int cc;
  253. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  254. qperf_inc(q, siga_sync);
  255. if (is_qebsm(q)) {
  256. schid = q->irq_ptr->sch_token;
  257. fc |= QDIO_SIGA_QEBSM_FLAG;
  258. }
  259. cc = do_siga_sync(schid, output, input, fc);
  260. if (unlikely(cc))
  261. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  262. return (cc) ? -EIO : 0;
  263. }
  264. static inline int qdio_siga_sync_q(struct qdio_q *q)
  265. {
  266. if (q->is_input_q)
  267. return qdio_siga_sync(q, 0, q->mask);
  268. else
  269. return qdio_siga_sync(q, q->mask, 0);
  270. }
  271. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
  272. unsigned long aob)
  273. {
  274. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  275. unsigned int fc = QDIO_SIGA_WRITE;
  276. u64 start_time = 0;
  277. int retries = 0, cc;
  278. unsigned long laob = 0;
  279. WARN_ON_ONCE(aob && ((queue_type(q) != QDIO_IQDIO_QFMT) ||
  280. !q->u.out.use_cq));
  281. if (q->u.out.use_cq && aob != 0) {
  282. fc = QDIO_SIGA_WRITEQ;
  283. laob = aob;
  284. }
  285. if (is_qebsm(q)) {
  286. schid = q->irq_ptr->sch_token;
  287. fc |= QDIO_SIGA_QEBSM_FLAG;
  288. }
  289. again:
  290. cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
  291. /* hipersocket busy condition */
  292. if (unlikely(*busy_bit)) {
  293. retries++;
  294. if (!start_time) {
  295. start_time = get_tod_clock_fast();
  296. goto again;
  297. }
  298. if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE)
  299. goto again;
  300. }
  301. if (retries) {
  302. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  303. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  304. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  305. }
  306. return cc;
  307. }
  308. static inline int qdio_siga_input(struct qdio_q *q)
  309. {
  310. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  311. unsigned int fc = QDIO_SIGA_READ;
  312. int cc;
  313. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  314. qperf_inc(q, siga_read);
  315. if (is_qebsm(q)) {
  316. schid = q->irq_ptr->sch_token;
  317. fc |= QDIO_SIGA_QEBSM_FLAG;
  318. }
  319. cc = do_siga_input(schid, q->mask, fc);
  320. if (unlikely(cc))
  321. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  322. return (cc) ? -EIO : 0;
  323. }
  324. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  325. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  326. static inline void qdio_sync_queues(struct qdio_q *q)
  327. {
  328. /* PCI capable outbound queues will also be scanned so sync them too */
  329. if (pci_out_supported(q))
  330. qdio_siga_sync_all(q);
  331. else
  332. qdio_siga_sync_q(q);
  333. }
  334. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  335. unsigned char *state)
  336. {
  337. if (need_siga_sync(q))
  338. qdio_siga_sync_q(q);
  339. return get_buf_states(q, bufnr, state, 1, 0, 0);
  340. }
  341. static inline void qdio_stop_polling(struct qdio_q *q)
  342. {
  343. if (!q->u.in.polling)
  344. return;
  345. q->u.in.polling = 0;
  346. qperf_inc(q, stop_polling);
  347. /* show the card that we are not polling anymore */
  348. if (is_qebsm(q)) {
  349. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  350. q->u.in.ack_count);
  351. q->u.in.ack_count = 0;
  352. } else
  353. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  354. }
  355. static inline void account_sbals(struct qdio_q *q, unsigned int count)
  356. {
  357. int pos;
  358. q->q_stats.nr_sbal_total += count;
  359. if (count == QDIO_MAX_BUFFERS_MASK) {
  360. q->q_stats.nr_sbals[7]++;
  361. return;
  362. }
  363. pos = ilog2(count);
  364. q->q_stats.nr_sbals[pos]++;
  365. }
  366. static void process_buffer_error(struct qdio_q *q, int count)
  367. {
  368. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  369. SLSB_P_OUTPUT_NOT_INIT;
  370. q->qdio_error = QDIO_ERROR_SLSB_STATE;
  371. /* special handling for no target buffer empty */
  372. if (queue_type(q) == QDIO_IQDIO_QFMT && !q->is_input_q &&
  373. q->sbal[q->first_to_check]->element[15].sflags == 0x10) {
  374. qperf_inc(q, target_full);
  375. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  376. q->first_to_check);
  377. goto set;
  378. }
  379. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  380. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  381. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  382. DBF_ERROR("F14:%2x F15:%2x",
  383. q->sbal[q->first_to_check]->element[14].sflags,
  384. q->sbal[q->first_to_check]->element[15].sflags);
  385. set:
  386. /*
  387. * Interrupts may be avoided as long as the error is present
  388. * so change the buffer state immediately to avoid starvation.
  389. */
  390. set_buf_states(q, q->first_to_check, state, count);
  391. }
  392. static inline void inbound_primed(struct qdio_q *q, int count)
  393. {
  394. int new;
  395. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr, count);
  396. /* for QEBSM the ACK was already set by EQBS */
  397. if (is_qebsm(q)) {
  398. if (!q->u.in.polling) {
  399. q->u.in.polling = 1;
  400. q->u.in.ack_count = count;
  401. q->u.in.ack_start = q->first_to_check;
  402. return;
  403. }
  404. /* delete the previous ACK's */
  405. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  406. q->u.in.ack_count);
  407. q->u.in.ack_count = count;
  408. q->u.in.ack_start = q->first_to_check;
  409. return;
  410. }
  411. /*
  412. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  413. * or by the next inbound run.
  414. */
  415. new = add_buf(q->first_to_check, count - 1);
  416. if (q->u.in.polling) {
  417. /* reset the previous ACK but first set the new one */
  418. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  419. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  420. } else {
  421. q->u.in.polling = 1;
  422. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  423. }
  424. q->u.in.ack_start = new;
  425. count--;
  426. if (!count)
  427. return;
  428. /* need to change ALL buffers to get more interrupts */
  429. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  430. }
  431. static int get_inbound_buffer_frontier(struct qdio_q *q)
  432. {
  433. unsigned char state = 0;
  434. int count;
  435. q->timestamp = get_tod_clock_fast();
  436. /*
  437. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  438. * would return 0.
  439. */
  440. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  441. if (!count)
  442. goto out;
  443. /*
  444. * No siga sync here, as a PCI or we after a thin interrupt
  445. * already sync'ed the queues.
  446. */
  447. count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
  448. if (!count)
  449. goto out;
  450. switch (state) {
  451. case SLSB_P_INPUT_PRIMED:
  452. inbound_primed(q, count);
  453. q->first_to_check = add_buf(q->first_to_check, count);
  454. if (atomic_sub_return(count, &q->nr_buf_used) == 0)
  455. qperf_inc(q, inbound_queue_full);
  456. if (q->irq_ptr->perf_stat_enabled)
  457. account_sbals(q, count);
  458. break;
  459. case SLSB_P_INPUT_ERROR:
  460. process_buffer_error(q, count);
  461. q->first_to_check = add_buf(q->first_to_check, count);
  462. if (atomic_sub_return(count, &q->nr_buf_used) == 0)
  463. qperf_inc(q, inbound_queue_full);
  464. if (q->irq_ptr->perf_stat_enabled)
  465. account_sbals_error(q, count);
  466. break;
  467. case SLSB_CU_INPUT_EMPTY:
  468. case SLSB_P_INPUT_NOT_INIT:
  469. case SLSB_P_INPUT_ACK:
  470. if (q->irq_ptr->perf_stat_enabled)
  471. q->q_stats.nr_sbal_nop++;
  472. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x",
  473. q->nr, q->first_to_check);
  474. break;
  475. default:
  476. WARN_ON_ONCE(1);
  477. }
  478. out:
  479. return q->first_to_check;
  480. }
  481. static int qdio_inbound_q_moved(struct qdio_q *q)
  482. {
  483. int bufnr;
  484. bufnr = get_inbound_buffer_frontier(q);
  485. if (bufnr != q->last_move) {
  486. q->last_move = bufnr;
  487. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  488. q->u.in.timestamp = get_tod_clock();
  489. return 1;
  490. } else
  491. return 0;
  492. }
  493. static inline int qdio_inbound_q_done(struct qdio_q *q)
  494. {
  495. unsigned char state = 0;
  496. if (!atomic_read(&q->nr_buf_used))
  497. return 1;
  498. if (need_siga_sync(q))
  499. qdio_siga_sync_q(q);
  500. get_buf_state(q, q->first_to_check, &state, 0);
  501. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  502. /* more work coming */
  503. return 0;
  504. if (is_thinint_irq(q->irq_ptr))
  505. return 1;
  506. /* don't poll under z/VM */
  507. if (MACHINE_IS_VM)
  508. return 1;
  509. /*
  510. * At this point we know, that inbound first_to_check
  511. * has (probably) not moved (see qdio_inbound_processing).
  512. */
  513. if (get_tod_clock_fast() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  514. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  515. q->first_to_check);
  516. return 1;
  517. } else
  518. return 0;
  519. }
  520. static inline int contains_aobs(struct qdio_q *q)
  521. {
  522. return !q->is_input_q && q->u.out.use_cq;
  523. }
  524. static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
  525. {
  526. unsigned char state = 0;
  527. int j, b = start;
  528. if (!contains_aobs(q))
  529. return;
  530. for (j = 0; j < count; ++j) {
  531. get_buf_state(q, b, &state, 0);
  532. if (state == SLSB_P_OUTPUT_PENDING) {
  533. struct qaob *aob = q->u.out.aobs[b];
  534. if (aob == NULL)
  535. continue;
  536. q->u.out.sbal_state[b].flags |=
  537. QDIO_OUTBUF_STATE_FLAG_PENDING;
  538. q->u.out.aobs[b] = NULL;
  539. } else if (state == SLSB_P_OUTPUT_EMPTY) {
  540. q->u.out.sbal_state[b].aob = NULL;
  541. }
  542. b = next_buf(b);
  543. }
  544. }
  545. static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
  546. int bufnr)
  547. {
  548. unsigned long phys_aob = 0;
  549. if (!q->use_cq)
  550. return 0;
  551. if (!q->aobs[bufnr]) {
  552. struct qaob *aob = qdio_allocate_aob();
  553. q->aobs[bufnr] = aob;
  554. }
  555. if (q->aobs[bufnr]) {
  556. q->sbal_state[bufnr].aob = q->aobs[bufnr];
  557. q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
  558. phys_aob = virt_to_phys(q->aobs[bufnr]);
  559. WARN_ON_ONCE(phys_aob & 0xFF);
  560. }
  561. q->sbal_state[bufnr].flags = 0;
  562. return phys_aob;
  563. }
  564. static void qdio_kick_handler(struct qdio_q *q)
  565. {
  566. int start = q->first_to_kick;
  567. int end = q->first_to_check;
  568. int count;
  569. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  570. return;
  571. count = sub_buf(end, start);
  572. if (q->is_input_q) {
  573. qperf_inc(q, inbound_handler);
  574. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  575. } else {
  576. qperf_inc(q, outbound_handler);
  577. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  578. start, count);
  579. }
  580. qdio_handle_aobs(q, start, count);
  581. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  582. q->irq_ptr->int_parm);
  583. /* for the next time */
  584. q->first_to_kick = end;
  585. q->qdio_error = 0;
  586. }
  587. static inline int qdio_tasklet_schedule(struct qdio_q *q)
  588. {
  589. if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) {
  590. tasklet_schedule(&q->tasklet);
  591. return 0;
  592. }
  593. return -EPERM;
  594. }
  595. static void __qdio_inbound_processing(struct qdio_q *q)
  596. {
  597. qperf_inc(q, tasklet_inbound);
  598. if (!qdio_inbound_q_moved(q))
  599. return;
  600. qdio_kick_handler(q);
  601. if (!qdio_inbound_q_done(q)) {
  602. /* means poll time is not yet over */
  603. qperf_inc(q, tasklet_inbound_resched);
  604. if (!qdio_tasklet_schedule(q))
  605. return;
  606. }
  607. qdio_stop_polling(q);
  608. /*
  609. * We need to check again to not lose initiative after
  610. * resetting the ACK state.
  611. */
  612. if (!qdio_inbound_q_done(q)) {
  613. qperf_inc(q, tasklet_inbound_resched2);
  614. qdio_tasklet_schedule(q);
  615. }
  616. }
  617. void qdio_inbound_processing(unsigned long data)
  618. {
  619. struct qdio_q *q = (struct qdio_q *)data;
  620. __qdio_inbound_processing(q);
  621. }
  622. static int get_outbound_buffer_frontier(struct qdio_q *q)
  623. {
  624. unsigned char state = 0;
  625. int count;
  626. q->timestamp = get_tod_clock_fast();
  627. if (need_siga_sync(q))
  628. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  629. !pci_out_supported(q)) ||
  630. (queue_type(q) == QDIO_IQDIO_QFMT &&
  631. multicast_outbound(q)))
  632. qdio_siga_sync_q(q);
  633. /*
  634. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  635. * would return 0.
  636. */
  637. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  638. if (!count)
  639. goto out;
  640. count = get_buf_states(q, q->first_to_check, &state, count, 0,
  641. q->u.out.use_cq);
  642. if (!count)
  643. goto out;
  644. switch (state) {
  645. case SLSB_P_OUTPUT_EMPTY:
  646. case SLSB_P_OUTPUT_PENDING:
  647. /* the adapter got it */
  648. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  649. "out empty:%1d %02x", q->nr, count);
  650. atomic_sub(count, &q->nr_buf_used);
  651. q->first_to_check = add_buf(q->first_to_check, count);
  652. if (q->irq_ptr->perf_stat_enabled)
  653. account_sbals(q, count);
  654. break;
  655. case SLSB_P_OUTPUT_ERROR:
  656. process_buffer_error(q, count);
  657. q->first_to_check = add_buf(q->first_to_check, count);
  658. atomic_sub(count, &q->nr_buf_used);
  659. if (q->irq_ptr->perf_stat_enabled)
  660. account_sbals_error(q, count);
  661. break;
  662. case SLSB_CU_OUTPUT_PRIMED:
  663. /* the adapter has not fetched the output yet */
  664. if (q->irq_ptr->perf_stat_enabled)
  665. q->q_stats.nr_sbal_nop++;
  666. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  667. q->nr);
  668. break;
  669. case SLSB_P_OUTPUT_NOT_INIT:
  670. case SLSB_P_OUTPUT_HALTED:
  671. break;
  672. default:
  673. WARN_ON_ONCE(1);
  674. }
  675. out:
  676. return q->first_to_check;
  677. }
  678. /* all buffers processed? */
  679. static inline int qdio_outbound_q_done(struct qdio_q *q)
  680. {
  681. return atomic_read(&q->nr_buf_used) == 0;
  682. }
  683. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  684. {
  685. int bufnr;
  686. bufnr = get_outbound_buffer_frontier(q);
  687. if (bufnr != q->last_move) {
  688. q->last_move = bufnr;
  689. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  690. return 1;
  691. } else
  692. return 0;
  693. }
  694. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
  695. {
  696. int retries = 0, cc;
  697. unsigned int busy_bit;
  698. if (!need_siga_out(q))
  699. return 0;
  700. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  701. retry:
  702. qperf_inc(q, siga_write);
  703. cc = qdio_siga_output(q, &busy_bit, aob);
  704. switch (cc) {
  705. case 0:
  706. break;
  707. case 2:
  708. if (busy_bit) {
  709. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  710. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  711. goto retry;
  712. }
  713. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  714. cc = -EBUSY;
  715. } else {
  716. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  717. cc = -ENOBUFS;
  718. }
  719. break;
  720. case 1:
  721. case 3:
  722. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  723. cc = -EIO;
  724. break;
  725. }
  726. if (retries) {
  727. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  728. DBF_ERROR("count:%u", retries);
  729. }
  730. return cc;
  731. }
  732. static void __qdio_outbound_processing(struct qdio_q *q)
  733. {
  734. qperf_inc(q, tasklet_outbound);
  735. WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
  736. if (qdio_outbound_q_moved(q))
  737. qdio_kick_handler(q);
  738. if (queue_type(q) == QDIO_ZFCP_QFMT)
  739. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  740. goto sched;
  741. if (q->u.out.pci_out_enabled)
  742. return;
  743. /*
  744. * Now we know that queue type is either qeth without pci enabled
  745. * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
  746. * is noticed and outbound_handler is called after some time.
  747. */
  748. if (qdio_outbound_q_done(q))
  749. del_timer_sync(&q->u.out.timer);
  750. else
  751. if (!timer_pending(&q->u.out.timer) &&
  752. likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
  753. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  754. return;
  755. sched:
  756. qdio_tasklet_schedule(q);
  757. }
  758. /* outbound tasklet */
  759. void qdio_outbound_processing(unsigned long data)
  760. {
  761. struct qdio_q *q = (struct qdio_q *)data;
  762. __qdio_outbound_processing(q);
  763. }
  764. void qdio_outbound_timer(struct timer_list *t)
  765. {
  766. struct qdio_q *q = from_timer(q, t, u.out.timer);
  767. qdio_tasklet_schedule(q);
  768. }
  769. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  770. {
  771. struct qdio_q *out;
  772. int i;
  773. if (!pci_out_supported(q))
  774. return;
  775. for_each_output_queue(q->irq_ptr, out, i)
  776. if (!qdio_outbound_q_done(out))
  777. qdio_tasklet_schedule(out);
  778. }
  779. static void __tiqdio_inbound_processing(struct qdio_q *q)
  780. {
  781. qperf_inc(q, tasklet_inbound);
  782. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  783. qdio_sync_queues(q);
  784. /*
  785. * The interrupt could be caused by a PCI request. Check the
  786. * PCI capable outbound queues.
  787. */
  788. qdio_check_outbound_after_thinint(q);
  789. if (!qdio_inbound_q_moved(q))
  790. return;
  791. qdio_kick_handler(q);
  792. if (!qdio_inbound_q_done(q)) {
  793. qperf_inc(q, tasklet_inbound_resched);
  794. if (!qdio_tasklet_schedule(q))
  795. return;
  796. }
  797. qdio_stop_polling(q);
  798. /*
  799. * We need to check again to not lose initiative after
  800. * resetting the ACK state.
  801. */
  802. if (!qdio_inbound_q_done(q)) {
  803. qperf_inc(q, tasklet_inbound_resched2);
  804. qdio_tasklet_schedule(q);
  805. }
  806. }
  807. void tiqdio_inbound_processing(unsigned long data)
  808. {
  809. struct qdio_q *q = (struct qdio_q *)data;
  810. __tiqdio_inbound_processing(q);
  811. }
  812. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  813. enum qdio_irq_states state)
  814. {
  815. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  816. irq_ptr->state = state;
  817. mb();
  818. }
  819. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  820. {
  821. if (irb->esw.esw0.erw.cons) {
  822. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  823. DBF_ERROR_HEX(irb, 64);
  824. DBF_ERROR_HEX(irb->ecw, 64);
  825. }
  826. }
  827. /* PCI interrupt handler */
  828. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  829. {
  830. int i;
  831. struct qdio_q *q;
  832. if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  833. return;
  834. for_each_input_queue(irq_ptr, q, i) {
  835. if (q->u.in.queue_start_poll) {
  836. /* skip if polling is enabled or already in work */
  837. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  838. &q->u.in.queue_irq_state)) {
  839. qperf_inc(q, int_discarded);
  840. continue;
  841. }
  842. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  843. q->irq_ptr->int_parm);
  844. } else {
  845. tasklet_schedule(&q->tasklet);
  846. }
  847. }
  848. if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
  849. return;
  850. for_each_output_queue(irq_ptr, q, i) {
  851. if (qdio_outbound_q_done(q))
  852. continue;
  853. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  854. qdio_siga_sync_q(q);
  855. qdio_tasklet_schedule(q);
  856. }
  857. }
  858. static void qdio_handle_activate_check(struct ccw_device *cdev,
  859. unsigned long intparm, int cstat, int dstat)
  860. {
  861. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  862. struct qdio_q *q;
  863. int count;
  864. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  865. DBF_ERROR("intp :%lx", intparm);
  866. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  867. if (irq_ptr->nr_input_qs) {
  868. q = irq_ptr->input_qs[0];
  869. } else if (irq_ptr->nr_output_qs) {
  870. q = irq_ptr->output_qs[0];
  871. } else {
  872. dump_stack();
  873. goto no_handler;
  874. }
  875. count = sub_buf(q->first_to_check, q->first_to_kick);
  876. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
  877. q->nr, q->first_to_kick, count, irq_ptr->int_parm);
  878. no_handler:
  879. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  880. /*
  881. * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
  882. * Therefore we call the LGR detection function here.
  883. */
  884. lgr_info_log();
  885. }
  886. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  887. int dstat)
  888. {
  889. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  890. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  891. if (cstat)
  892. goto error;
  893. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  894. goto error;
  895. if (!(dstat & DEV_STAT_DEV_END))
  896. goto error;
  897. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  898. return;
  899. error:
  900. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  901. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  902. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  903. }
  904. /* qdio interrupt handler */
  905. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  906. struct irb *irb)
  907. {
  908. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  909. struct subchannel_id schid;
  910. int cstat, dstat;
  911. if (!intparm || !irq_ptr) {
  912. ccw_device_get_schid(cdev, &schid);
  913. DBF_ERROR("qint:%4x", schid.sch_no);
  914. return;
  915. }
  916. if (irq_ptr->perf_stat_enabled)
  917. irq_ptr->perf_stat.qdio_int++;
  918. if (IS_ERR(irb)) {
  919. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  920. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  921. wake_up(&cdev->private->wait_q);
  922. return;
  923. }
  924. qdio_irq_check_sense(irq_ptr, irb);
  925. cstat = irb->scsw.cmd.cstat;
  926. dstat = irb->scsw.cmd.dstat;
  927. switch (irq_ptr->state) {
  928. case QDIO_IRQ_STATE_INACTIVE:
  929. qdio_establish_handle_irq(cdev, cstat, dstat);
  930. break;
  931. case QDIO_IRQ_STATE_CLEANUP:
  932. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  933. break;
  934. case QDIO_IRQ_STATE_ESTABLISHED:
  935. case QDIO_IRQ_STATE_ACTIVE:
  936. if (cstat & SCHN_STAT_PCI) {
  937. qdio_int_handler_pci(irq_ptr);
  938. return;
  939. }
  940. if (cstat || dstat)
  941. qdio_handle_activate_check(cdev, intparm, cstat,
  942. dstat);
  943. break;
  944. case QDIO_IRQ_STATE_STOPPED:
  945. break;
  946. default:
  947. WARN_ON_ONCE(1);
  948. }
  949. wake_up(&cdev->private->wait_q);
  950. }
  951. /**
  952. * qdio_get_ssqd_desc - get qdio subchannel description
  953. * @cdev: ccw device to get description for
  954. * @data: where to store the ssqd
  955. *
  956. * Returns 0 or an error code. The results of the chsc are stored in the
  957. * specified structure.
  958. */
  959. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  960. struct qdio_ssqd_desc *data)
  961. {
  962. struct subchannel_id schid;
  963. if (!cdev || !cdev->private)
  964. return -EINVAL;
  965. ccw_device_get_schid(cdev, &schid);
  966. DBF_EVENT("get ssqd:%4x", schid.sch_no);
  967. return qdio_setup_get_ssqd(NULL, &schid, data);
  968. }
  969. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  970. static void qdio_shutdown_queues(struct ccw_device *cdev)
  971. {
  972. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  973. struct qdio_q *q;
  974. int i;
  975. for_each_input_queue(irq_ptr, q, i)
  976. tasklet_kill(&q->tasklet);
  977. for_each_output_queue(irq_ptr, q, i) {
  978. del_timer_sync(&q->u.out.timer);
  979. tasklet_kill(&q->tasklet);
  980. }
  981. }
  982. /**
  983. * qdio_shutdown - shut down a qdio subchannel
  984. * @cdev: associated ccw device
  985. * @how: use halt or clear to shutdown
  986. */
  987. int qdio_shutdown(struct ccw_device *cdev, int how)
  988. {
  989. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  990. struct subchannel_id schid;
  991. int rc;
  992. if (!irq_ptr)
  993. return -ENODEV;
  994. WARN_ON_ONCE(irqs_disabled());
  995. ccw_device_get_schid(cdev, &schid);
  996. DBF_EVENT("qshutdown:%4x", schid.sch_no);
  997. mutex_lock(&irq_ptr->setup_mutex);
  998. /*
  999. * Subchannel was already shot down. We cannot prevent being called
  1000. * twice since cio may trigger a shutdown asynchronously.
  1001. */
  1002. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1003. mutex_unlock(&irq_ptr->setup_mutex);
  1004. return 0;
  1005. }
  1006. /*
  1007. * Indicate that the device is going down. Scheduling the queue
  1008. * tasklets is forbidden from here on.
  1009. */
  1010. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  1011. tiqdio_remove_input_queues(irq_ptr);
  1012. qdio_shutdown_queues(cdev);
  1013. qdio_shutdown_debug_entries(irq_ptr);
  1014. /* cleanup subchannel */
  1015. spin_lock_irq(get_ccwdev_lock(cdev));
  1016. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  1017. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  1018. else
  1019. /* default behaviour is halt */
  1020. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  1021. if (rc) {
  1022. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  1023. DBF_ERROR("rc:%4d", rc);
  1024. goto no_cleanup;
  1025. }
  1026. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  1027. spin_unlock_irq(get_ccwdev_lock(cdev));
  1028. wait_event_interruptible_timeout(cdev->private->wait_q,
  1029. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  1030. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  1031. 10 * HZ);
  1032. spin_lock_irq(get_ccwdev_lock(cdev));
  1033. no_cleanup:
  1034. qdio_shutdown_thinint(irq_ptr);
  1035. /* restore interrupt handler */
  1036. if ((void *)cdev->handler == (void *)qdio_int_handler) {
  1037. cdev->handler = irq_ptr->orig_handler;
  1038. cdev->private->intparm = 0;
  1039. }
  1040. spin_unlock_irq(get_ccwdev_lock(cdev));
  1041. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1042. mutex_unlock(&irq_ptr->setup_mutex);
  1043. if (rc)
  1044. return rc;
  1045. return 0;
  1046. }
  1047. EXPORT_SYMBOL_GPL(qdio_shutdown);
  1048. /**
  1049. * qdio_free - free data structures for a qdio subchannel
  1050. * @cdev: associated ccw device
  1051. */
  1052. int qdio_free(struct ccw_device *cdev)
  1053. {
  1054. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1055. struct subchannel_id schid;
  1056. if (!irq_ptr)
  1057. return -ENODEV;
  1058. ccw_device_get_schid(cdev, &schid);
  1059. DBF_EVENT("qfree:%4x", schid.sch_no);
  1060. DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned");
  1061. mutex_lock(&irq_ptr->setup_mutex);
  1062. irq_ptr->debug_area = NULL;
  1063. cdev->private->qdio_data = NULL;
  1064. mutex_unlock(&irq_ptr->setup_mutex);
  1065. qdio_release_memory(irq_ptr);
  1066. return 0;
  1067. }
  1068. EXPORT_SYMBOL_GPL(qdio_free);
  1069. /**
  1070. * qdio_allocate - allocate qdio queues and associated data
  1071. * @init_data: initialization data
  1072. */
  1073. int qdio_allocate(struct qdio_initialize *init_data)
  1074. {
  1075. struct subchannel_id schid;
  1076. struct qdio_irq *irq_ptr;
  1077. ccw_device_get_schid(init_data->cdev, &schid);
  1078. DBF_EVENT("qallocate:%4x", schid.sch_no);
  1079. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1080. (init_data->no_output_qs && !init_data->output_handler))
  1081. return -EINVAL;
  1082. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1083. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1084. return -EINVAL;
  1085. if ((!init_data->input_sbal_addr_array) ||
  1086. (!init_data->output_sbal_addr_array))
  1087. return -EINVAL;
  1088. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1089. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1090. if (!irq_ptr)
  1091. goto out_err;
  1092. mutex_init(&irq_ptr->setup_mutex);
  1093. if (qdio_allocate_dbf(init_data, irq_ptr))
  1094. goto out_rel;
  1095. /*
  1096. * Allocate a page for the chsc calls in qdio_establish.
  1097. * Must be pre-allocated since a zfcp recovery will call
  1098. * qdio_establish. In case of low memory and swap on a zfcp disk
  1099. * we may not be able to allocate memory otherwise.
  1100. */
  1101. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1102. if (!irq_ptr->chsc_page)
  1103. goto out_rel;
  1104. /* qdr is used in ccw1.cda which is u32 */
  1105. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1106. if (!irq_ptr->qdr)
  1107. goto out_rel;
  1108. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1109. init_data->no_output_qs))
  1110. goto out_rel;
  1111. init_data->cdev->private->qdio_data = irq_ptr;
  1112. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1113. return 0;
  1114. out_rel:
  1115. qdio_release_memory(irq_ptr);
  1116. out_err:
  1117. return -ENOMEM;
  1118. }
  1119. EXPORT_SYMBOL_GPL(qdio_allocate);
  1120. static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
  1121. {
  1122. struct qdio_q *q = irq_ptr->input_qs[0];
  1123. int i, use_cq = 0;
  1124. if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
  1125. use_cq = 1;
  1126. for_each_output_queue(irq_ptr, q, i) {
  1127. if (use_cq) {
  1128. if (qdio_enable_async_operation(&q->u.out) < 0) {
  1129. use_cq = 0;
  1130. continue;
  1131. }
  1132. } else
  1133. qdio_disable_async_operation(&q->u.out);
  1134. }
  1135. DBF_EVENT("use_cq:%d", use_cq);
  1136. }
  1137. /**
  1138. * qdio_establish - establish queues on a qdio subchannel
  1139. * @init_data: initialization data
  1140. */
  1141. int qdio_establish(struct qdio_initialize *init_data)
  1142. {
  1143. struct ccw_device *cdev = init_data->cdev;
  1144. struct subchannel_id schid;
  1145. struct qdio_irq *irq_ptr;
  1146. int rc;
  1147. ccw_device_get_schid(cdev, &schid);
  1148. DBF_EVENT("qestablish:%4x", schid.sch_no);
  1149. irq_ptr = cdev->private->qdio_data;
  1150. if (!irq_ptr)
  1151. return -ENODEV;
  1152. mutex_lock(&irq_ptr->setup_mutex);
  1153. qdio_setup_irq(init_data);
  1154. rc = qdio_establish_thinint(irq_ptr);
  1155. if (rc) {
  1156. mutex_unlock(&irq_ptr->setup_mutex);
  1157. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1158. return rc;
  1159. }
  1160. /* establish q */
  1161. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1162. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1163. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1164. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1165. spin_lock_irq(get_ccwdev_lock(cdev));
  1166. ccw_device_set_options_mask(cdev, 0);
  1167. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1168. spin_unlock_irq(get_ccwdev_lock(cdev));
  1169. if (rc) {
  1170. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1171. DBF_ERROR("rc:%4x", rc);
  1172. mutex_unlock(&irq_ptr->setup_mutex);
  1173. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1174. return rc;
  1175. }
  1176. wait_event_interruptible_timeout(cdev->private->wait_q,
  1177. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1178. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1179. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1180. mutex_unlock(&irq_ptr->setup_mutex);
  1181. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1182. return -EIO;
  1183. }
  1184. qdio_setup_ssqd_info(irq_ptr);
  1185. qdio_detect_hsicq(irq_ptr);
  1186. /* qebsm is now setup if available, initialize buffer states */
  1187. qdio_init_buf_states(irq_ptr);
  1188. mutex_unlock(&irq_ptr->setup_mutex);
  1189. qdio_print_subchannel_info(irq_ptr, cdev);
  1190. qdio_setup_debug_entries(irq_ptr, cdev);
  1191. return 0;
  1192. }
  1193. EXPORT_SYMBOL_GPL(qdio_establish);
  1194. /**
  1195. * qdio_activate - activate queues on a qdio subchannel
  1196. * @cdev: associated cdev
  1197. */
  1198. int qdio_activate(struct ccw_device *cdev)
  1199. {
  1200. struct subchannel_id schid;
  1201. struct qdio_irq *irq_ptr;
  1202. int rc;
  1203. ccw_device_get_schid(cdev, &schid);
  1204. DBF_EVENT("qactivate:%4x", schid.sch_no);
  1205. irq_ptr = cdev->private->qdio_data;
  1206. if (!irq_ptr)
  1207. return -ENODEV;
  1208. mutex_lock(&irq_ptr->setup_mutex);
  1209. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1210. rc = -EBUSY;
  1211. goto out;
  1212. }
  1213. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1214. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1215. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1216. irq_ptr->ccw.cda = 0;
  1217. spin_lock_irq(get_ccwdev_lock(cdev));
  1218. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1219. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1220. 0, DOIO_DENY_PREFETCH);
  1221. spin_unlock_irq(get_ccwdev_lock(cdev));
  1222. if (rc) {
  1223. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1224. DBF_ERROR("rc:%4x", rc);
  1225. goto out;
  1226. }
  1227. if (is_thinint_irq(irq_ptr))
  1228. tiqdio_add_input_queues(irq_ptr);
  1229. /* wait for subchannel to become active */
  1230. msleep(5);
  1231. switch (irq_ptr->state) {
  1232. case QDIO_IRQ_STATE_STOPPED:
  1233. case QDIO_IRQ_STATE_ERR:
  1234. rc = -EIO;
  1235. break;
  1236. default:
  1237. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1238. rc = 0;
  1239. }
  1240. out:
  1241. mutex_unlock(&irq_ptr->setup_mutex);
  1242. return rc;
  1243. }
  1244. EXPORT_SYMBOL_GPL(qdio_activate);
  1245. static inline int buf_in_between(int bufnr, int start, int count)
  1246. {
  1247. int end = add_buf(start, count);
  1248. if (end > start) {
  1249. if (bufnr >= start && bufnr < end)
  1250. return 1;
  1251. else
  1252. return 0;
  1253. }
  1254. /* wrap-around case */
  1255. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1256. (bufnr < end))
  1257. return 1;
  1258. else
  1259. return 0;
  1260. }
  1261. /**
  1262. * handle_inbound - reset processed input buffers
  1263. * @q: queue containing the buffers
  1264. * @callflags: flags
  1265. * @bufnr: first buffer to process
  1266. * @count: how many buffers are emptied
  1267. */
  1268. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1269. int bufnr, int count)
  1270. {
  1271. int diff;
  1272. qperf_inc(q, inbound_call);
  1273. if (!q->u.in.polling)
  1274. goto set;
  1275. /* protect against stop polling setting an ACK for an emptied slsb */
  1276. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1277. /* overwriting everything, just delete polling status */
  1278. q->u.in.polling = 0;
  1279. q->u.in.ack_count = 0;
  1280. goto set;
  1281. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1282. if (is_qebsm(q)) {
  1283. /* partial overwrite, just update ack_start */
  1284. diff = add_buf(bufnr, count);
  1285. diff = sub_buf(diff, q->u.in.ack_start);
  1286. q->u.in.ack_count -= diff;
  1287. if (q->u.in.ack_count <= 0) {
  1288. q->u.in.polling = 0;
  1289. q->u.in.ack_count = 0;
  1290. goto set;
  1291. }
  1292. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1293. }
  1294. else
  1295. /* the only ACK will be deleted, so stop polling */
  1296. q->u.in.polling = 0;
  1297. }
  1298. set:
  1299. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1300. atomic_add(count, &q->nr_buf_used);
  1301. if (need_siga_in(q))
  1302. return qdio_siga_input(q);
  1303. return 0;
  1304. }
  1305. /**
  1306. * handle_outbound - process filled outbound buffers
  1307. * @q: queue containing the buffers
  1308. * @callflags: flags
  1309. * @bufnr: first buffer to process
  1310. * @count: how many buffers are filled
  1311. */
  1312. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1313. int bufnr, int count)
  1314. {
  1315. unsigned char state = 0;
  1316. int used, rc = 0;
  1317. qperf_inc(q, outbound_call);
  1318. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1319. used = atomic_add_return(count, &q->nr_buf_used);
  1320. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1321. qperf_inc(q, outbound_queue_full);
  1322. if (callflags & QDIO_FLAG_PCI_OUT) {
  1323. q->u.out.pci_out_enabled = 1;
  1324. qperf_inc(q, pci_request_int);
  1325. } else
  1326. q->u.out.pci_out_enabled = 0;
  1327. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1328. unsigned long phys_aob = 0;
  1329. /* One SIGA-W per buffer required for unicast HSI */
  1330. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1331. phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
  1332. rc = qdio_kick_outbound_q(q, phys_aob);
  1333. } else if (need_siga_sync(q)) {
  1334. rc = qdio_siga_sync_q(q);
  1335. } else if (count < QDIO_MAX_BUFFERS_PER_Q &&
  1336. get_buf_state(q, prev_buf(bufnr), &state, 0) > 0 &&
  1337. state == SLSB_CU_OUTPUT_PRIMED) {
  1338. /* The previous buffer is not processed yet, tack on. */
  1339. qperf_inc(q, fast_requeue);
  1340. } else {
  1341. rc = qdio_kick_outbound_q(q, 0);
  1342. }
  1343. /* in case of SIGA errors we must process the error immediately */
  1344. if (used >= q->u.out.scan_threshold || rc)
  1345. qdio_tasklet_schedule(q);
  1346. else
  1347. /* free the SBALs in case of no further traffic */
  1348. if (!timer_pending(&q->u.out.timer) &&
  1349. likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
  1350. mod_timer(&q->u.out.timer, jiffies + HZ);
  1351. return rc;
  1352. }
  1353. /**
  1354. * do_QDIO - process input or output buffers
  1355. * @cdev: associated ccw_device for the qdio subchannel
  1356. * @callflags: input or output and special flags from the program
  1357. * @q_nr: queue number
  1358. * @bufnr: buffer number
  1359. * @count: how many buffers to process
  1360. */
  1361. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1362. int q_nr, unsigned int bufnr, unsigned int count)
  1363. {
  1364. struct qdio_irq *irq_ptr;
  1365. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1366. return -EINVAL;
  1367. irq_ptr = cdev->private->qdio_data;
  1368. if (!irq_ptr)
  1369. return -ENODEV;
  1370. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1371. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1372. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1373. return -EIO;
  1374. if (!count)
  1375. return 0;
  1376. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1377. return handle_inbound(irq_ptr->input_qs[q_nr],
  1378. callflags, bufnr, count);
  1379. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1380. return handle_outbound(irq_ptr->output_qs[q_nr],
  1381. callflags, bufnr, count);
  1382. return -EINVAL;
  1383. }
  1384. EXPORT_SYMBOL_GPL(do_QDIO);
  1385. /**
  1386. * qdio_start_irq - process input buffers
  1387. * @cdev: associated ccw_device for the qdio subchannel
  1388. * @nr: input queue number
  1389. *
  1390. * Return codes
  1391. * 0 - success
  1392. * 1 - irqs not started since new data is available
  1393. */
  1394. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1395. {
  1396. struct qdio_q *q;
  1397. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1398. if (!irq_ptr)
  1399. return -ENODEV;
  1400. q = irq_ptr->input_qs[nr];
  1401. clear_nonshared_ind(irq_ptr);
  1402. qdio_stop_polling(q);
  1403. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1404. /*
  1405. * We need to check again to not lose initiative after
  1406. * resetting the ACK state.
  1407. */
  1408. if (test_nonshared_ind(irq_ptr))
  1409. goto rescan;
  1410. if (!qdio_inbound_q_done(q))
  1411. goto rescan;
  1412. return 0;
  1413. rescan:
  1414. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1415. &q->u.in.queue_irq_state))
  1416. return 0;
  1417. else
  1418. return 1;
  1419. }
  1420. EXPORT_SYMBOL(qdio_start_irq);
  1421. /**
  1422. * qdio_get_next_buffers - process input buffers
  1423. * @cdev: associated ccw_device for the qdio subchannel
  1424. * @nr: input queue number
  1425. * @bufnr: first filled buffer number
  1426. * @error: buffers are in error state
  1427. *
  1428. * Return codes
  1429. * < 0 - error
  1430. * = 0 - no new buffers found
  1431. * > 0 - number of processed buffers
  1432. */
  1433. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1434. int *error)
  1435. {
  1436. struct qdio_q *q;
  1437. int start, end;
  1438. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1439. if (!irq_ptr)
  1440. return -ENODEV;
  1441. q = irq_ptr->input_qs[nr];
  1442. /*
  1443. * Cannot rely on automatic sync after interrupt since queues may
  1444. * also be examined without interrupt.
  1445. */
  1446. if (need_siga_sync(q))
  1447. qdio_sync_queues(q);
  1448. /* check the PCI capable outbound queues. */
  1449. qdio_check_outbound_after_thinint(q);
  1450. if (!qdio_inbound_q_moved(q))
  1451. return 0;
  1452. /* Note: upper-layer MUST stop processing immediately here ... */
  1453. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1454. return -EIO;
  1455. start = q->first_to_kick;
  1456. end = q->first_to_check;
  1457. *bufnr = start;
  1458. *error = q->qdio_error;
  1459. /* for the next time */
  1460. q->first_to_kick = end;
  1461. q->qdio_error = 0;
  1462. return sub_buf(end, start);
  1463. }
  1464. EXPORT_SYMBOL(qdio_get_next_buffers);
  1465. /**
  1466. * qdio_stop_irq - disable interrupt processing for the device
  1467. * @cdev: associated ccw_device for the qdio subchannel
  1468. * @nr: input queue number
  1469. *
  1470. * Return codes
  1471. * 0 - interrupts were already disabled
  1472. * 1 - interrupts successfully disabled
  1473. */
  1474. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1475. {
  1476. struct qdio_q *q;
  1477. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1478. if (!irq_ptr)
  1479. return -ENODEV;
  1480. q = irq_ptr->input_qs[nr];
  1481. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1482. &q->u.in.queue_irq_state))
  1483. return 0;
  1484. else
  1485. return 1;
  1486. }
  1487. EXPORT_SYMBOL(qdio_stop_irq);
  1488. /**
  1489. * qdio_pnso_brinfo() - perform network subchannel op #0 - bridge info.
  1490. * @schid: Subchannel ID.
  1491. * @cnc: Boolean Change-Notification Control
  1492. * @response: Response code will be stored at this address
  1493. * @cb: Callback function will be executed for each element
  1494. * of the address list
  1495. * @priv: Pointer to pass to the callback function.
  1496. *
  1497. * Performs "Store-network-bridging-information list" operation and calls
  1498. * the callback function for every entry in the list. If "change-
  1499. * notification-control" is set, further changes in the address list
  1500. * will be reported via the IPA command.
  1501. */
  1502. int qdio_pnso_brinfo(struct subchannel_id schid,
  1503. int cnc, u16 *response,
  1504. void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
  1505. void *entry),
  1506. void *priv)
  1507. {
  1508. struct chsc_pnso_area *rr;
  1509. int rc;
  1510. u32 prev_instance = 0;
  1511. int isfirstblock = 1;
  1512. int i, size, elems;
  1513. rr = (struct chsc_pnso_area *)get_zeroed_page(GFP_KERNEL);
  1514. if (rr == NULL)
  1515. return -ENOMEM;
  1516. do {
  1517. /* on the first iteration, naihdr.resume_token will be zero */
  1518. rc = chsc_pnso_brinfo(schid, rr, rr->naihdr.resume_token, cnc);
  1519. if (rc != 0 && rc != -EBUSY)
  1520. goto out;
  1521. if (rr->response.code != 1) {
  1522. rc = -EIO;
  1523. continue;
  1524. } else
  1525. rc = 0;
  1526. if (cb == NULL)
  1527. continue;
  1528. size = rr->naihdr.naids;
  1529. elems = (rr->response.length -
  1530. sizeof(struct chsc_header) -
  1531. sizeof(struct chsc_brinfo_naihdr)) /
  1532. size;
  1533. if (!isfirstblock && (rr->naihdr.instance != prev_instance)) {
  1534. /* Inform the caller that they need to scrap */
  1535. /* the data that was already reported via cb */
  1536. rc = -EAGAIN;
  1537. break;
  1538. }
  1539. isfirstblock = 0;
  1540. prev_instance = rr->naihdr.instance;
  1541. for (i = 0; i < elems; i++)
  1542. switch (size) {
  1543. case sizeof(struct qdio_brinfo_entry_l3_ipv6):
  1544. (*cb)(priv, l3_ipv6_addr,
  1545. &rr->entries.l3_ipv6[i]);
  1546. break;
  1547. case sizeof(struct qdio_brinfo_entry_l3_ipv4):
  1548. (*cb)(priv, l3_ipv4_addr,
  1549. &rr->entries.l3_ipv4[i]);
  1550. break;
  1551. case sizeof(struct qdio_brinfo_entry_l2):
  1552. (*cb)(priv, l2_addr_lnid,
  1553. &rr->entries.l2[i]);
  1554. break;
  1555. default:
  1556. WARN_ON_ONCE(1);
  1557. rc = -EIO;
  1558. goto out;
  1559. }
  1560. } while (rr->response.code == 0x0107 || /* channel busy */
  1561. (rr->response.code == 1 && /* list stored */
  1562. /* resume token is non-zero => list incomplete */
  1563. (rr->naihdr.resume_token.t1 || rr->naihdr.resume_token.t2)));
  1564. (*response) = rr->response.code;
  1565. out:
  1566. free_page((unsigned long)rr);
  1567. return rc;
  1568. }
  1569. EXPORT_SYMBOL_GPL(qdio_pnso_brinfo);
  1570. static int __init init_QDIO(void)
  1571. {
  1572. int rc;
  1573. rc = qdio_debug_init();
  1574. if (rc)
  1575. return rc;
  1576. rc = qdio_setup_init();
  1577. if (rc)
  1578. goto out_debug;
  1579. rc = tiqdio_allocate_memory();
  1580. if (rc)
  1581. goto out_cache;
  1582. rc = tiqdio_register_thinints();
  1583. if (rc)
  1584. goto out_ti;
  1585. return 0;
  1586. out_ti:
  1587. tiqdio_free_memory();
  1588. out_cache:
  1589. qdio_setup_exit();
  1590. out_debug:
  1591. qdio_debug_exit();
  1592. return rc;
  1593. }
  1594. static void __exit exit_QDIO(void)
  1595. {
  1596. tiqdio_unregister_thinints();
  1597. tiqdio_free_memory();
  1598. qdio_setup_exit();
  1599. qdio_debug_exit();
  1600. }
  1601. module_init(init_QDIO);
  1602. module_exit(exit_QDIO);