hx170dec.c 21 KB

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  1. /*
  2. * On2/Hantro G1 decoder/pp driver. Single core version.
  3. *
  4. * Copyright (C) 2009 Hantro Products Oy.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/of.h>
  22. #include <linux/clk.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/io.h>
  25. #include <linux/err.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/fs.h>
  28. #include <linux/uaccess.h>
  29. #include <linux/sched.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/delay.h>
  32. #include "hx170dec.h"
  33. #include "vdec.h"
  34. #include "jpegdecapi.h"
  35. #include "jpegdeccontainer.h"
  36. struct vdec_device *vdec6731_global;
  37. unsigned int animation_jpegPhyaddr;
  38. unsigned int dis_decWidth;
  39. unsigned int dis_decHeight;
  40. unsigned int dis_format;
  41. static struct mfc_jpeg_context *vde_jpeg_context = NULL;
  42. #define MAX_ANIMFRAME_WIDTH 1920
  43. #define MAX_ANIMFRAME_HEIGHT 1088
  44. #define MAX_ANIMFRAME_SIZE (MAX_ANIMFRAME_WIDTH * MAX_ANIMFRAME_HEIGHT * 4)
  45. extern int ark_bootanimation_display_init(int width, int height, unsigned int yaddr,unsigned int uaddr,unsigned int vadd,unsigned int format);
  46. extern int ark_bootanimation_display_uninit(void);
  47. extern int ark_bootanimation_set_display_addr(unsigned int yaddr,unsigned int uaddr,unsigned int vaddr,unsigned int format);
  48. int get_bootanimation_status(void)
  49. {
  50. return vde_jpeg_context->anmation_stats;
  51. }
  52. EXPORT_SYMBOL(get_bootanimation_status);
  53. static inline void vdec_writel(const struct vdec_device *p, unsigned offset, u32 val)
  54. {
  55. volatile u32 tmp = readl(p->mmio_base + offset);
  56. (void)tmp;
  57. writel(val, p->mmio_base + offset);
  58. }
  59. static inline u32 vdec_readl(const struct vdec_device *p, unsigned offset)
  60. {
  61. return readl(p->mmio_base + offset);
  62. }
  63. /**
  64. * Write a range of registers. First register is assumed to be
  65. * "Interrupt Register" and will be written last.
  66. */
  67. static int vdec_regs_write(struct vdec_device *p, int begin, int end,
  68. const struct core_desc *core)
  69. {
  70. int i;
  71. if (copy_from_user(&p->regs[begin], core->regs, (end - begin + 1) * 4))
  72. {
  73. dev_err(p->dev, "%s: copy_from_user failed\n", __func__);
  74. return -EFAULT;
  75. }
  76. for (i = end; i >= begin; i--)
  77. vdec_writel(p, 4 * i, p->regs[i]);
  78. return 0;
  79. }
  80. /**
  81. * Read a range of registers [begin..end]
  82. */
  83. static int vdec_regs_read(struct vdec_device *p, int begin, int end,
  84. const struct core_desc *core)
  85. {
  86. int i;
  87. for (i = end; i >= begin; i--)
  88. p->regs[i] = vdec_readl(p, 4 * i);
  89. if (copy_to_user(core->regs, &p->regs[begin], (end - begin + 1) * 4))
  90. {
  91. dev_err(p->dev, "%s: copy_to_user failed\n", __func__);
  92. return -EFAULT;
  93. }
  94. return 0;
  95. }
  96. //mfc jpeg decode
  97. #define MKTAG(a,b,c,d) ((a) | ((b) << 8) | ((c) << 16) | ((unsigned)(d) << 24))
  98. typedef struct {
  99. unsigned int magic;
  100. int hasBootlogo;
  101. int bootlogoDisplayTime;
  102. int aniCount;
  103. int aniWidth;
  104. int aniHeight;
  105. int aniFps;
  106. int aniDelayHideTime;
  107. int reserved[4];
  108. } BANIHEADER;
  109. static int mfc_jpeg_decode(unsigned int src_addr,unsigned int pvSrc_addr,
  110. unsigned int dest_addr, unsigned int pvDest_addr,
  111. unsigned int size)
  112. {
  113. int ret = 0;
  114. JpegDecInst decoder;
  115. JpegDecRet infoRet;
  116. JpegDecInput DecIn;
  117. JpegDecImageInfo DecImgInf;
  118. JpegDecOutput DecOut;
  119. infoRet = JpegDecInit(&decoder);
  120. if(infoRet !=JPEGDEC_OK) {
  121. printk("JpegDecInit failure %d.\n", infoRet);
  122. return -1;
  123. }
  124. DecIn.decImageType = JPEGDEC_IMAGE;
  125. DecIn.sliceMbSet = 0;
  126. DecIn.bufferSize = 0;
  127. DecIn.streamLength = size;
  128. DecIn.streamBuffer.busAddress= src_addr;
  129. DecIn.streamBuffer.pVirtualAddress = (u32*)pvSrc_addr;
  130. /* Get image information of the JFIF */
  131. infoRet = JpegDecGetImageInfo(decoder,
  132. &DecIn,
  133. &DecImgInf);
  134. if(infoRet !=JPEGDEC_OK)
  135. {
  136. printk("JpegDecGetImageInfo failure.\n");
  137. ret = -1;
  138. goto dec_end;
  139. }
  140. // printk("mfc_jpeg_decode outputWidth %d,outputHeight %d,outputFormat 0x%x\n",DecImgInf.outputWidth,DecImgInf.outputHeight,DecImgInf.outputFormat);
  141. dis_decWidth = DecImgInf.outputWidth;
  142. dis_decHeight=DecImgInf.outputHeight;
  143. dis_format = DecImgInf.outputFormat;
  144. DecIn.pictureBufferY.busAddress = dest_addr;
  145. DecIn.pictureBufferY.pVirtualAddress = (u32*)pvDest_addr;
  146. DecIn.pictureBufferCbCr.busAddress = dest_addr + DecImgInf.outputWidth * DecImgInf.outputHeight;
  147. DecIn.pictureBufferCbCr.pVirtualAddress = (u32*)(pvDest_addr + DecImgInf.outputWidth * DecImgInf.outputHeight);
  148. DecIn.pictureBufferCr.busAddress = 0;
  149. DecIn.pictureBufferCr.pVirtualAddress = 0;
  150. /* Decode JFIF */
  151. infoRet = JpegDecDecode(decoder, &DecIn, &DecOut);
  152. if(infoRet != JPEGDEC_FRAME_READY)
  153. {
  154. printk("JpegDecDecode failure, ret=%d\n", infoRet);
  155. ret = -1;
  156. goto dec_end;
  157. }
  158. dec_end:
  159. JpegDecRelease(decoder);
  160. return 0;
  161. }
  162. //extern int ark_carback_get_status(void);
  163. static void animation_dec_work(struct work_struct *work)
  164. {
  165. static unsigned int frame = 0;
  166. static int timeout_count = 0;
  167. struct mfc_jpeg_context *context = container_of(work, struct mfc_jpeg_context, animation_work);
  168. BANIHEADER *header = (BANIHEADER *) context->animation_data_virtaddr;
  169. unsigned int size =
  170. *(unsigned int *)(context->animation_data_virtaddr + context->animation_file_phyaddr -
  171. context->animation_data_phyaddr);
  172. struct vdec_device *p = vdec6731_global;
  173. if (timeout_count > 50) {
  174. printk(KERN_ALERT "%s Error! Dec timeout.\n", __FUNCTION__);
  175. context->animation_end = true;
  176. } else if (context->animation_file_phyaddr + size >= context->animation_data_phyaddr + context->animation_data_size
  177. && frame < header->aniCount + header->hasBootlogo ? 1 : 0) {
  178. printk(KERN_ALERT "%s Error! Animation data is beyond the mark.\n", __FUNCTION__);
  179. context->animation_end = true;
  180. }
  181. if (context->animation_end) {
  182. ark_bootanimation_display_uninit();
  183. if (context->animation_display_phyaddr){
  184. dma_free_coherent(context->dev, context->animation_display_size,
  185. (void *)context->animation_display_virtaddr,
  186. context->animation_display_phyaddr);
  187. }
  188. iounmap((void*)context->animation_data_virtaddr);
  189. p->context.anmation_stats = 0;
  190. destroy_workqueue(context->animation_queue);
  191. return;
  192. }
  193. if (frame > 0) {
  194. if (!context->animation_dec_finish) {
  195. timeout_count++;
  196. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(10));
  197. return;
  198. }
  199. timeout_count = 0;
  200. }
  201. if (frame == header->aniCount + header->hasBootlogo ? 1 : 0) {
  202. if (!context->animation_dec_finish) {
  203. timeout_count++;
  204. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(10));
  205. return;
  206. }
  207. timeout_count = 0;
  208. context->animation_end = true;
  209. if (header->aniCount > 0) {
  210. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(header->aniDelayHideTime));
  211. } else if (header->hasBootlogo) {
  212. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(header->bootlogoDisplayTime));
  213. }
  214. return;
  215. }
  216. frame++;
  217. context->animation_dec_finish = false;
  218. context->intr_status = mfc_jpeg_decode(context->animation_file_phyaddr + 4, context->animation_file_virtaddr + 4,
  219. context->animation_display_phyaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index,
  220. context->animation_display_virtaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index,
  221. size);
  222. context->animation_file_phyaddr += size;
  223. context->animation_file_virtaddr += size;
  224. #if 1
  225. if (!context->animation_end) {
  226. if (!context->intr_status) {
  227. unsigned int format;
  228. if (!context->animation_initdisplay) {
  229. if(dis_format == JPEGDEC_YCbCr420_SEMIPLANAR)
  230. format = 0x11;//ARK1668E_LCDC_FORMAT_Y_UV420;
  231. if(dis_format == JPEGDEC_YCbCr422_SEMIPLANAR)
  232. format = 0x10;//ARK1668E_LCDC_FORMAT_YUV;
  233. ark_bootanimation_display_init(header->aniWidth, header->aniHeight,
  234. context->animation_display_phyaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index,
  235. context->animation_display_phyaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index +
  236. dis_decWidth * dis_decHeight, 0, format);
  237. context->animation_initdisplay = true;
  238. } else {
  239. if(dis_format == JPEGDEC_YCbCr420_SEMIPLANAR)
  240. format = 0x11;//ARK1668E_LCDC_FORMAT_Y_UV420;
  241. if(dis_format == JPEGDEC_YCbCr422_SEMIPLANAR)
  242. format = 0x10;//ARK1668E_LCDC_FORMAT_Y_UV422;
  243. ark_bootanimation_set_display_addr(context->animation_display_phyaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index,
  244. context->animation_display_phyaddr + MAX_ANIMFRAME_SIZE * context->animation_display_index +
  245. dis_decWidth * dis_decHeight, 0, format);
  246. context->animation_display_index = !context->animation_display_index;
  247. }
  248. context->animation_dec_finish = true;
  249. } else {
  250. printk(KERN_ALERT "decode boot animation jpeg error.\n");
  251. context->animation_dec_finish = true;
  252. }
  253. }
  254. #endif
  255. if (header->hasBootlogo && frame == 1)
  256. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(header->bootlogoDisplayTime));
  257. else
  258. mod_timer(&context->animation_timer, jiffies + msecs_to_jiffies(1000 / header->aniFps));
  259. }
  260. static void animation_timer_handler(struct timer_list *t)
  261. {
  262. struct mfc_jpeg_context *context = from_timer(context, t, animation_timer);
  263. queue_work(context->animation_queue, &context->animation_work);
  264. }
  265. /**
  266. * Misc driver related
  267. */
  268. static int vdec_misc_open(struct inode *inode, struct file *filp)
  269. {
  270. struct vdec_device *p = vdec6731_global;
  271. filp->private_data = p;
  272. dev_dbg(p->dev, "open\n");
  273. //clk_prepare_enable(p->clk);
  274. return 0;
  275. }
  276. static int vdec_misc_release(struct inode *inode, struct file *filp)
  277. {
  278. struct vdec_device *p = filp->private_data;
  279. if (p->dec_owner == filp) {
  280. p->dec_irq_done = false;
  281. init_waitqueue_head(&p->dec_wq);
  282. sema_init(&p->dec_sem, VDEC_MAX_CORES);
  283. p->dec_owner = NULL;
  284. }
  285. if (p->pp_owner == filp) {
  286. p->pp_irq_done = false;
  287. init_waitqueue_head(&p->pp_wq);
  288. sema_init(&p->pp_sem, 1);
  289. p->pp_owner = NULL;
  290. }
  291. //clk_disable_unprepare(p->clk);
  292. dev_dbg(p->dev, "release\n");
  293. return 0;
  294. }
  295. static long vdec_misc_ioctl(struct file *filp, unsigned int cmd,
  296. unsigned long arg)
  297. {
  298. int ret = 0;
  299. void __user *argp = (void __user *)arg;
  300. struct vdec_device *p = vdec6731_global;
  301. struct core_desc core;
  302. u32 reg;
  303. switch (cmd) {
  304. case HX170DEC_IOX_ASIC_ID:
  305. reg = vdec_readl(p, VDEC_IDR);
  306. if (copy_to_user(argp, &reg, sizeof(u32)))
  307. ret = -EFAULT;
  308. break;
  309. case HX170DEC_IOC_MC_OFFSETS:
  310. case HX170DEC_IOCGHWOFFSET:
  311. if (copy_to_user(argp, &p->iobaseaddr, sizeof(p->iobaseaddr)))
  312. ret = -EFAULT;
  313. break;
  314. case HX170DEC_IOCGHWIOSIZE: /* in bytes */
  315. if (copy_to_user(argp, &p->iosize, sizeof(p->iosize)))
  316. ret = -EFAULT;
  317. break;
  318. case HX170DEC_IOC_MC_CORES:
  319. if (copy_to_user(argp, &p->num_cores, sizeof(p->num_cores)))
  320. ret = -EFAULT;
  321. break;
  322. case HX170DEC_IOCS_DEC_PUSH_REG:
  323. if (copy_from_user(&core, (void *)arg, sizeof(struct core_desc))) {
  324. dev_err(p->dev, "copy_from_user (dec push reg) failed\n");
  325. ret = -EFAULT;
  326. } else {
  327. /* Skip VDEC_IDR (ID Register, ro) */
  328. core.regs++; // core.size -= 4;
  329. ret = vdec_regs_write(p, VDEC_DEC_FIRST_REG + 1, VDEC_DEC_LAST_REG, &core);
  330. }
  331. break;
  332. case HX170DEC_IOCS_PP_PUSH_REG:
  333. if (copy_from_user(&core, (void *)arg, sizeof(struct core_desc))) {
  334. dev_err(p->dev, "copy_from_user (pp push reg) failed\n");
  335. ret = -EFAULT;
  336. } else {
  337. /* Don't consider the 5 lastest registers (ro or unused) */
  338. ret = vdec_regs_write(p, VDEC_PP_FIRST_REG, VDEC_PP_LAST_REG - 5, &core);
  339. }
  340. break;
  341. case HX170DEC_IOCS_DEC_PULL_REG:
  342. if (copy_from_user(&core, (void *)arg, sizeof(struct core_desc))) {
  343. dev_err(p->dev, "copy_from_user (dec pull reg) failed\n");
  344. ret = -EFAULT;
  345. } else {
  346. ret = vdec_regs_read(p, VDEC_DEC_FIRST_REG, VDEC_DEC_LAST_REG, &core);
  347. }
  348. break;
  349. case HX170DEC_IOCS_PP_PULL_REG:
  350. if (copy_from_user(&core, (void*)arg, sizeof(struct core_desc))) {
  351. dev_err(p->dev, "copy_from_user (pp pull reg) failed\n");
  352. ret = -EFAULT;
  353. } else {
  354. ret = vdec_regs_read(p, VDEC_PP_FIRST_REG, VDEC_PP_LAST_REG, &core);
  355. }
  356. break;
  357. case HX170DEC_IOCX_DEC_WAIT:
  358. if (copy_from_user(&core, (void *)arg, sizeof(struct core_desc))) {
  359. dev_err(p->dev, "copy_from_user (dec wait) failed\n");
  360. ret = -EFAULT;
  361. } else {
  362. ret = wait_event_interruptible(p->dec_wq, p->dec_irq_done);
  363. p->dec_irq_done = false;
  364. if (unlikely(ret != 0)) {
  365. dev_err(p->dev, "wait_event_interruptible dec error %d\n", ret);
  366. } else {
  367. /* Update dec registers */
  368. ret = vdec_regs_read(p, VDEC_DEC_FIRST_REG, VDEC_DEC_LAST_REG, &core);
  369. }
  370. }
  371. break;
  372. case HX170DEC_IOCX_PP_WAIT:
  373. if (copy_from_user(&core, (void *)arg, sizeof(struct core_desc))) {
  374. dev_err(p->dev, "copy_from_user (pp wait) failed\n");
  375. ret = -EFAULT;
  376. } else {
  377. ret = wait_event_interruptible(p->pp_wq, p->pp_irq_done);
  378. p->pp_irq_done = false;
  379. if (unlikely(ret != 0)) {
  380. dev_err(p->dev, "wait_event_interruptible pp error %d\n", ret);
  381. } else {
  382. /* Update pp registers */
  383. ret = vdec_regs_read(p, VDEC_PP_FIRST_REG, VDEC_PP_LAST_REG, &core);
  384. }
  385. }
  386. break;
  387. case HX170DEC_IOCH_DEC_RESERVE:
  388. if (likely(down_interruptible(&p->dec_sem) == 0)) {
  389. p->dec_owner = filp;
  390. ret = 0; /* core id */
  391. dev_dbg(p->dev, "down dec_sem (core id %d)\n", ret);
  392. } else {
  393. dev_err(p->dev, "down_interruptible dec error\n");
  394. ret = -ERESTARTSYS;
  395. }
  396. break;
  397. case HX170DEC_IOCT_DEC_RELEASE:
  398. dev_dbg(p->dev, "up dec_sem\n");
  399. p->dec_owner = NULL;
  400. up(&p->dec_sem);
  401. break;
  402. case HX170DEC_IOCQ_PP_RESERVE:
  403. if (likely(down_interruptible(&p->pp_sem) == 0)) {
  404. p->pp_owner = filp;
  405. ret = 0; /* core id */
  406. dev_dbg(p->dev, "down pp_sem (core id %d)\n", ret);
  407. } else {
  408. dev_err(p->dev, "down_interruptible pp error\n");
  409. ret = -ERESTARTSYS;
  410. }
  411. break;
  412. case HX170DEC_IOCT_PP_RELEASE:
  413. dev_dbg(p->dev, "up pp_sem\n");
  414. p->pp_owner = NULL;
  415. up(&p->pp_sem);
  416. break;
  417. default:
  418. dev_warn(p->dev, "unknown ioctl %x\n", cmd);
  419. ret = -EINVAL;
  420. }
  421. return ret;
  422. }
  423. const struct file_operations vdec_misc_fops = {
  424. .owner = THIS_MODULE,
  425. .llseek = no_llseek,
  426. .open = vdec_misc_open,
  427. .release = vdec_misc_release,
  428. .unlocked_ioctl = vdec_misc_ioctl,
  429. };
  430. static struct miscdevice vdec_misc_device = {
  431. MISC_DYNAMIC_MINOR,
  432. "vdec",
  433. &vdec_misc_fops
  434. };
  435. /*
  436. * Platform driver related
  437. */
  438. /* Should we use spin_lock_irqsave here? */
  439. static irqreturn_t vdec_isr(int irq, void *dev_id)
  440. {
  441. struct vdec_device *p = dev_id;
  442. u32 irq_status_dec, irq_status_pp;
  443. int handled = 0;
  444. // struct mfc_jpeg_context *context = vde_jpeg_context;
  445. /* interrupt status register read */
  446. irq_status_dec = vdec_readl(p, VDEC_DIR);
  447. //printk(KERN_ALERT "irq_status=0x%x.\n", irq_status_dec);
  448. if (irq_status_dec & VDEC_DIR_ISET) {
  449. /* Clear IRQ */
  450. vdec_writel(p, VDEC_DIR, irq_status_dec & ~VDEC_DIR_ISET);
  451. p->dec_irq_done = true;
  452. wake_up_interruptible(&p->dec_wq);
  453. handled++;
  454. }
  455. irq_status_pp = vdec_readl(p, VDEC_PPIR);
  456. if (irq_status_pp & VDEC_PPIR_ISET) {
  457. /* Clear IRQ */
  458. vdec_writel(p, VDEC_PPIR, irq_status_pp & ~VDEC_PPIR_ISET);
  459. p->pp_irq_done = true;
  460. wake_up_interruptible(&p->pp_wq);
  461. handled++;
  462. }
  463. if (handled == 0) {
  464. dev_warn(p->dev, "Spurious IRQ (DIR=%08x PPIR=%08x)\n", \
  465. irq_status_dec, irq_status_pp);
  466. return IRQ_NONE;
  467. }
  468. return IRQ_HANDLED;
  469. }
  470. static int vdec_probe(struct platform_device *pdev)
  471. {
  472. struct vdec_device *p;
  473. struct resource *res, *animres;
  474. int ret;
  475. u32 hwid;
  476. /* Allocate private data */
  477. p = devm_kzalloc(&pdev->dev, sizeof(struct vdec_device), GFP_KERNEL);
  478. if (!p) {
  479. dev_dbg(&pdev->dev, "out of memory\n");
  480. return -ENOMEM;
  481. }
  482. p->dev = &pdev->dev;
  483. platform_set_drvdata(pdev, p);
  484. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  485. p->mmio_base = devm_ioremap_resource(&pdev->dev, res);
  486. if (IS_ERR(p->mmio_base))
  487. return PTR_ERR(p->mmio_base);
  488. p->clk = devm_clk_get(&pdev->dev, "vdec_clk");
  489. if (IS_ERR(p->clk)) {
  490. dev_err(&pdev->dev, "no vdec_clk clock defined\n");
  491. return -ENXIO;
  492. }
  493. p->irq = platform_get_irq(pdev, 0);
  494. if (!p->irq) {
  495. dev_err(&pdev->dev, "could not get irq\n");
  496. return -ENXIO;
  497. }
  498. ret = devm_request_irq(&pdev->dev, p->irq, vdec_isr,
  499. 0, pdev->name, p);
  500. if (ret) {
  501. dev_err(&pdev->dev, "unable to request VDEC irq\n");
  502. return ret;
  503. }
  504. /* Register the miscdevice */
  505. ret = misc_register(&vdec_misc_device);
  506. if (ret) {
  507. dev_err(&pdev->dev, "unable to register miscdevice\n");
  508. return ret;
  509. }
  510. p->num_cores = VDEC_MAX_CORES;
  511. p->iosize = resource_size(res);
  512. p->iobaseaddr = res->start;
  513. vdec6731_global = p;
  514. p->dec_irq_done = false;
  515. p->pp_irq_done = false;
  516. p->dec_owner = NULL;
  517. p->pp_owner = NULL;
  518. init_waitqueue_head(&p->dec_wq);
  519. init_waitqueue_head(&p->pp_wq);
  520. sema_init(&p->dec_sem, VDEC_MAX_CORES);
  521. sema_init(&p->pp_sem, 1);
  522. ret = clk_prepare_enable(p->clk);
  523. if (ret) {
  524. dev_err(&pdev->dev, "unable to prepare and enable clock\n");
  525. misc_deregister(&vdec_misc_device);
  526. return ret;
  527. }
  528. dev_info(&pdev->dev, "VDEC controller at 0x%p, irq = %d, misc_minor = %d\n",
  529. p->mmio_base, p->irq, vdec_misc_device.minor);
  530. //MFC jpeg decode
  531. animres = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  532. if (IS_ERR(animres)) {
  533. return PTR_ERR(animres);
  534. }
  535. p->context.dev = p->dev;
  536. p->context.anmation_stats = 0;
  537. p->context.animation_data_phyaddr = animres->start;
  538. p->context.animation_data_size = resource_size(animres);
  539. p->context.animation_data_virtaddr =
  540. (unsigned int)ioremap(p->context.animation_data_phyaddr, resource_size(animres));
  541. if (p->context.animation_data_virtaddr) {
  542. BANIHEADER *header = (BANIHEADER *) p->context.animation_data_virtaddr;
  543. if (header->magic == MKTAG('B', 'A', 'N', 'I')) {
  544. vde_jpeg_context = &p->context;
  545. p->context.animation_file_phyaddr =
  546. p->context.animation_data_phyaddr + sizeof(BANIHEADER);
  547. p->context.animation_file_virtaddr =
  548. p->context.animation_data_virtaddr + sizeof(BANIHEADER);
  549. p->context.animation_display_size = MAX_ANIMFRAME_SIZE * 2;
  550. p->context.animation_display_virtaddr =
  551. (unsigned int)dma_alloc_coherent(&pdev->dev, p->context.animation_display_size,
  552. &p->context.animation_display_phyaddr, GFP_KERNEL);
  553. if (!p->context.animation_display_virtaddr) {
  554. dev_err(&pdev->dev, "alloc animation display buffer failed.\n");
  555. p->context.animation_end = true;
  556. } else {
  557. p->context.anmation_stats = 1;
  558. p->context.animation_end = false;
  559. p->context.animation_dec_finish = false;
  560. p->context.animation_initdisplay = false;
  561. p->context.animation_queue = create_singlethread_workqueue("animation_queue");
  562. if(!p->context.animation_queue) {
  563. printk(KERN_ERR "%s %d: , create_singlethread_workqueue fail.\n",__FUNCTION__, __LINE__);
  564. return -1;
  565. }
  566. INIT_WORK(&p->context.animation_work, animation_dec_work);
  567. timer_setup(&p->context.animation_timer, animation_timer_handler, 0);
  568. p->context.animation_timer.expires = jiffies + 10;
  569. add_timer(&p->context.animation_timer);
  570. }
  571. } else {
  572. vde_jpeg_context = &p->context;
  573. p->context.animation_end = true;
  574. }
  575. } else
  576. p->context.animation_end = true;
  577. /* Reset Asic (just in case..) */
  578. vdec_writel(p, VDEC_DIR, VDEC_DIR_ID | VDEC_DIR_ABORT);
  579. vdec_writel(p, VDEC_PPIR, VDEC_PPIR_ID);
  580. hwid = vdec_readl(p, VDEC_IDR);
  581. dev_warn(&pdev->dev, "Product ID: %#x (revision %d.%d.%d)\n", \
  582. (hwid & VDEC_IDR_PROD_ID) >> 16,
  583. (hwid & VDEC_IDR_MAJOR_VER) >> 12,
  584. (hwid & VDEC_IDR_MINOR_VER) >> 4,
  585. (hwid & VDEC_IDR_BUILD_VER));
  586. return 0;
  587. }
  588. static int vdec_remove(struct platform_device *pdev)
  589. {
  590. platform_set_drvdata(pdev, NULL);
  591. misc_deregister(&vdec_misc_device);
  592. return 0;
  593. }
  594. static const struct of_device_id vdec_of_match[] = {
  595. { .compatible = "on2,ark-vdec", .data = NULL },
  596. {},
  597. };
  598. MODULE_DEVICE_TABLE(of, vdec_of_match);
  599. static struct platform_driver vdec_of_driver = {
  600. .driver = {
  601. .name = "ark-vdec",
  602. .owner = THIS_MODULE,
  603. .of_match_table = vdec_of_match,
  604. },
  605. .probe = vdec_probe,
  606. .remove = vdec_remove,
  607. };
  608. //module_platform_driver(vdec_of_driver);
  609. static int __init ark_vdec_init(void)
  610. {
  611. int ret;
  612. ret = platform_driver_register(&vdec_of_driver);
  613. if (ret != 0) {
  614. printk(KERN_ERR "%s %d: failed to register vdec_of_driver\n",
  615. __FUNCTION__, __LINE__);
  616. }
  617. return ret;
  618. }
  619. fs_initcall(ark_vdec_init);
  620. MODULE_AUTHOR("Hantro Products Oy");
  621. MODULE_DESCRIPTION("G1 decoder/pp driver");
  622. MODULE_LICENSE("GPL");
  623. MODULE_VERSION("0.4");
  624. MODULE_ALIAS("platform:vdec");