renesas,r9a06g032-sysctrl.txt 1.1 KB

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  1. * Renesas R9A06G032 SYSCTRL
  2. Required Properties:
  3. - compatible: Must be:
  4. - "renesas,r9a06g032-sysctrl"
  5. - reg: Base address and length of the SYSCTRL IO block.
  6. - #clock-cells: Must be 1
  7. - clocks: References to the parent clocks:
  8. - external 40mhz crystal.
  9. - external (optional) 32.768khz
  10. - external (optional) jtag input
  11. - external (optional) RGMII_REFCLK
  12. - clock-names: Must be:
  13. clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
  14. Examples
  15. --------
  16. - SYSCTRL node:
  17. sysctrl: system-controller@4000c000 {
  18. compatible = "renesas,r9a06g032-sysctrl";
  19. reg = <0x4000c000 0x1000>;
  20. #clock-cells = <1>;
  21. clocks = <&ext_mclk>, <&ext_rtc_clk>,
  22. <&ext_jtag_clk>, <&ext_rgmii_ref>;
  23. clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
  24. };
  25. - Other nodes can use the clocks provided by SYSCTRL as in:
  26. #include <dt-bindings/clock/r9a06g032-sysctrl.h>
  27. uart0: serial@40060000 {
  28. compatible = "snps,dw-apb-uart";
  29. reg = <0x40060000 0x400>;
  30. interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
  31. reg-shift = <2>;
  32. reg-io-width = <4>;
  33. clocks = <&sysctrl R9A06G032_CLK_UART0>;
  34. clock-names = "baudclk";
  35. };