Kconfig 4.7 KB

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  1. #
  2. # Coresight configuration
  3. #
  4. menuconfig CORESIGHT
  5. bool "CoreSight Tracing Support"
  6. select ARM_AMBA
  7. select PERF_EVENTS
  8. help
  9. This framework provides a kernel interface for the CoreSight debug
  10. and trace drivers to register themselves with. It's intended to build
  11. a topological view of the CoreSight components based on a DT
  12. specification and configure the right series of components when a
  13. trace source gets enabled.
  14. if CORESIGHT
  15. config CORESIGHT_LINKS_AND_SINKS
  16. bool "CoreSight Link and Sink drivers"
  17. help
  18. This enables support for CoreSight link and sink drivers that are
  19. responsible for transporting and collecting the trace data
  20. respectively. Link and sinks are dynamically aggregated with a trace
  21. entity at run time to form a complete trace path.
  22. config CORESIGHT_LINK_AND_SINK_TMC
  23. bool "Coresight generic TMC driver"
  24. depends on CORESIGHT_LINKS_AND_SINKS
  25. help
  26. This enables support for the Trace Memory Controller driver.
  27. Depending on its configuration the device can act as a link (embedded
  28. trace router - ETR) or sink (embedded trace FIFO). The driver
  29. complies with the generic implementation of the component without
  30. special enhancement or added features.
  31. config CORESIGHT_CATU
  32. bool "Coresight Address Translation Unit (CATU) driver"
  33. depends on CORESIGHT_LINK_AND_SINK_TMC
  34. help
  35. Enable support for the Coresight Address Translation Unit (CATU).
  36. CATU supports a scatter gather table of 4K pages, with forward/backward
  37. lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
  38. buffer by translating the addresses used by ETR to the physical address
  39. by looking up the provided table. CATU can also be used in pass-through
  40. mode where the address is not translated.
  41. config CORESIGHT_SINK_TPIU
  42. bool "Coresight generic TPIU driver"
  43. depends on CORESIGHT_LINKS_AND_SINKS
  44. help
  45. This enables support for the Trace Port Interface Unit driver,
  46. responsible for bridging the gap between the on-chip coresight
  47. components and a trace for bridging the gap between the on-chip
  48. coresight components and a trace port collection engine, typically
  49. connected to an external host for use case capturing more traces than
  50. the on-board coresight memory can handle.
  51. config CORESIGHT_SINK_ETBV10
  52. bool "Coresight ETBv1.0 driver"
  53. depends on CORESIGHT_LINKS_AND_SINKS
  54. help
  55. This enables support for the Embedded Trace Buffer version 1.0 driver
  56. that complies with the generic implementation of the component without
  57. special enhancement or added features.
  58. config CORESIGHT_SOURCE_ETM3X
  59. bool "CoreSight Embedded Trace Macrocell 3.x driver"
  60. depends on !ARM64
  61. select CORESIGHT_LINKS_AND_SINKS
  62. help
  63. This driver provides support for processor ETM3.x and PTM1.x modules,
  64. which allows tracing the instructions that a processor is executing
  65. This is primarily useful for instruction level tracing. Depending
  66. the ETM version data tracing may also be available.
  67. config CORESIGHT_SOURCE_ETM4X
  68. bool "CoreSight Embedded Trace Macrocell 4.x driver"
  69. depends on ARM64
  70. select CORESIGHT_LINKS_AND_SINKS
  71. help
  72. This driver provides support for the ETM4.x tracer module, tracing the
  73. instructions that a processor is executing. This is primarily useful
  74. for instruction level tracing. Depending on the implemented version
  75. data tracing may also be available.
  76. config CORESIGHT_DYNAMIC_REPLICATOR
  77. bool "CoreSight Programmable Replicator driver"
  78. depends on CORESIGHT_LINKS_AND_SINKS
  79. help
  80. This enables support for dynamic CoreSight replicator link driver.
  81. The programmable ATB replicator allows independent filtering of the
  82. trace data based on the traceid.
  83. config CORESIGHT_STM
  84. bool "CoreSight System Trace Macrocell driver"
  85. depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64
  86. select CORESIGHT_LINKS_AND_SINKS
  87. select STM
  88. help
  89. This driver provides support for hardware assisted software
  90. instrumentation based tracing. This is primarily used for
  91. logging useful software events or data coming from various entities
  92. in the system, possibly running different OSs
  93. config CORESIGHT_CPU_DEBUG
  94. tristate "CoreSight CPU Debug driver"
  95. depends on ARM || ARM64
  96. depends on DEBUG_FS
  97. help
  98. This driver provides support for coresight debugging module. This
  99. is primarily used to dump sample-based profiling registers when
  100. system triggers panic, the driver will parse context registers so
  101. can quickly get to know program counter (PC), secure state,
  102. exception level, etc. Before use debugging functionality, platform
  103. needs to ensure the clock domain and power domain are enabled
  104. properly, please refer Documentation/trace/coresight-cpu-debug.txt
  105. for detailed description and the example for usage.
  106. endif