coresight-tmc-etr.c 33 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright(C) 2016 Linaro Limited. All rights reserved.
  4. * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
  5. */
  6. #include <linux/coresight.h>
  7. #include <linux/dma-mapping.h>
  8. #include <linux/iommu.h>
  9. #include <linux/slab.h>
  10. #include <linux/vmalloc.h>
  11. #include "coresight-catu.h"
  12. #include "coresight-priv.h"
  13. #include "coresight-tmc.h"
  14. struct etr_flat_buf {
  15. struct device *dev;
  16. dma_addr_t daddr;
  17. void *vaddr;
  18. size_t size;
  19. };
  20. /*
  21. * The TMC ETR SG has a page size of 4K. The SG table contains pointers
  22. * to 4KB buffers. However, the OS may use a PAGE_SIZE different from
  23. * 4K (i.e, 16KB or 64KB). This implies that a single OS page could
  24. * contain more than one SG buffer and tables.
  25. *
  26. * A table entry has the following format:
  27. *
  28. * ---Bit31------------Bit4-------Bit1-----Bit0--
  29. * | Address[39:12] | SBZ | Entry Type |
  30. * ----------------------------------------------
  31. *
  32. * Address: Bits [39:12] of a physical page address. Bits [11:0] are
  33. * always zero.
  34. *
  35. * Entry type:
  36. * b00 - Reserved.
  37. * b01 - Last entry in the tables, points to 4K page buffer.
  38. * b10 - Normal entry, points to 4K page buffer.
  39. * b11 - Link. The address points to the base of next table.
  40. */
  41. typedef u32 sgte_t;
  42. #define ETR_SG_PAGE_SHIFT 12
  43. #define ETR_SG_PAGE_SIZE (1UL << ETR_SG_PAGE_SHIFT)
  44. #define ETR_SG_PAGES_PER_SYSPAGE (PAGE_SIZE / ETR_SG_PAGE_SIZE)
  45. #define ETR_SG_PTRS_PER_PAGE (ETR_SG_PAGE_SIZE / sizeof(sgte_t))
  46. #define ETR_SG_PTRS_PER_SYSPAGE (PAGE_SIZE / sizeof(sgte_t))
  47. #define ETR_SG_ET_MASK 0x3
  48. #define ETR_SG_ET_LAST 0x1
  49. #define ETR_SG_ET_NORMAL 0x2
  50. #define ETR_SG_ET_LINK 0x3
  51. #define ETR_SG_ADDR_SHIFT 4
  52. #define ETR_SG_ENTRY(addr, type) \
  53. (sgte_t)((((addr) >> ETR_SG_PAGE_SHIFT) << ETR_SG_ADDR_SHIFT) | \
  54. (type & ETR_SG_ET_MASK))
  55. #define ETR_SG_ADDR(entry) \
  56. (((dma_addr_t)(entry) >> ETR_SG_ADDR_SHIFT) << ETR_SG_PAGE_SHIFT)
  57. #define ETR_SG_ET(entry) ((entry) & ETR_SG_ET_MASK)
  58. /*
  59. * struct etr_sg_table : ETR SG Table
  60. * @sg_table: Generic SG Table holding the data/table pages.
  61. * @hwaddr: hwaddress used by the TMC, which is the base
  62. * address of the table.
  63. */
  64. struct etr_sg_table {
  65. struct tmc_sg_table *sg_table;
  66. dma_addr_t hwaddr;
  67. };
  68. /*
  69. * tmc_etr_sg_table_entries: Total number of table entries required to map
  70. * @nr_pages system pages.
  71. *
  72. * We need to map @nr_pages * ETR_SG_PAGES_PER_SYSPAGE data pages.
  73. * Each TMC page can map (ETR_SG_PTRS_PER_PAGE - 1) buffer pointers,
  74. * with the last entry pointing to another page of table entries.
  75. * If we spill over to a new page for mapping 1 entry, we could as
  76. * well replace the link entry of the previous page with the last entry.
  77. */
  78. static inline unsigned long __attribute_const__
  79. tmc_etr_sg_table_entries(int nr_pages)
  80. {
  81. unsigned long nr_sgpages = nr_pages * ETR_SG_PAGES_PER_SYSPAGE;
  82. unsigned long nr_sglinks = nr_sgpages / (ETR_SG_PTRS_PER_PAGE - 1);
  83. /*
  84. * If we spill over to a new page for 1 entry, we could as well
  85. * make it the LAST entry in the previous page, skipping the Link
  86. * address.
  87. */
  88. if (nr_sglinks && (nr_sgpages % (ETR_SG_PTRS_PER_PAGE - 1) < 2))
  89. nr_sglinks--;
  90. return nr_sgpages + nr_sglinks;
  91. }
  92. /*
  93. * tmc_pages_get_offset: Go through all the pages in the tmc_pages
  94. * and map the device address @addr to an offset within the virtual
  95. * contiguous buffer.
  96. */
  97. static long
  98. tmc_pages_get_offset(struct tmc_pages *tmc_pages, dma_addr_t addr)
  99. {
  100. int i;
  101. dma_addr_t page_start;
  102. for (i = 0; i < tmc_pages->nr_pages; i++) {
  103. page_start = tmc_pages->daddrs[i];
  104. if (addr >= page_start && addr < (page_start + PAGE_SIZE))
  105. return i * PAGE_SIZE + (addr - page_start);
  106. }
  107. return -EINVAL;
  108. }
  109. /*
  110. * tmc_pages_free : Unmap and free the pages used by tmc_pages.
  111. * If the pages were not allocated in tmc_pages_alloc(), we would
  112. * simply drop the refcount.
  113. */
  114. static void tmc_pages_free(struct tmc_pages *tmc_pages,
  115. struct device *dev, enum dma_data_direction dir)
  116. {
  117. int i;
  118. for (i = 0; i < tmc_pages->nr_pages; i++) {
  119. if (tmc_pages->daddrs && tmc_pages->daddrs[i])
  120. dma_unmap_page(dev, tmc_pages->daddrs[i],
  121. PAGE_SIZE, dir);
  122. if (tmc_pages->pages && tmc_pages->pages[i])
  123. __free_page(tmc_pages->pages[i]);
  124. }
  125. kfree(tmc_pages->pages);
  126. kfree(tmc_pages->daddrs);
  127. tmc_pages->pages = NULL;
  128. tmc_pages->daddrs = NULL;
  129. tmc_pages->nr_pages = 0;
  130. }
  131. /*
  132. * tmc_pages_alloc : Allocate and map pages for a given @tmc_pages.
  133. * If @pages is not NULL, the list of page virtual addresses are
  134. * used as the data pages. The pages are then dma_map'ed for @dev
  135. * with dma_direction @dir.
  136. *
  137. * Returns 0 upon success, else the error number.
  138. */
  139. static int tmc_pages_alloc(struct tmc_pages *tmc_pages,
  140. struct device *dev, int node,
  141. enum dma_data_direction dir, void **pages)
  142. {
  143. int i, nr_pages;
  144. dma_addr_t paddr;
  145. struct page *page;
  146. nr_pages = tmc_pages->nr_pages;
  147. tmc_pages->daddrs = kcalloc(nr_pages, sizeof(*tmc_pages->daddrs),
  148. GFP_KERNEL);
  149. if (!tmc_pages->daddrs)
  150. return -ENOMEM;
  151. tmc_pages->pages = kcalloc(nr_pages, sizeof(*tmc_pages->pages),
  152. GFP_KERNEL);
  153. if (!tmc_pages->pages) {
  154. kfree(tmc_pages->daddrs);
  155. tmc_pages->daddrs = NULL;
  156. return -ENOMEM;
  157. }
  158. for (i = 0; i < nr_pages; i++) {
  159. if (pages && pages[i]) {
  160. page = virt_to_page(pages[i]);
  161. /* Hold a refcount on the page */
  162. get_page(page);
  163. } else {
  164. page = alloc_pages_node(node,
  165. GFP_KERNEL | __GFP_ZERO, 0);
  166. if (!page)
  167. goto err;
  168. }
  169. paddr = dma_map_page(dev, page, 0, PAGE_SIZE, dir);
  170. if (dma_mapping_error(dev, paddr))
  171. goto err;
  172. tmc_pages->daddrs[i] = paddr;
  173. tmc_pages->pages[i] = page;
  174. }
  175. return 0;
  176. err:
  177. tmc_pages_free(tmc_pages, dev, dir);
  178. return -ENOMEM;
  179. }
  180. static inline long
  181. tmc_sg_get_data_page_offset(struct tmc_sg_table *sg_table, dma_addr_t addr)
  182. {
  183. return tmc_pages_get_offset(&sg_table->data_pages, addr);
  184. }
  185. static inline void tmc_free_table_pages(struct tmc_sg_table *sg_table)
  186. {
  187. if (sg_table->table_vaddr)
  188. vunmap(sg_table->table_vaddr);
  189. tmc_pages_free(&sg_table->table_pages, sg_table->dev, DMA_TO_DEVICE);
  190. }
  191. static void tmc_free_data_pages(struct tmc_sg_table *sg_table)
  192. {
  193. if (sg_table->data_vaddr)
  194. vunmap(sg_table->data_vaddr);
  195. tmc_pages_free(&sg_table->data_pages, sg_table->dev, DMA_FROM_DEVICE);
  196. }
  197. void tmc_free_sg_table(struct tmc_sg_table *sg_table)
  198. {
  199. tmc_free_table_pages(sg_table);
  200. tmc_free_data_pages(sg_table);
  201. }
  202. /*
  203. * Alloc pages for the table. Since this will be used by the device,
  204. * allocate the pages closer to the device (i.e, dev_to_node(dev)
  205. * rather than the CPU node).
  206. */
  207. static int tmc_alloc_table_pages(struct tmc_sg_table *sg_table)
  208. {
  209. int rc;
  210. struct tmc_pages *table_pages = &sg_table->table_pages;
  211. rc = tmc_pages_alloc(table_pages, sg_table->dev,
  212. dev_to_node(sg_table->dev),
  213. DMA_TO_DEVICE, NULL);
  214. if (rc)
  215. return rc;
  216. sg_table->table_vaddr = vmap(table_pages->pages,
  217. table_pages->nr_pages,
  218. VM_MAP,
  219. PAGE_KERNEL);
  220. if (!sg_table->table_vaddr)
  221. rc = -ENOMEM;
  222. else
  223. sg_table->table_daddr = table_pages->daddrs[0];
  224. return rc;
  225. }
  226. static int tmc_alloc_data_pages(struct tmc_sg_table *sg_table, void **pages)
  227. {
  228. int rc;
  229. /* Allocate data pages on the node requested by the caller */
  230. rc = tmc_pages_alloc(&sg_table->data_pages,
  231. sg_table->dev, sg_table->node,
  232. DMA_FROM_DEVICE, pages);
  233. if (!rc) {
  234. sg_table->data_vaddr = vmap(sg_table->data_pages.pages,
  235. sg_table->data_pages.nr_pages,
  236. VM_MAP,
  237. PAGE_KERNEL);
  238. if (!sg_table->data_vaddr)
  239. rc = -ENOMEM;
  240. }
  241. return rc;
  242. }
  243. /*
  244. * tmc_alloc_sg_table: Allocate and setup dma pages for the TMC SG table
  245. * and data buffers. TMC writes to the data buffers and reads from the SG
  246. * Table pages.
  247. *
  248. * @dev - Device to which page should be DMA mapped.
  249. * @node - Numa node for mem allocations
  250. * @nr_tpages - Number of pages for the table entries.
  251. * @nr_dpages - Number of pages for Data buffer.
  252. * @pages - Optional list of virtual address of pages.
  253. */
  254. struct tmc_sg_table *tmc_alloc_sg_table(struct device *dev,
  255. int node,
  256. int nr_tpages,
  257. int nr_dpages,
  258. void **pages)
  259. {
  260. long rc;
  261. struct tmc_sg_table *sg_table;
  262. sg_table = kzalloc(sizeof(*sg_table), GFP_KERNEL);
  263. if (!sg_table)
  264. return ERR_PTR(-ENOMEM);
  265. sg_table->data_pages.nr_pages = nr_dpages;
  266. sg_table->table_pages.nr_pages = nr_tpages;
  267. sg_table->node = node;
  268. sg_table->dev = dev;
  269. rc = tmc_alloc_data_pages(sg_table, pages);
  270. if (!rc)
  271. rc = tmc_alloc_table_pages(sg_table);
  272. if (rc) {
  273. tmc_free_sg_table(sg_table);
  274. kfree(sg_table);
  275. return ERR_PTR(rc);
  276. }
  277. return sg_table;
  278. }
  279. /*
  280. * tmc_sg_table_sync_data_range: Sync the data buffer written
  281. * by the device from @offset upto a @size bytes.
  282. */
  283. void tmc_sg_table_sync_data_range(struct tmc_sg_table *table,
  284. u64 offset, u64 size)
  285. {
  286. int i, index, start;
  287. int npages = DIV_ROUND_UP(size, PAGE_SIZE);
  288. struct device *dev = table->dev;
  289. struct tmc_pages *data = &table->data_pages;
  290. start = offset >> PAGE_SHIFT;
  291. for (i = start; i < (start + npages); i++) {
  292. index = i % data->nr_pages;
  293. dma_sync_single_for_cpu(dev, data->daddrs[index],
  294. PAGE_SIZE, DMA_FROM_DEVICE);
  295. }
  296. }
  297. /* tmc_sg_sync_table: Sync the page table */
  298. void tmc_sg_table_sync_table(struct tmc_sg_table *sg_table)
  299. {
  300. int i;
  301. struct device *dev = sg_table->dev;
  302. struct tmc_pages *table_pages = &sg_table->table_pages;
  303. for (i = 0; i < table_pages->nr_pages; i++)
  304. dma_sync_single_for_device(dev, table_pages->daddrs[i],
  305. PAGE_SIZE, DMA_TO_DEVICE);
  306. }
  307. /*
  308. * tmc_sg_table_get_data: Get the buffer pointer for data @offset
  309. * in the SG buffer. The @bufpp is updated to point to the buffer.
  310. * Returns :
  311. * the length of linear data available at @offset.
  312. * or
  313. * <= 0 if no data is available.
  314. */
  315. ssize_t tmc_sg_table_get_data(struct tmc_sg_table *sg_table,
  316. u64 offset, size_t len, char **bufpp)
  317. {
  318. size_t size;
  319. int pg_idx = offset >> PAGE_SHIFT;
  320. int pg_offset = offset & (PAGE_SIZE - 1);
  321. struct tmc_pages *data_pages = &sg_table->data_pages;
  322. size = tmc_sg_table_buf_size(sg_table);
  323. if (offset >= size)
  324. return -EINVAL;
  325. /* Make sure we don't go beyond the end */
  326. len = (len < (size - offset)) ? len : size - offset;
  327. /* Respect the page boundaries */
  328. len = (len < (PAGE_SIZE - pg_offset)) ? len : (PAGE_SIZE - pg_offset);
  329. if (len > 0)
  330. *bufpp = page_address(data_pages->pages[pg_idx]) + pg_offset;
  331. return len;
  332. }
  333. #ifdef ETR_SG_DEBUG
  334. /* Map a dma address to virtual address */
  335. static unsigned long
  336. tmc_sg_daddr_to_vaddr(struct tmc_sg_table *sg_table,
  337. dma_addr_t addr, bool table)
  338. {
  339. long offset;
  340. unsigned long base;
  341. struct tmc_pages *tmc_pages;
  342. if (table) {
  343. tmc_pages = &sg_table->table_pages;
  344. base = (unsigned long)sg_table->table_vaddr;
  345. } else {
  346. tmc_pages = &sg_table->data_pages;
  347. base = (unsigned long)sg_table->data_vaddr;
  348. }
  349. offset = tmc_pages_get_offset(tmc_pages, addr);
  350. if (offset < 0)
  351. return 0;
  352. return base + offset;
  353. }
  354. /* Dump the given sg_table */
  355. static void tmc_etr_sg_table_dump(struct etr_sg_table *etr_table)
  356. {
  357. sgte_t *ptr;
  358. int i = 0;
  359. dma_addr_t addr;
  360. struct tmc_sg_table *sg_table = etr_table->sg_table;
  361. ptr = (sgte_t *)tmc_sg_daddr_to_vaddr(sg_table,
  362. etr_table->hwaddr, true);
  363. while (ptr) {
  364. addr = ETR_SG_ADDR(*ptr);
  365. switch (ETR_SG_ET(*ptr)) {
  366. case ETR_SG_ET_NORMAL:
  367. dev_dbg(sg_table->dev,
  368. "%05d: %p\t:[N] 0x%llx\n", i, ptr, addr);
  369. ptr++;
  370. break;
  371. case ETR_SG_ET_LINK:
  372. dev_dbg(sg_table->dev,
  373. "%05d: *** %p\t:{L} 0x%llx ***\n",
  374. i, ptr, addr);
  375. ptr = (sgte_t *)tmc_sg_daddr_to_vaddr(sg_table,
  376. addr, true);
  377. break;
  378. case ETR_SG_ET_LAST:
  379. dev_dbg(sg_table->dev,
  380. "%05d: ### %p\t:[L] 0x%llx ###\n",
  381. i, ptr, addr);
  382. return;
  383. default:
  384. dev_dbg(sg_table->dev,
  385. "%05d: xxx %p\t:[INVALID] 0x%llx xxx\n",
  386. i, ptr, addr);
  387. return;
  388. }
  389. i++;
  390. }
  391. dev_dbg(sg_table->dev, "******* End of Table *****\n");
  392. }
  393. #else
  394. static inline void tmc_etr_sg_table_dump(struct etr_sg_table *etr_table) {}
  395. #endif
  396. /*
  397. * Populate the SG Table page table entries from table/data
  398. * pages allocated. Each Data page has ETR_SG_PAGES_PER_SYSPAGE SG pages.
  399. * So does a Table page. So we keep track of indices of the tables
  400. * in each system page and move the pointers accordingly.
  401. */
  402. #define INC_IDX_ROUND(idx, size) ((idx) = ((idx) + 1) % (size))
  403. static void tmc_etr_sg_table_populate(struct etr_sg_table *etr_table)
  404. {
  405. dma_addr_t paddr;
  406. int i, type, nr_entries;
  407. int tpidx = 0; /* index to the current system table_page */
  408. int sgtidx = 0; /* index to the sg_table within the current syspage */
  409. int sgtentry = 0; /* the entry within the sg_table */
  410. int dpidx = 0; /* index to the current system data_page */
  411. int spidx = 0; /* index to the SG page within the current data page */
  412. sgte_t *ptr; /* pointer to the table entry to fill */
  413. struct tmc_sg_table *sg_table = etr_table->sg_table;
  414. dma_addr_t *table_daddrs = sg_table->table_pages.daddrs;
  415. dma_addr_t *data_daddrs = sg_table->data_pages.daddrs;
  416. nr_entries = tmc_etr_sg_table_entries(sg_table->data_pages.nr_pages);
  417. /*
  418. * Use the contiguous virtual address of the table to update entries.
  419. */
  420. ptr = sg_table->table_vaddr;
  421. /*
  422. * Fill all the entries, except the last entry to avoid special
  423. * checks within the loop.
  424. */
  425. for (i = 0; i < nr_entries - 1; i++) {
  426. if (sgtentry == ETR_SG_PTRS_PER_PAGE - 1) {
  427. /*
  428. * Last entry in a sg_table page is a link address to
  429. * the next table page. If this sg_table is the last
  430. * one in the system page, it links to the first
  431. * sg_table in the next system page. Otherwise, it
  432. * links to the next sg_table page within the system
  433. * page.
  434. */
  435. if (sgtidx == ETR_SG_PAGES_PER_SYSPAGE - 1) {
  436. paddr = table_daddrs[tpidx + 1];
  437. } else {
  438. paddr = table_daddrs[tpidx] +
  439. (ETR_SG_PAGE_SIZE * (sgtidx + 1));
  440. }
  441. type = ETR_SG_ET_LINK;
  442. } else {
  443. /*
  444. * Update the indices to the data_pages to point to the
  445. * next sg_page in the data buffer.
  446. */
  447. type = ETR_SG_ET_NORMAL;
  448. paddr = data_daddrs[dpidx] + spidx * ETR_SG_PAGE_SIZE;
  449. if (!INC_IDX_ROUND(spidx, ETR_SG_PAGES_PER_SYSPAGE))
  450. dpidx++;
  451. }
  452. *ptr++ = ETR_SG_ENTRY(paddr, type);
  453. /*
  454. * Move to the next table pointer, moving the table page index
  455. * if necessary
  456. */
  457. if (!INC_IDX_ROUND(sgtentry, ETR_SG_PTRS_PER_PAGE)) {
  458. if (!INC_IDX_ROUND(sgtidx, ETR_SG_PAGES_PER_SYSPAGE))
  459. tpidx++;
  460. }
  461. }
  462. /* Set up the last entry, which is always a data pointer */
  463. paddr = data_daddrs[dpidx] + spidx * ETR_SG_PAGE_SIZE;
  464. *ptr++ = ETR_SG_ENTRY(paddr, ETR_SG_ET_LAST);
  465. }
  466. /*
  467. * tmc_init_etr_sg_table: Allocate a TMC ETR SG table, data buffer of @size and
  468. * populate the table.
  469. *
  470. * @dev - Device pointer for the TMC
  471. * @node - NUMA node where the memory should be allocated
  472. * @size - Total size of the data buffer
  473. * @pages - Optional list of page virtual address
  474. */
  475. static struct etr_sg_table *
  476. tmc_init_etr_sg_table(struct device *dev, int node,
  477. unsigned long size, void **pages)
  478. {
  479. int nr_entries, nr_tpages;
  480. int nr_dpages = size >> PAGE_SHIFT;
  481. struct tmc_sg_table *sg_table;
  482. struct etr_sg_table *etr_table;
  483. etr_table = kzalloc(sizeof(*etr_table), GFP_KERNEL);
  484. if (!etr_table)
  485. return ERR_PTR(-ENOMEM);
  486. nr_entries = tmc_etr_sg_table_entries(nr_dpages);
  487. nr_tpages = DIV_ROUND_UP(nr_entries, ETR_SG_PTRS_PER_SYSPAGE);
  488. sg_table = tmc_alloc_sg_table(dev, node, nr_tpages, nr_dpages, pages);
  489. if (IS_ERR(sg_table)) {
  490. kfree(etr_table);
  491. return ERR_CAST(sg_table);
  492. }
  493. etr_table->sg_table = sg_table;
  494. /* TMC should use table base address for DBA */
  495. etr_table->hwaddr = sg_table->table_daddr;
  496. tmc_etr_sg_table_populate(etr_table);
  497. /* Sync the table pages for the HW */
  498. tmc_sg_table_sync_table(sg_table);
  499. tmc_etr_sg_table_dump(etr_table);
  500. return etr_table;
  501. }
  502. /*
  503. * tmc_etr_alloc_flat_buf: Allocate a contiguous DMA buffer.
  504. */
  505. static int tmc_etr_alloc_flat_buf(struct tmc_drvdata *drvdata,
  506. struct etr_buf *etr_buf, int node,
  507. void **pages)
  508. {
  509. struct etr_flat_buf *flat_buf;
  510. /* We cannot reuse existing pages for flat buf */
  511. if (pages)
  512. return -EINVAL;
  513. flat_buf = kzalloc(sizeof(*flat_buf), GFP_KERNEL);
  514. if (!flat_buf)
  515. return -ENOMEM;
  516. flat_buf->vaddr = dma_alloc_coherent(drvdata->dev, etr_buf->size,
  517. &flat_buf->daddr, GFP_KERNEL);
  518. if (!flat_buf->vaddr) {
  519. kfree(flat_buf);
  520. return -ENOMEM;
  521. }
  522. flat_buf->size = etr_buf->size;
  523. flat_buf->dev = drvdata->dev;
  524. etr_buf->hwaddr = flat_buf->daddr;
  525. etr_buf->mode = ETR_MODE_FLAT;
  526. etr_buf->private = flat_buf;
  527. return 0;
  528. }
  529. static void tmc_etr_free_flat_buf(struct etr_buf *etr_buf)
  530. {
  531. struct etr_flat_buf *flat_buf = etr_buf->private;
  532. if (flat_buf && flat_buf->daddr)
  533. dma_free_coherent(flat_buf->dev, flat_buf->size,
  534. flat_buf->vaddr, flat_buf->daddr);
  535. kfree(flat_buf);
  536. }
  537. static void tmc_etr_sync_flat_buf(struct etr_buf *etr_buf, u64 rrp, u64 rwp)
  538. {
  539. /*
  540. * Adjust the buffer to point to the beginning of the trace data
  541. * and update the available trace data.
  542. */
  543. etr_buf->offset = rrp - etr_buf->hwaddr;
  544. if (etr_buf->full)
  545. etr_buf->len = etr_buf->size;
  546. else
  547. etr_buf->len = rwp - rrp;
  548. }
  549. static ssize_t tmc_etr_get_data_flat_buf(struct etr_buf *etr_buf,
  550. u64 offset, size_t len, char **bufpp)
  551. {
  552. struct etr_flat_buf *flat_buf = etr_buf->private;
  553. *bufpp = (char *)flat_buf->vaddr + offset;
  554. /*
  555. * tmc_etr_buf_get_data already adjusts the length to handle
  556. * buffer wrapping around.
  557. */
  558. return len;
  559. }
  560. static const struct etr_buf_operations etr_flat_buf_ops = {
  561. .alloc = tmc_etr_alloc_flat_buf,
  562. .free = tmc_etr_free_flat_buf,
  563. .sync = tmc_etr_sync_flat_buf,
  564. .get_data = tmc_etr_get_data_flat_buf,
  565. };
  566. /*
  567. * tmc_etr_alloc_sg_buf: Allocate an SG buf @etr_buf. Setup the parameters
  568. * appropriately.
  569. */
  570. static int tmc_etr_alloc_sg_buf(struct tmc_drvdata *drvdata,
  571. struct etr_buf *etr_buf, int node,
  572. void **pages)
  573. {
  574. struct etr_sg_table *etr_table;
  575. etr_table = tmc_init_etr_sg_table(drvdata->dev, node,
  576. etr_buf->size, pages);
  577. if (IS_ERR(etr_table))
  578. return -ENOMEM;
  579. etr_buf->hwaddr = etr_table->hwaddr;
  580. etr_buf->mode = ETR_MODE_ETR_SG;
  581. etr_buf->private = etr_table;
  582. return 0;
  583. }
  584. static void tmc_etr_free_sg_buf(struct etr_buf *etr_buf)
  585. {
  586. struct etr_sg_table *etr_table = etr_buf->private;
  587. if (etr_table) {
  588. tmc_free_sg_table(etr_table->sg_table);
  589. kfree(etr_table);
  590. }
  591. }
  592. static ssize_t tmc_etr_get_data_sg_buf(struct etr_buf *etr_buf, u64 offset,
  593. size_t len, char **bufpp)
  594. {
  595. struct etr_sg_table *etr_table = etr_buf->private;
  596. return tmc_sg_table_get_data(etr_table->sg_table, offset, len, bufpp);
  597. }
  598. static void tmc_etr_sync_sg_buf(struct etr_buf *etr_buf, u64 rrp, u64 rwp)
  599. {
  600. long r_offset, w_offset;
  601. struct etr_sg_table *etr_table = etr_buf->private;
  602. struct tmc_sg_table *table = etr_table->sg_table;
  603. /* Convert hw address to offset in the buffer */
  604. r_offset = tmc_sg_get_data_page_offset(table, rrp);
  605. if (r_offset < 0) {
  606. dev_warn(table->dev,
  607. "Unable to map RRP %llx to offset\n", rrp);
  608. etr_buf->len = 0;
  609. return;
  610. }
  611. w_offset = tmc_sg_get_data_page_offset(table, rwp);
  612. if (w_offset < 0) {
  613. dev_warn(table->dev,
  614. "Unable to map RWP %llx to offset\n", rwp);
  615. etr_buf->len = 0;
  616. return;
  617. }
  618. etr_buf->offset = r_offset;
  619. if (etr_buf->full)
  620. etr_buf->len = etr_buf->size;
  621. else
  622. etr_buf->len = ((w_offset < r_offset) ? etr_buf->size : 0) +
  623. w_offset - r_offset;
  624. tmc_sg_table_sync_data_range(table, r_offset, etr_buf->len);
  625. }
  626. static const struct etr_buf_operations etr_sg_buf_ops = {
  627. .alloc = tmc_etr_alloc_sg_buf,
  628. .free = tmc_etr_free_sg_buf,
  629. .sync = tmc_etr_sync_sg_buf,
  630. .get_data = tmc_etr_get_data_sg_buf,
  631. };
  632. /*
  633. * TMC ETR could be connected to a CATU device, which can provide address
  634. * translation service. This is represented by the Output port of the TMC
  635. * (ETR) connected to the input port of the CATU.
  636. *
  637. * Returns : coresight_device ptr for the CATU device if a CATU is found.
  638. * : NULL otherwise.
  639. */
  640. struct coresight_device *
  641. tmc_etr_get_catu_device(struct tmc_drvdata *drvdata)
  642. {
  643. int i;
  644. struct coresight_device *tmp, *etr = drvdata->csdev;
  645. if (!IS_ENABLED(CONFIG_CORESIGHT_CATU))
  646. return NULL;
  647. for (i = 0; i < etr->nr_outport; i++) {
  648. tmp = etr->conns[i].child_dev;
  649. if (tmp && coresight_is_catu_device(tmp))
  650. return tmp;
  651. }
  652. return NULL;
  653. }
  654. static inline void tmc_etr_enable_catu(struct tmc_drvdata *drvdata)
  655. {
  656. struct coresight_device *catu = tmc_etr_get_catu_device(drvdata);
  657. if (catu && helper_ops(catu)->enable)
  658. helper_ops(catu)->enable(catu, drvdata->etr_buf);
  659. }
  660. static inline void tmc_etr_disable_catu(struct tmc_drvdata *drvdata)
  661. {
  662. struct coresight_device *catu = tmc_etr_get_catu_device(drvdata);
  663. if (catu && helper_ops(catu)->disable)
  664. helper_ops(catu)->disable(catu, drvdata->etr_buf);
  665. }
  666. static const struct etr_buf_operations *etr_buf_ops[] = {
  667. [ETR_MODE_FLAT] = &etr_flat_buf_ops,
  668. [ETR_MODE_ETR_SG] = &etr_sg_buf_ops,
  669. [ETR_MODE_CATU] = IS_ENABLED(CONFIG_CORESIGHT_CATU)
  670. ? &etr_catu_buf_ops : NULL,
  671. };
  672. static inline int tmc_etr_mode_alloc_buf(int mode,
  673. struct tmc_drvdata *drvdata,
  674. struct etr_buf *etr_buf, int node,
  675. void **pages)
  676. {
  677. int rc = -EINVAL;
  678. switch (mode) {
  679. case ETR_MODE_FLAT:
  680. case ETR_MODE_ETR_SG:
  681. case ETR_MODE_CATU:
  682. if (etr_buf_ops[mode] && etr_buf_ops[mode]->alloc)
  683. rc = etr_buf_ops[mode]->alloc(drvdata, etr_buf,
  684. node, pages);
  685. if (!rc)
  686. etr_buf->ops = etr_buf_ops[mode];
  687. return rc;
  688. default:
  689. return -EINVAL;
  690. }
  691. }
  692. /*
  693. * tmc_alloc_etr_buf: Allocate a buffer use by ETR.
  694. * @drvdata : ETR device details.
  695. * @size : size of the requested buffer.
  696. * @flags : Required properties for the buffer.
  697. * @node : Node for memory allocations.
  698. * @pages : An optional list of pages.
  699. */
  700. static struct etr_buf *tmc_alloc_etr_buf(struct tmc_drvdata *drvdata,
  701. ssize_t size, int flags,
  702. int node, void **pages)
  703. {
  704. int rc = -ENOMEM;
  705. bool has_etr_sg, has_iommu;
  706. bool has_sg, has_catu;
  707. struct etr_buf *etr_buf;
  708. has_etr_sg = tmc_etr_has_cap(drvdata, TMC_ETR_SG);
  709. has_iommu = iommu_get_domain_for_dev(drvdata->dev);
  710. has_catu = !!tmc_etr_get_catu_device(drvdata);
  711. has_sg = has_catu || has_etr_sg;
  712. etr_buf = kzalloc(sizeof(*etr_buf), GFP_KERNEL);
  713. if (!etr_buf)
  714. return ERR_PTR(-ENOMEM);
  715. etr_buf->size = size;
  716. /*
  717. * If we have to use an existing list of pages, we cannot reliably
  718. * use a contiguous DMA memory (even if we have an IOMMU). Otherwise,
  719. * we use the contiguous DMA memory if at least one of the following
  720. * conditions is true:
  721. * a) The ETR cannot use Scatter-Gather.
  722. * b) we have a backing IOMMU
  723. * c) The requested memory size is smaller (< 1M).
  724. *
  725. * Fallback to available mechanisms.
  726. *
  727. */
  728. if (!pages &&
  729. (!has_sg || has_iommu || size < SZ_1M))
  730. rc = tmc_etr_mode_alloc_buf(ETR_MODE_FLAT, drvdata,
  731. etr_buf, node, pages);
  732. if (rc && has_etr_sg)
  733. rc = tmc_etr_mode_alloc_buf(ETR_MODE_ETR_SG, drvdata,
  734. etr_buf, node, pages);
  735. if (rc && has_catu)
  736. rc = tmc_etr_mode_alloc_buf(ETR_MODE_CATU, drvdata,
  737. etr_buf, node, pages);
  738. if (rc) {
  739. kfree(etr_buf);
  740. return ERR_PTR(rc);
  741. }
  742. dev_dbg(drvdata->dev, "allocated buffer of size %ldKB in mode %d\n",
  743. (unsigned long)size >> 10, etr_buf->mode);
  744. return etr_buf;
  745. }
  746. static void tmc_free_etr_buf(struct etr_buf *etr_buf)
  747. {
  748. WARN_ON(!etr_buf->ops || !etr_buf->ops->free);
  749. etr_buf->ops->free(etr_buf);
  750. kfree(etr_buf);
  751. }
  752. /*
  753. * tmc_etr_buf_get_data: Get the pointer the trace data at @offset
  754. * with a maximum of @len bytes.
  755. * Returns: The size of the linear data available @pos, with *bufpp
  756. * updated to point to the buffer.
  757. */
  758. static ssize_t tmc_etr_buf_get_data(struct etr_buf *etr_buf,
  759. u64 offset, size_t len, char **bufpp)
  760. {
  761. /* Adjust the length to limit this transaction to end of buffer */
  762. len = (len < (etr_buf->size - offset)) ? len : etr_buf->size - offset;
  763. return etr_buf->ops->get_data(etr_buf, (u64)offset, len, bufpp);
  764. }
  765. static inline s64
  766. tmc_etr_buf_insert_barrier_packet(struct etr_buf *etr_buf, u64 offset)
  767. {
  768. ssize_t len;
  769. char *bufp;
  770. len = tmc_etr_buf_get_data(etr_buf, offset,
  771. CORESIGHT_BARRIER_PKT_SIZE, &bufp);
  772. if (WARN_ON(len < CORESIGHT_BARRIER_PKT_SIZE))
  773. return -EINVAL;
  774. coresight_insert_barrier_packet(bufp);
  775. return offset + CORESIGHT_BARRIER_PKT_SIZE;
  776. }
  777. /*
  778. * tmc_sync_etr_buf: Sync the trace buffer availability with drvdata.
  779. * Makes sure the trace data is synced to the memory for consumption.
  780. * @etr_buf->offset will hold the offset to the beginning of the trace data
  781. * within the buffer, with @etr_buf->len bytes to consume.
  782. */
  783. static void tmc_sync_etr_buf(struct tmc_drvdata *drvdata)
  784. {
  785. struct etr_buf *etr_buf = drvdata->etr_buf;
  786. u64 rrp, rwp;
  787. u32 status;
  788. rrp = tmc_read_rrp(drvdata);
  789. rwp = tmc_read_rwp(drvdata);
  790. status = readl_relaxed(drvdata->base + TMC_STS);
  791. etr_buf->full = status & TMC_STS_FULL;
  792. WARN_ON(!etr_buf->ops || !etr_buf->ops->sync);
  793. etr_buf->ops->sync(etr_buf, rrp, rwp);
  794. /* Insert barrier packets at the beginning, if there was an overflow */
  795. if (etr_buf->full)
  796. tmc_etr_buf_insert_barrier_packet(etr_buf, etr_buf->offset);
  797. }
  798. static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata,
  799. struct etr_buf *etr_buf)
  800. {
  801. u32 axictl, sts;
  802. /* Callers should provide an appropriate buffer for use */
  803. if (WARN_ON(!etr_buf || drvdata->etr_buf))
  804. return;
  805. drvdata->etr_buf = etr_buf;
  806. /*
  807. * If this ETR is connected to a CATU, enable it before we turn
  808. * this on
  809. */
  810. tmc_etr_enable_catu(drvdata);
  811. CS_UNLOCK(drvdata->base);
  812. /* Wait for TMCSReady bit to be set */
  813. tmc_wait_for_tmcready(drvdata);
  814. writel_relaxed(etr_buf->size / 4, drvdata->base + TMC_RSZ);
  815. writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE);
  816. axictl = readl_relaxed(drvdata->base + TMC_AXICTL);
  817. axictl &= ~TMC_AXICTL_CLEAR_MASK;
  818. axictl |= (TMC_AXICTL_PROT_CTL_B1 | TMC_AXICTL_WR_BURST_16);
  819. axictl |= TMC_AXICTL_AXCACHE_OS;
  820. if (tmc_etr_has_cap(drvdata, TMC_ETR_AXI_ARCACHE)) {
  821. axictl &= ~TMC_AXICTL_ARCACHE_MASK;
  822. axictl |= TMC_AXICTL_ARCACHE_OS;
  823. }
  824. if (etr_buf->mode == ETR_MODE_ETR_SG) {
  825. if (WARN_ON(!tmc_etr_has_cap(drvdata, TMC_ETR_SG)))
  826. return;
  827. axictl |= TMC_AXICTL_SCT_GAT_MODE;
  828. }
  829. writel_relaxed(axictl, drvdata->base + TMC_AXICTL);
  830. tmc_write_dba(drvdata, etr_buf->hwaddr);
  831. /*
  832. * If the TMC pointers must be programmed before the session,
  833. * we have to set it properly (i.e, RRP/RWP to base address and
  834. * STS to "not full").
  835. */
  836. if (tmc_etr_has_cap(drvdata, TMC_ETR_SAVE_RESTORE)) {
  837. tmc_write_rrp(drvdata, etr_buf->hwaddr);
  838. tmc_write_rwp(drvdata, etr_buf->hwaddr);
  839. sts = readl_relaxed(drvdata->base + TMC_STS) & ~TMC_STS_FULL;
  840. writel_relaxed(sts, drvdata->base + TMC_STS);
  841. }
  842. writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI |
  843. TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT |
  844. TMC_FFCR_TRIGON_TRIGIN,
  845. drvdata->base + TMC_FFCR);
  846. writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG);
  847. tmc_enable_hw(drvdata);
  848. CS_LOCK(drvdata->base);
  849. }
  850. /*
  851. * Return the available trace data in the buffer (starts at etr_buf->offset,
  852. * limited by etr_buf->len) from @pos, with a maximum limit of @len,
  853. * also updating the @bufpp on where to find it. Since the trace data
  854. * starts at anywhere in the buffer, depending on the RRP, we adjust the
  855. * @len returned to handle buffer wrapping around.
  856. *
  857. * We are protected here by drvdata->reading != 0, which ensures the
  858. * sysfs_buf stays alive.
  859. */
  860. ssize_t tmc_etr_get_sysfs_trace(struct tmc_drvdata *drvdata,
  861. loff_t pos, size_t len, char **bufpp)
  862. {
  863. s64 offset;
  864. ssize_t actual = len;
  865. struct etr_buf *etr_buf = drvdata->sysfs_buf;
  866. if (pos + actual > etr_buf->len)
  867. actual = etr_buf->len - pos;
  868. if (actual <= 0)
  869. return actual;
  870. /* Compute the offset from which we read the data */
  871. offset = etr_buf->offset + pos;
  872. if (offset >= etr_buf->size)
  873. offset -= etr_buf->size;
  874. return tmc_etr_buf_get_data(etr_buf, offset, actual, bufpp);
  875. }
  876. static struct etr_buf *
  877. tmc_etr_setup_sysfs_buf(struct tmc_drvdata *drvdata)
  878. {
  879. return tmc_alloc_etr_buf(drvdata, drvdata->size,
  880. 0, cpu_to_node(0), NULL);
  881. }
  882. static void
  883. tmc_etr_free_sysfs_buf(struct etr_buf *buf)
  884. {
  885. if (buf)
  886. tmc_free_etr_buf(buf);
  887. }
  888. static void tmc_etr_sync_sysfs_buf(struct tmc_drvdata *drvdata)
  889. {
  890. struct etr_buf *etr_buf = drvdata->etr_buf;
  891. if (WARN_ON(drvdata->sysfs_buf != etr_buf)) {
  892. tmc_etr_free_sysfs_buf(drvdata->sysfs_buf);
  893. drvdata->sysfs_buf = NULL;
  894. } else {
  895. tmc_sync_etr_buf(drvdata);
  896. }
  897. }
  898. static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
  899. {
  900. CS_UNLOCK(drvdata->base);
  901. tmc_flush_and_stop(drvdata);
  902. /*
  903. * When operating in sysFS mode the content of the buffer needs to be
  904. * read before the TMC is disabled.
  905. */
  906. if (drvdata->mode == CS_MODE_SYSFS)
  907. tmc_etr_sync_sysfs_buf(drvdata);
  908. tmc_disable_hw(drvdata);
  909. CS_LOCK(drvdata->base);
  910. /* Disable CATU device if this ETR is connected to one */
  911. tmc_etr_disable_catu(drvdata);
  912. /* Reset the ETR buf used by hardware */
  913. drvdata->etr_buf = NULL;
  914. }
  915. static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev)
  916. {
  917. int ret = 0;
  918. unsigned long flags;
  919. struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
  920. struct etr_buf *sysfs_buf = NULL, *new_buf = NULL, *free_buf = NULL;
  921. /*
  922. * If we are enabling the ETR from disabled state, we need to make
  923. * sure we have a buffer with the right size. The etr_buf is not reset
  924. * immediately after we stop the tracing in SYSFS mode as we wait for
  925. * the user to collect the data. We may be able to reuse the existing
  926. * buffer, provided the size matches. Any allocation has to be done
  927. * with the lock released.
  928. */
  929. spin_lock_irqsave(&drvdata->spinlock, flags);
  930. sysfs_buf = READ_ONCE(drvdata->sysfs_buf);
  931. if (!sysfs_buf || (sysfs_buf->size != drvdata->size)) {
  932. spin_unlock_irqrestore(&drvdata->spinlock, flags);
  933. /* Allocate memory with the locks released */
  934. free_buf = new_buf = tmc_etr_setup_sysfs_buf(drvdata);
  935. if (IS_ERR(new_buf))
  936. return PTR_ERR(new_buf);
  937. /* Let's try again */
  938. spin_lock_irqsave(&drvdata->spinlock, flags);
  939. }
  940. if (drvdata->reading || drvdata->mode == CS_MODE_PERF) {
  941. ret = -EBUSY;
  942. goto out;
  943. }
  944. /*
  945. * In sysFS mode we can have multiple writers per sink. Since this
  946. * sink is already enabled no memory is needed and the HW need not be
  947. * touched, even if the buffer size has changed.
  948. */
  949. if (drvdata->mode == CS_MODE_SYSFS)
  950. goto out;
  951. /*
  952. * If we don't have a buffer or it doesn't match the requested size,
  953. * use the buffer allocated above. Otherwise reuse the existing buffer.
  954. */
  955. sysfs_buf = READ_ONCE(drvdata->sysfs_buf);
  956. if (!sysfs_buf || (new_buf && sysfs_buf->size != new_buf->size)) {
  957. free_buf = sysfs_buf;
  958. drvdata->sysfs_buf = new_buf;
  959. }
  960. drvdata->mode = CS_MODE_SYSFS;
  961. tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf);
  962. out:
  963. spin_unlock_irqrestore(&drvdata->spinlock, flags);
  964. /* Free memory outside the spinlock if need be */
  965. if (free_buf)
  966. tmc_etr_free_sysfs_buf(free_buf);
  967. if (!ret)
  968. dev_info(drvdata->dev, "TMC-ETR enabled\n");
  969. return ret;
  970. }
  971. static int tmc_enable_etr_sink_perf(struct coresight_device *csdev)
  972. {
  973. /* We don't support perf mode yet ! */
  974. return -EINVAL;
  975. }
  976. static int tmc_enable_etr_sink(struct coresight_device *csdev, u32 mode)
  977. {
  978. switch (mode) {
  979. case CS_MODE_SYSFS:
  980. return tmc_enable_etr_sink_sysfs(csdev);
  981. case CS_MODE_PERF:
  982. return tmc_enable_etr_sink_perf(csdev);
  983. }
  984. /* We shouldn't be here */
  985. return -EINVAL;
  986. }
  987. static void tmc_disable_etr_sink(struct coresight_device *csdev)
  988. {
  989. unsigned long flags;
  990. struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
  991. spin_lock_irqsave(&drvdata->spinlock, flags);
  992. if (drvdata->reading) {
  993. spin_unlock_irqrestore(&drvdata->spinlock, flags);
  994. return;
  995. }
  996. /* Disable the TMC only if it needs to */
  997. if (drvdata->mode != CS_MODE_DISABLED) {
  998. tmc_etr_disable_hw(drvdata);
  999. drvdata->mode = CS_MODE_DISABLED;
  1000. }
  1001. spin_unlock_irqrestore(&drvdata->spinlock, flags);
  1002. dev_info(drvdata->dev, "TMC-ETR disabled\n");
  1003. }
  1004. static const struct coresight_ops_sink tmc_etr_sink_ops = {
  1005. .enable = tmc_enable_etr_sink,
  1006. .disable = tmc_disable_etr_sink,
  1007. };
  1008. const struct coresight_ops tmc_etr_cs_ops = {
  1009. .sink_ops = &tmc_etr_sink_ops,
  1010. };
  1011. int tmc_read_prepare_etr(struct tmc_drvdata *drvdata)
  1012. {
  1013. int ret = 0;
  1014. unsigned long flags;
  1015. /* config types are set a boot time and never change */
  1016. if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETR))
  1017. return -EINVAL;
  1018. spin_lock_irqsave(&drvdata->spinlock, flags);
  1019. if (drvdata->reading) {
  1020. ret = -EBUSY;
  1021. goto out;
  1022. }
  1023. /* Don't interfere if operated from Perf */
  1024. if (drvdata->mode == CS_MODE_PERF) {
  1025. ret = -EINVAL;
  1026. goto out;
  1027. }
  1028. /* If sysfs_buf is NULL the trace data has been read already */
  1029. if (!drvdata->sysfs_buf) {
  1030. ret = -EINVAL;
  1031. goto out;
  1032. }
  1033. /* Disable the TMC if we are trying to read from a running session */
  1034. if (drvdata->mode == CS_MODE_SYSFS)
  1035. tmc_etr_disable_hw(drvdata);
  1036. drvdata->reading = true;
  1037. out:
  1038. spin_unlock_irqrestore(&drvdata->spinlock, flags);
  1039. return ret;
  1040. }
  1041. int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata)
  1042. {
  1043. unsigned long flags;
  1044. struct etr_buf *sysfs_buf = NULL;
  1045. /* config types are set a boot time and never change */
  1046. if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETR))
  1047. return -EINVAL;
  1048. spin_lock_irqsave(&drvdata->spinlock, flags);
  1049. /* RE-enable the TMC if need be */
  1050. if (drvdata->mode == CS_MODE_SYSFS) {
  1051. /*
  1052. * The trace run will continue with the same allocated trace
  1053. * buffer. Since the tracer is still enabled drvdata::buf can't
  1054. * be NULL.
  1055. */
  1056. tmc_etr_enable_hw(drvdata, drvdata->sysfs_buf);
  1057. } else {
  1058. /*
  1059. * The ETR is not tracing and the buffer was just read.
  1060. * As such prepare to free the trace buffer.
  1061. */
  1062. sysfs_buf = drvdata->sysfs_buf;
  1063. drvdata->sysfs_buf = NULL;
  1064. }
  1065. drvdata->reading = false;
  1066. spin_unlock_irqrestore(&drvdata->spinlock, flags);
  1067. /* Free allocated memory out side of the spinlock */
  1068. if (sysfs_buf)
  1069. tmc_etr_free_sysfs_buf(sysfs_buf);
  1070. return 0;
  1071. }