smu.c 30 KB

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  1. /*
  2. * PowerMac G5 SMU driver
  3. *
  4. * Copyright 2004 J. Mayer <l_indien@magic.fr>
  5. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  6. *
  7. * Released under the term of the GNU GPL v2.
  8. */
  9. /*
  10. * TODO:
  11. * - maybe add timeout to commands ?
  12. * - blocking version of time functions
  13. * - polling version of i2c commands (including timer that works with
  14. * interrupts off)
  15. * - maybe avoid some data copies with i2c by directly using the smu cmd
  16. * buffer and a lower level internal interface
  17. * - understand SMU -> CPU events and implement reception of them via
  18. * the userland interface
  19. */
  20. #include <linux/types.h>
  21. #include <linux/kernel.h>
  22. #include <linux/device.h>
  23. #include <linux/dmapool.h>
  24. #include <linux/bootmem.h>
  25. #include <linux/vmalloc.h>
  26. #include <linux/highmem.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/rtc.h>
  30. #include <linux/completion.h>
  31. #include <linux/miscdevice.h>
  32. #include <linux/delay.h>
  33. #include <linux/poll.h>
  34. #include <linux/mutex.h>
  35. #include <linux/of_device.h>
  36. #include <linux/of_irq.h>
  37. #include <linux/of_platform.h>
  38. #include <linux/slab.h>
  39. #include <linux/memblock.h>
  40. #include <linux/sched/signal.h>
  41. #include <asm/byteorder.h>
  42. #include <asm/io.h>
  43. #include <asm/prom.h>
  44. #include <asm/machdep.h>
  45. #include <asm/pmac_feature.h>
  46. #include <asm/smu.h>
  47. #include <asm/sections.h>
  48. #include <linux/uaccess.h>
  49. #define VERSION "0.7"
  50. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  51. #undef DEBUG_SMU
  52. #ifdef DEBUG_SMU
  53. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  54. #else
  55. #define DPRINTK(fmt, args...) do { } while (0)
  56. #endif
  57. /*
  58. * This is the command buffer passed to the SMU hardware
  59. */
  60. #define SMU_MAX_DATA 254
  61. struct smu_cmd_buf {
  62. u8 cmd;
  63. u8 length;
  64. u8 data[SMU_MAX_DATA];
  65. };
  66. struct smu_device {
  67. spinlock_t lock;
  68. struct device_node *of_node;
  69. struct platform_device *of_dev;
  70. int doorbell; /* doorbell gpio */
  71. u32 __iomem *db_buf; /* doorbell buffer */
  72. struct device_node *db_node;
  73. unsigned int db_irq;
  74. int msg;
  75. struct device_node *msg_node;
  76. unsigned int msg_irq;
  77. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  78. u32 cmd_buf_abs; /* command buffer absolute */
  79. struct list_head cmd_list;
  80. struct smu_cmd *cmd_cur; /* pending command */
  81. int broken_nap;
  82. struct list_head cmd_i2c_list;
  83. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  84. struct timer_list i2c_timer;
  85. };
  86. /*
  87. * I don't think there will ever be more than one SMU, so
  88. * for now, just hard code that
  89. */
  90. static DEFINE_MUTEX(smu_mutex);
  91. static struct smu_device *smu;
  92. static DEFINE_MUTEX(smu_part_access);
  93. static int smu_irq_inited;
  94. static unsigned long smu_cmdbuf_abs;
  95. static void smu_i2c_retry(struct timer_list *t);
  96. /*
  97. * SMU driver low level stuff
  98. */
  99. static void smu_start_cmd(void)
  100. {
  101. unsigned long faddr, fend;
  102. struct smu_cmd *cmd;
  103. if (list_empty(&smu->cmd_list))
  104. return;
  105. /* Fetch first command in queue */
  106. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  107. smu->cmd_cur = cmd;
  108. list_del(&cmd->link);
  109. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  110. cmd->data_len);
  111. DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
  112. /* Fill the SMU command buffer */
  113. smu->cmd_buf->cmd = cmd->cmd;
  114. smu->cmd_buf->length = cmd->data_len;
  115. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  116. /* Flush command and data to RAM */
  117. faddr = (unsigned long)smu->cmd_buf;
  118. fend = faddr + smu->cmd_buf->length + 2;
  119. flush_inval_dcache_range(faddr, fend);
  120. /* We also disable NAP mode for the duration of the command
  121. * on U3 based machines.
  122. * This is slightly racy as it can be written back to 1 by a sysctl
  123. * but that never happens in practice. There seem to be an issue with
  124. * U3 based machines such as the iMac G5 where napping for the
  125. * whole duration of the command prevents the SMU from fetching it
  126. * from memory. This might be related to the strange i2c based
  127. * mechanism the SMU uses to access memory.
  128. */
  129. if (smu->broken_nap)
  130. powersave_nap = 0;
  131. /* This isn't exactly a DMA mapping here, I suspect
  132. * the SMU is actually communicating with us via i2c to the
  133. * northbridge or the CPU to access RAM.
  134. */
  135. writel(smu->cmd_buf_abs, smu->db_buf);
  136. /* Ring the SMU doorbell */
  137. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  138. }
  139. static irqreturn_t smu_db_intr(int irq, void *arg)
  140. {
  141. unsigned long flags;
  142. struct smu_cmd *cmd;
  143. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  144. void *misc = NULL;
  145. u8 gpio;
  146. int rc = 0;
  147. /* SMU completed the command, well, we hope, let's make sure
  148. * of it
  149. */
  150. spin_lock_irqsave(&smu->lock, flags);
  151. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  152. if ((gpio & 7) != 7) {
  153. spin_unlock_irqrestore(&smu->lock, flags);
  154. return IRQ_HANDLED;
  155. }
  156. cmd = smu->cmd_cur;
  157. smu->cmd_cur = NULL;
  158. if (cmd == NULL)
  159. goto bail;
  160. if (rc == 0) {
  161. unsigned long faddr;
  162. int reply_len;
  163. u8 ack;
  164. /* CPU might have brought back the cache line, so we need
  165. * to flush again before peeking at the SMU response. We
  166. * flush the entire buffer for now as we haven't read the
  167. * reply length (it's only 2 cache lines anyway)
  168. */
  169. faddr = (unsigned long)smu->cmd_buf;
  170. flush_inval_dcache_range(faddr, faddr + 256);
  171. /* Now check ack */
  172. ack = (~cmd->cmd) & 0xff;
  173. if (ack != smu->cmd_buf->cmd) {
  174. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  175. ack, smu->cmd_buf->cmd);
  176. rc = -EIO;
  177. }
  178. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  179. DPRINTK("SMU: reply len: %d\n", reply_len);
  180. if (reply_len > cmd->reply_len) {
  181. printk(KERN_WARNING "SMU: reply buffer too small,"
  182. "got %d bytes for a %d bytes buffer\n",
  183. reply_len, cmd->reply_len);
  184. reply_len = cmd->reply_len;
  185. }
  186. cmd->reply_len = reply_len;
  187. if (cmd->reply_buf && reply_len)
  188. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  189. }
  190. /* Now complete the command. Write status last in order as we lost
  191. * ownership of the command structure as soon as it's no longer -1
  192. */
  193. done = cmd->done;
  194. misc = cmd->misc;
  195. mb();
  196. cmd->status = rc;
  197. /* Re-enable NAP mode */
  198. if (smu->broken_nap)
  199. powersave_nap = 1;
  200. bail:
  201. /* Start next command if any */
  202. smu_start_cmd();
  203. spin_unlock_irqrestore(&smu->lock, flags);
  204. /* Call command completion handler if any */
  205. if (done)
  206. done(cmd, misc);
  207. /* It's an edge interrupt, nothing to do */
  208. return IRQ_HANDLED;
  209. }
  210. static irqreturn_t smu_msg_intr(int irq, void *arg)
  211. {
  212. /* I don't quite know what to do with this one, we seem to never
  213. * receive it, so I suspect we have to arm it someway in the SMU
  214. * to start getting events that way.
  215. */
  216. printk(KERN_INFO "SMU: message interrupt !\n");
  217. /* It's an edge interrupt, nothing to do */
  218. return IRQ_HANDLED;
  219. }
  220. /*
  221. * Queued command management.
  222. *
  223. */
  224. int smu_queue_cmd(struct smu_cmd *cmd)
  225. {
  226. unsigned long flags;
  227. if (smu == NULL)
  228. return -ENODEV;
  229. if (cmd->data_len > SMU_MAX_DATA ||
  230. cmd->reply_len > SMU_MAX_DATA)
  231. return -EINVAL;
  232. cmd->status = 1;
  233. spin_lock_irqsave(&smu->lock, flags);
  234. list_add_tail(&cmd->link, &smu->cmd_list);
  235. if (smu->cmd_cur == NULL)
  236. smu_start_cmd();
  237. spin_unlock_irqrestore(&smu->lock, flags);
  238. /* Workaround for early calls when irq isn't available */
  239. if (!smu_irq_inited || !smu->db_irq)
  240. smu_spinwait_cmd(cmd);
  241. return 0;
  242. }
  243. EXPORT_SYMBOL(smu_queue_cmd);
  244. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  245. unsigned int data_len,
  246. void (*done)(struct smu_cmd *cmd, void *misc),
  247. void *misc, ...)
  248. {
  249. struct smu_cmd *cmd = &scmd->cmd;
  250. va_list list;
  251. int i;
  252. if (data_len > sizeof(scmd->buffer))
  253. return -EINVAL;
  254. memset(scmd, 0, sizeof(*scmd));
  255. cmd->cmd = command;
  256. cmd->data_len = data_len;
  257. cmd->data_buf = scmd->buffer;
  258. cmd->reply_len = sizeof(scmd->buffer);
  259. cmd->reply_buf = scmd->buffer;
  260. cmd->done = done;
  261. cmd->misc = misc;
  262. va_start(list, misc);
  263. for (i = 0; i < data_len; ++i)
  264. scmd->buffer[i] = (u8)va_arg(list, int);
  265. va_end(list);
  266. return smu_queue_cmd(cmd);
  267. }
  268. EXPORT_SYMBOL(smu_queue_simple);
  269. void smu_poll(void)
  270. {
  271. u8 gpio;
  272. if (smu == NULL)
  273. return;
  274. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  275. if ((gpio & 7) == 7)
  276. smu_db_intr(smu->db_irq, smu);
  277. }
  278. EXPORT_SYMBOL(smu_poll);
  279. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  280. {
  281. struct completion *comp = misc;
  282. complete(comp);
  283. }
  284. EXPORT_SYMBOL(smu_done_complete);
  285. void smu_spinwait_cmd(struct smu_cmd *cmd)
  286. {
  287. while(cmd->status == 1)
  288. smu_poll();
  289. }
  290. EXPORT_SYMBOL(smu_spinwait_cmd);
  291. /* RTC low level commands */
  292. static inline int bcd2hex (int n)
  293. {
  294. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  295. }
  296. static inline int hex2bcd (int n)
  297. {
  298. return ((n / 10) << 4) + (n % 10);
  299. }
  300. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  301. struct rtc_time *time)
  302. {
  303. cmd_buf->cmd = 0x8e;
  304. cmd_buf->length = 8;
  305. cmd_buf->data[0] = 0x80;
  306. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  307. cmd_buf->data[2] = hex2bcd(time->tm_min);
  308. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  309. cmd_buf->data[4] = time->tm_wday;
  310. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  311. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  312. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  313. }
  314. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  315. {
  316. struct smu_simple_cmd cmd;
  317. int rc;
  318. if (smu == NULL)
  319. return -ENODEV;
  320. memset(time, 0, sizeof(struct rtc_time));
  321. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  322. SMU_CMD_RTC_GET_DATETIME);
  323. if (rc)
  324. return rc;
  325. smu_spinwait_simple(&cmd);
  326. time->tm_sec = bcd2hex(cmd.buffer[0]);
  327. time->tm_min = bcd2hex(cmd.buffer[1]);
  328. time->tm_hour = bcd2hex(cmd.buffer[2]);
  329. time->tm_wday = bcd2hex(cmd.buffer[3]);
  330. time->tm_mday = bcd2hex(cmd.buffer[4]);
  331. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  332. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  333. return 0;
  334. }
  335. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  336. {
  337. struct smu_simple_cmd cmd;
  338. int rc;
  339. if (smu == NULL)
  340. return -ENODEV;
  341. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  342. SMU_CMD_RTC_SET_DATETIME,
  343. hex2bcd(time->tm_sec),
  344. hex2bcd(time->tm_min),
  345. hex2bcd(time->tm_hour),
  346. time->tm_wday,
  347. hex2bcd(time->tm_mday),
  348. hex2bcd(time->tm_mon) + 1,
  349. hex2bcd(time->tm_year - 100));
  350. if (rc)
  351. return rc;
  352. smu_spinwait_simple(&cmd);
  353. return 0;
  354. }
  355. void smu_shutdown(void)
  356. {
  357. struct smu_simple_cmd cmd;
  358. if (smu == NULL)
  359. return;
  360. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  361. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  362. return;
  363. smu_spinwait_simple(&cmd);
  364. for (;;)
  365. ;
  366. }
  367. void smu_restart(void)
  368. {
  369. struct smu_simple_cmd cmd;
  370. if (smu == NULL)
  371. return;
  372. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  373. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  374. return;
  375. smu_spinwait_simple(&cmd);
  376. for (;;)
  377. ;
  378. }
  379. int smu_present(void)
  380. {
  381. return smu != NULL;
  382. }
  383. EXPORT_SYMBOL(smu_present);
  384. int __init smu_init (void)
  385. {
  386. struct device_node *np;
  387. const u32 *data;
  388. int ret = 0;
  389. np = of_find_node_by_type(NULL, "smu");
  390. if (np == NULL)
  391. return -ENODEV;
  392. printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
  393. /*
  394. * SMU based G5s need some memory below 2Gb. Thankfully this is
  395. * called at a time where memblock is still available.
  396. */
  397. smu_cmdbuf_abs = memblock_alloc_base(4096, 4096, 0x80000000UL);
  398. if (smu_cmdbuf_abs == 0) {
  399. printk(KERN_ERR "SMU: Command buffer allocation failed !\n");
  400. ret = -EINVAL;
  401. goto fail_np;
  402. }
  403. smu = alloc_bootmem(sizeof(struct smu_device));
  404. spin_lock_init(&smu->lock);
  405. INIT_LIST_HEAD(&smu->cmd_list);
  406. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  407. smu->of_node = np;
  408. smu->db_irq = 0;
  409. smu->msg_irq = 0;
  410. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  411. * 32 bits value safely
  412. */
  413. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  414. smu->cmd_buf = __va(smu_cmdbuf_abs);
  415. smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
  416. if (smu->db_node == NULL) {
  417. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  418. ret = -ENXIO;
  419. goto fail_bootmem;
  420. }
  421. data = of_get_property(smu->db_node, "reg", NULL);
  422. if (data == NULL) {
  423. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  424. ret = -ENXIO;
  425. goto fail_db_node;
  426. }
  427. /* Current setup has one doorbell GPIO that does both doorbell
  428. * and ack. GPIOs are at 0x50, best would be to find that out
  429. * in the device-tree though.
  430. */
  431. smu->doorbell = *data;
  432. if (smu->doorbell < 0x50)
  433. smu->doorbell += 0x50;
  434. /* Now look for the smu-interrupt GPIO */
  435. do {
  436. smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
  437. if (smu->msg_node == NULL)
  438. break;
  439. data = of_get_property(smu->msg_node, "reg", NULL);
  440. if (data == NULL) {
  441. of_node_put(smu->msg_node);
  442. smu->msg_node = NULL;
  443. break;
  444. }
  445. smu->msg = *data;
  446. if (smu->msg < 0x50)
  447. smu->msg += 0x50;
  448. } while(0);
  449. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  450. * device-tree entry giving the address. Best would probably to use
  451. * an offset for K2 base though, but let's do it that way for now.
  452. */
  453. smu->db_buf = ioremap(0x8000860c, 0x1000);
  454. if (smu->db_buf == NULL) {
  455. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  456. ret = -ENXIO;
  457. goto fail_msg_node;
  458. }
  459. /* U3 has an issue with NAP mode when issuing SMU commands */
  460. smu->broken_nap = pmac_get_uninorth_variant() < 4;
  461. if (smu->broken_nap)
  462. printk(KERN_INFO "SMU: using NAP mode workaround\n");
  463. sys_ctrler = SYS_CTRLER_SMU;
  464. return 0;
  465. fail_msg_node:
  466. of_node_put(smu->msg_node);
  467. fail_db_node:
  468. of_node_put(smu->db_node);
  469. fail_bootmem:
  470. free_bootmem(__pa(smu), sizeof(struct smu_device));
  471. smu = NULL;
  472. fail_np:
  473. of_node_put(np);
  474. return ret;
  475. }
  476. static int smu_late_init(void)
  477. {
  478. if (!smu)
  479. return 0;
  480. timer_setup(&smu->i2c_timer, smu_i2c_retry, 0);
  481. if (smu->db_node) {
  482. smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
  483. if (!smu->db_irq)
  484. printk(KERN_ERR "smu: failed to map irq for node %pOF\n",
  485. smu->db_node);
  486. }
  487. if (smu->msg_node) {
  488. smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
  489. if (!smu->msg_irq)
  490. printk(KERN_ERR "smu: failed to map irq for node %pOF\n",
  491. smu->msg_node);
  492. }
  493. /*
  494. * Try to request the interrupts
  495. */
  496. if (smu->db_irq) {
  497. if (request_irq(smu->db_irq, smu_db_intr,
  498. IRQF_SHARED, "SMU doorbell", smu) < 0) {
  499. printk(KERN_WARNING "SMU: can't "
  500. "request interrupt %d\n",
  501. smu->db_irq);
  502. smu->db_irq = 0;
  503. }
  504. }
  505. if (smu->msg_irq) {
  506. if (request_irq(smu->msg_irq, smu_msg_intr,
  507. IRQF_SHARED, "SMU message", smu) < 0) {
  508. printk(KERN_WARNING "SMU: can't "
  509. "request interrupt %d\n",
  510. smu->msg_irq);
  511. smu->msg_irq = 0;
  512. }
  513. }
  514. smu_irq_inited = 1;
  515. return 0;
  516. }
  517. /* This has to be before arch_initcall as the low i2c stuff relies on the
  518. * above having been done before we reach arch_initcalls
  519. */
  520. core_initcall(smu_late_init);
  521. /*
  522. * sysfs visibility
  523. */
  524. static void smu_expose_childs(struct work_struct *unused)
  525. {
  526. struct device_node *np;
  527. for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
  528. if (of_device_is_compatible(np, "smu-sensors"))
  529. of_platform_device_create(np, "smu-sensors",
  530. &smu->of_dev->dev);
  531. }
  532. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
  533. static int smu_platform_probe(struct platform_device* dev)
  534. {
  535. if (!smu)
  536. return -ENODEV;
  537. smu->of_dev = dev;
  538. /*
  539. * Ok, we are matched, now expose all i2c busses. We have to defer
  540. * that unfortunately or it would deadlock inside the device model
  541. */
  542. schedule_work(&smu_expose_childs_work);
  543. return 0;
  544. }
  545. static const struct of_device_id smu_platform_match[] =
  546. {
  547. {
  548. .type = "smu",
  549. },
  550. {},
  551. };
  552. static struct platform_driver smu_of_platform_driver =
  553. {
  554. .driver = {
  555. .name = "smu",
  556. .of_match_table = smu_platform_match,
  557. },
  558. .probe = smu_platform_probe,
  559. };
  560. static int __init smu_init_sysfs(void)
  561. {
  562. /*
  563. * For now, we don't power manage machines with an SMU chip,
  564. * I'm a bit too far from figuring out how that works with those
  565. * new chipsets, but that will come back and bite us
  566. */
  567. platform_driver_register(&smu_of_platform_driver);
  568. return 0;
  569. }
  570. device_initcall(smu_init_sysfs);
  571. struct platform_device *smu_get_ofdev(void)
  572. {
  573. if (!smu)
  574. return NULL;
  575. return smu->of_dev;
  576. }
  577. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  578. /*
  579. * i2c interface
  580. */
  581. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  582. {
  583. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  584. void *misc = cmd->misc;
  585. unsigned long flags;
  586. /* Check for read case */
  587. if (!fail && cmd->read) {
  588. if (cmd->pdata[0] < 1)
  589. fail = 1;
  590. else
  591. memcpy(cmd->info.data, &cmd->pdata[1],
  592. cmd->info.datalen);
  593. }
  594. DPRINTK("SMU: completing, success: %d\n", !fail);
  595. /* Update status and mark no pending i2c command with lock
  596. * held so nobody comes in while we dequeue an eventual
  597. * pending next i2c command
  598. */
  599. spin_lock_irqsave(&smu->lock, flags);
  600. smu->cmd_i2c_cur = NULL;
  601. wmb();
  602. cmd->status = fail ? -EIO : 0;
  603. /* Is there another i2c command waiting ? */
  604. if (!list_empty(&smu->cmd_i2c_list)) {
  605. struct smu_i2c_cmd *newcmd;
  606. /* Fetch it, new current, remove from list */
  607. newcmd = list_entry(smu->cmd_i2c_list.next,
  608. struct smu_i2c_cmd, link);
  609. smu->cmd_i2c_cur = newcmd;
  610. list_del(&cmd->link);
  611. /* Queue with low level smu */
  612. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  613. if (smu->cmd_cur == NULL)
  614. smu_start_cmd();
  615. }
  616. spin_unlock_irqrestore(&smu->lock, flags);
  617. /* Call command completion handler if any */
  618. if (done)
  619. done(cmd, misc);
  620. }
  621. static void smu_i2c_retry(struct timer_list *unused)
  622. {
  623. struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
  624. DPRINTK("SMU: i2c failure, requeuing...\n");
  625. /* requeue command simply by resetting reply_len */
  626. cmd->pdata[0] = 0xff;
  627. cmd->scmd.reply_len = sizeof(cmd->pdata);
  628. smu_queue_cmd(&cmd->scmd);
  629. }
  630. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  631. {
  632. struct smu_i2c_cmd *cmd = misc;
  633. int fail = 0;
  634. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  635. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  636. /* Check for possible status */
  637. if (scmd->status < 0)
  638. fail = 1;
  639. else if (cmd->read) {
  640. if (cmd->stage == 0)
  641. fail = cmd->pdata[0] != 0;
  642. else
  643. fail = cmd->pdata[0] >= 0x80;
  644. } else {
  645. fail = cmd->pdata[0] != 0;
  646. }
  647. /* Handle failures by requeuing command, after 5ms interval
  648. */
  649. if (fail && --cmd->retries > 0) {
  650. DPRINTK("SMU: i2c failure, starting timer...\n");
  651. BUG_ON(cmd != smu->cmd_i2c_cur);
  652. if (!smu_irq_inited) {
  653. mdelay(5);
  654. smu_i2c_retry(NULL);
  655. return;
  656. }
  657. mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
  658. return;
  659. }
  660. /* If failure or stage 1, command is complete */
  661. if (fail || cmd->stage != 0) {
  662. smu_i2c_complete_command(cmd, fail);
  663. return;
  664. }
  665. DPRINTK("SMU: going to stage 1\n");
  666. /* Ok, initial command complete, now poll status */
  667. scmd->reply_buf = cmd->pdata;
  668. scmd->reply_len = sizeof(cmd->pdata);
  669. scmd->data_buf = cmd->pdata;
  670. scmd->data_len = 1;
  671. cmd->pdata[0] = 0;
  672. cmd->stage = 1;
  673. cmd->retries = 20;
  674. smu_queue_cmd(scmd);
  675. }
  676. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  677. {
  678. unsigned long flags;
  679. if (smu == NULL)
  680. return -ENODEV;
  681. /* Fill most fields of scmd */
  682. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  683. cmd->scmd.done = smu_i2c_low_completion;
  684. cmd->scmd.misc = cmd;
  685. cmd->scmd.reply_buf = cmd->pdata;
  686. cmd->scmd.reply_len = sizeof(cmd->pdata);
  687. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  688. cmd->scmd.status = 1;
  689. cmd->stage = 0;
  690. cmd->pdata[0] = 0xff;
  691. cmd->retries = 20;
  692. cmd->status = 1;
  693. /* Check transfer type, sanitize some "info" fields
  694. * based on transfer type and do more checking
  695. */
  696. cmd->info.caddr = cmd->info.devaddr;
  697. cmd->read = cmd->info.devaddr & 0x01;
  698. switch(cmd->info.type) {
  699. case SMU_I2C_TRANSFER_SIMPLE:
  700. memset(&cmd->info.sublen, 0, 4);
  701. break;
  702. case SMU_I2C_TRANSFER_COMBINED:
  703. cmd->info.devaddr &= 0xfe;
  704. case SMU_I2C_TRANSFER_STDSUB:
  705. if (cmd->info.sublen > 3)
  706. return -EINVAL;
  707. break;
  708. default:
  709. return -EINVAL;
  710. }
  711. /* Finish setting up command based on transfer direction
  712. */
  713. if (cmd->read) {
  714. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  715. return -EINVAL;
  716. memset(cmd->info.data, 0xff, cmd->info.datalen);
  717. cmd->scmd.data_len = 9;
  718. } else {
  719. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  720. return -EINVAL;
  721. cmd->scmd.data_len = 9 + cmd->info.datalen;
  722. }
  723. DPRINTK("SMU: i2c enqueuing command\n");
  724. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  725. cmd->read ? "read" : "write", cmd->info.datalen,
  726. cmd->info.bus, cmd->info.caddr,
  727. cmd->info.subaddr[0], cmd->info.type);
  728. /* Enqueue command in i2c list, and if empty, enqueue also in
  729. * main command list
  730. */
  731. spin_lock_irqsave(&smu->lock, flags);
  732. if (smu->cmd_i2c_cur == NULL) {
  733. smu->cmd_i2c_cur = cmd;
  734. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  735. if (smu->cmd_cur == NULL)
  736. smu_start_cmd();
  737. } else
  738. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  739. spin_unlock_irqrestore(&smu->lock, flags);
  740. return 0;
  741. }
  742. /*
  743. * Handling of "partitions"
  744. */
  745. static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
  746. {
  747. DECLARE_COMPLETION_ONSTACK(comp);
  748. unsigned int chunk;
  749. struct smu_cmd cmd;
  750. int rc;
  751. u8 params[8];
  752. /* We currently use a chunk size of 0xe. We could check the
  753. * SMU firmware version and use bigger sizes though
  754. */
  755. chunk = 0xe;
  756. while (len) {
  757. unsigned int clen = min(len, chunk);
  758. cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
  759. cmd.data_len = 7;
  760. cmd.data_buf = params;
  761. cmd.reply_len = chunk;
  762. cmd.reply_buf = dest;
  763. cmd.done = smu_done_complete;
  764. cmd.misc = &comp;
  765. params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
  766. params[1] = 0x4;
  767. *((u32 *)&params[2]) = addr;
  768. params[6] = clen;
  769. rc = smu_queue_cmd(&cmd);
  770. if (rc)
  771. return rc;
  772. wait_for_completion(&comp);
  773. if (cmd.status != 0)
  774. return rc;
  775. if (cmd.reply_len != clen) {
  776. printk(KERN_DEBUG "SMU: short read in "
  777. "smu_read_datablock, got: %d, want: %d\n",
  778. cmd.reply_len, clen);
  779. return -EIO;
  780. }
  781. len -= clen;
  782. addr += clen;
  783. dest += clen;
  784. }
  785. return 0;
  786. }
  787. static struct smu_sdbp_header *smu_create_sdb_partition(int id)
  788. {
  789. DECLARE_COMPLETION_ONSTACK(comp);
  790. struct smu_simple_cmd cmd;
  791. unsigned int addr, len, tlen;
  792. struct smu_sdbp_header *hdr;
  793. struct property *prop;
  794. /* First query the partition info */
  795. DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
  796. smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
  797. smu_done_complete, &comp,
  798. SMU_CMD_PARTITION_LATEST, id);
  799. wait_for_completion(&comp);
  800. DPRINTK("SMU: done, status: %d, reply_len: %d\n",
  801. cmd.cmd.status, cmd.cmd.reply_len);
  802. /* Partition doesn't exist (or other error) */
  803. if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
  804. return NULL;
  805. /* Fetch address and length from reply */
  806. addr = *((u16 *)cmd.buffer);
  807. len = cmd.buffer[3] << 2;
  808. /* Calucluate total length to allocate, including the 17 bytes
  809. * for "sdb-partition-XX" that we append at the end of the buffer
  810. */
  811. tlen = sizeof(struct property) + len + 18;
  812. prop = kzalloc(tlen, GFP_KERNEL);
  813. if (prop == NULL)
  814. return NULL;
  815. hdr = (struct smu_sdbp_header *)(prop + 1);
  816. prop->name = ((char *)prop) + tlen - 18;
  817. sprintf(prop->name, "sdb-partition-%02x", id);
  818. prop->length = len;
  819. prop->value = hdr;
  820. prop->next = NULL;
  821. /* Read the datablock */
  822. if (smu_read_datablock((u8 *)hdr, addr, len)) {
  823. printk(KERN_DEBUG "SMU: datablock read failed while reading "
  824. "partition %02x !\n", id);
  825. goto failure;
  826. }
  827. /* Got it, check a few things and create the property */
  828. if (hdr->id != id) {
  829. printk(KERN_DEBUG "SMU: Reading partition %02x and got "
  830. "%02x !\n", id, hdr->id);
  831. goto failure;
  832. }
  833. if (of_add_property(smu->of_node, prop)) {
  834. printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
  835. "property !\n", id);
  836. goto failure;
  837. }
  838. return hdr;
  839. failure:
  840. kfree(prop);
  841. return NULL;
  842. }
  843. /* Note: Only allowed to return error code in pointers (using ERR_PTR)
  844. * when interruptible is 1
  845. */
  846. const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
  847. unsigned int *size, int interruptible)
  848. {
  849. char pname[32];
  850. const struct smu_sdbp_header *part;
  851. if (!smu)
  852. return NULL;
  853. sprintf(pname, "sdb-partition-%02x", id);
  854. DPRINTK("smu_get_sdb_partition(%02x)\n", id);
  855. if (interruptible) {
  856. int rc;
  857. rc = mutex_lock_interruptible(&smu_part_access);
  858. if (rc)
  859. return ERR_PTR(rc);
  860. } else
  861. mutex_lock(&smu_part_access);
  862. part = of_get_property(smu->of_node, pname, size);
  863. if (part == NULL) {
  864. DPRINTK("trying to extract from SMU ...\n");
  865. part = smu_create_sdb_partition(id);
  866. if (part != NULL && size)
  867. *size = part->len << 2;
  868. }
  869. mutex_unlock(&smu_part_access);
  870. return part;
  871. }
  872. const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
  873. {
  874. return __smu_get_sdb_partition(id, size, 0);
  875. }
  876. EXPORT_SYMBOL(smu_get_sdb_partition);
  877. /*
  878. * Userland driver interface
  879. */
  880. static LIST_HEAD(smu_clist);
  881. static DEFINE_SPINLOCK(smu_clist_lock);
  882. enum smu_file_mode {
  883. smu_file_commands,
  884. smu_file_events,
  885. smu_file_closing
  886. };
  887. struct smu_private
  888. {
  889. struct list_head list;
  890. enum smu_file_mode mode;
  891. int busy;
  892. struct smu_cmd cmd;
  893. spinlock_t lock;
  894. wait_queue_head_t wait;
  895. u8 buffer[SMU_MAX_DATA];
  896. };
  897. static int smu_open(struct inode *inode, struct file *file)
  898. {
  899. struct smu_private *pp;
  900. unsigned long flags;
  901. pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
  902. if (pp == 0)
  903. return -ENOMEM;
  904. spin_lock_init(&pp->lock);
  905. pp->mode = smu_file_commands;
  906. init_waitqueue_head(&pp->wait);
  907. mutex_lock(&smu_mutex);
  908. spin_lock_irqsave(&smu_clist_lock, flags);
  909. list_add(&pp->list, &smu_clist);
  910. spin_unlock_irqrestore(&smu_clist_lock, flags);
  911. file->private_data = pp;
  912. mutex_unlock(&smu_mutex);
  913. return 0;
  914. }
  915. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  916. {
  917. struct smu_private *pp = misc;
  918. wake_up_all(&pp->wait);
  919. }
  920. static ssize_t smu_write(struct file *file, const char __user *buf,
  921. size_t count, loff_t *ppos)
  922. {
  923. struct smu_private *pp = file->private_data;
  924. unsigned long flags;
  925. struct smu_user_cmd_hdr hdr;
  926. int rc = 0;
  927. if (pp->busy)
  928. return -EBUSY;
  929. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  930. return -EFAULT;
  931. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  932. pp->mode = smu_file_events;
  933. return 0;
  934. } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
  935. const struct smu_sdbp_header *part;
  936. part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
  937. if (part == NULL)
  938. return -EINVAL;
  939. else if (IS_ERR(part))
  940. return PTR_ERR(part);
  941. return 0;
  942. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  943. return -EINVAL;
  944. else if (pp->mode != smu_file_commands)
  945. return -EBADFD;
  946. else if (hdr.data_len > SMU_MAX_DATA)
  947. return -EINVAL;
  948. spin_lock_irqsave(&pp->lock, flags);
  949. if (pp->busy) {
  950. spin_unlock_irqrestore(&pp->lock, flags);
  951. return -EBUSY;
  952. }
  953. pp->busy = 1;
  954. pp->cmd.status = 1;
  955. spin_unlock_irqrestore(&pp->lock, flags);
  956. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  957. pp->busy = 0;
  958. return -EFAULT;
  959. }
  960. pp->cmd.cmd = hdr.cmd;
  961. pp->cmd.data_len = hdr.data_len;
  962. pp->cmd.reply_len = SMU_MAX_DATA;
  963. pp->cmd.data_buf = pp->buffer;
  964. pp->cmd.reply_buf = pp->buffer;
  965. pp->cmd.done = smu_user_cmd_done;
  966. pp->cmd.misc = pp;
  967. rc = smu_queue_cmd(&pp->cmd);
  968. if (rc < 0)
  969. return rc;
  970. return count;
  971. }
  972. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  973. char __user *buf, size_t count)
  974. {
  975. DECLARE_WAITQUEUE(wait, current);
  976. struct smu_user_reply_hdr hdr;
  977. unsigned long flags;
  978. int size, rc = 0;
  979. if (!pp->busy)
  980. return 0;
  981. if (count < sizeof(struct smu_user_reply_hdr))
  982. return -EOVERFLOW;
  983. spin_lock_irqsave(&pp->lock, flags);
  984. if (pp->cmd.status == 1) {
  985. if (file->f_flags & O_NONBLOCK) {
  986. spin_unlock_irqrestore(&pp->lock, flags);
  987. return -EAGAIN;
  988. }
  989. add_wait_queue(&pp->wait, &wait);
  990. for (;;) {
  991. set_current_state(TASK_INTERRUPTIBLE);
  992. rc = 0;
  993. if (pp->cmd.status != 1)
  994. break;
  995. rc = -ERESTARTSYS;
  996. if (signal_pending(current))
  997. break;
  998. spin_unlock_irqrestore(&pp->lock, flags);
  999. schedule();
  1000. spin_lock_irqsave(&pp->lock, flags);
  1001. }
  1002. set_current_state(TASK_RUNNING);
  1003. remove_wait_queue(&pp->wait, &wait);
  1004. }
  1005. spin_unlock_irqrestore(&pp->lock, flags);
  1006. if (rc)
  1007. return rc;
  1008. if (pp->cmd.status != 0)
  1009. pp->cmd.reply_len = 0;
  1010. size = sizeof(hdr) + pp->cmd.reply_len;
  1011. if (count < size)
  1012. size = count;
  1013. rc = size;
  1014. hdr.status = pp->cmd.status;
  1015. hdr.reply_len = pp->cmd.reply_len;
  1016. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  1017. return -EFAULT;
  1018. size -= sizeof(hdr);
  1019. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  1020. return -EFAULT;
  1021. pp->busy = 0;
  1022. return rc;
  1023. }
  1024. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  1025. char __user *buf, size_t count)
  1026. {
  1027. /* Not implemented */
  1028. msleep_interruptible(1000);
  1029. return 0;
  1030. }
  1031. static ssize_t smu_read(struct file *file, char __user *buf,
  1032. size_t count, loff_t *ppos)
  1033. {
  1034. struct smu_private *pp = file->private_data;
  1035. if (pp->mode == smu_file_commands)
  1036. return smu_read_command(file, pp, buf, count);
  1037. if (pp->mode == smu_file_events)
  1038. return smu_read_events(file, pp, buf, count);
  1039. return -EBADFD;
  1040. }
  1041. static __poll_t smu_fpoll(struct file *file, poll_table *wait)
  1042. {
  1043. struct smu_private *pp = file->private_data;
  1044. __poll_t mask = 0;
  1045. unsigned long flags;
  1046. if (pp == 0)
  1047. return 0;
  1048. if (pp->mode == smu_file_commands) {
  1049. poll_wait(file, &pp->wait, wait);
  1050. spin_lock_irqsave(&pp->lock, flags);
  1051. if (pp->busy && pp->cmd.status != 1)
  1052. mask |= EPOLLIN;
  1053. spin_unlock_irqrestore(&pp->lock, flags);
  1054. }
  1055. if (pp->mode == smu_file_events) {
  1056. /* Not yet implemented */
  1057. }
  1058. return mask;
  1059. }
  1060. static int smu_release(struct inode *inode, struct file *file)
  1061. {
  1062. struct smu_private *pp = file->private_data;
  1063. unsigned long flags;
  1064. unsigned int busy;
  1065. if (pp == 0)
  1066. return 0;
  1067. file->private_data = NULL;
  1068. /* Mark file as closing to avoid races with new request */
  1069. spin_lock_irqsave(&pp->lock, flags);
  1070. pp->mode = smu_file_closing;
  1071. busy = pp->busy;
  1072. /* Wait for any pending request to complete */
  1073. if (busy && pp->cmd.status == 1) {
  1074. DECLARE_WAITQUEUE(wait, current);
  1075. add_wait_queue(&pp->wait, &wait);
  1076. for (;;) {
  1077. set_current_state(TASK_UNINTERRUPTIBLE);
  1078. if (pp->cmd.status != 1)
  1079. break;
  1080. spin_unlock_irqrestore(&pp->lock, flags);
  1081. schedule();
  1082. spin_lock_irqsave(&pp->lock, flags);
  1083. }
  1084. set_current_state(TASK_RUNNING);
  1085. remove_wait_queue(&pp->wait, &wait);
  1086. }
  1087. spin_unlock_irqrestore(&pp->lock, flags);
  1088. spin_lock_irqsave(&smu_clist_lock, flags);
  1089. list_del(&pp->list);
  1090. spin_unlock_irqrestore(&smu_clist_lock, flags);
  1091. kfree(pp);
  1092. return 0;
  1093. }
  1094. static const struct file_operations smu_device_fops = {
  1095. .llseek = no_llseek,
  1096. .read = smu_read,
  1097. .write = smu_write,
  1098. .poll = smu_fpoll,
  1099. .open = smu_open,
  1100. .release = smu_release,
  1101. };
  1102. static struct miscdevice pmu_device = {
  1103. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  1104. };
  1105. static int smu_device_init(void)
  1106. {
  1107. if (!smu)
  1108. return -ENODEV;
  1109. if (misc_register(&pmu_device) < 0)
  1110. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  1111. return 0;
  1112. }
  1113. device_initcall(smu_device_init);