qede.h 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570
  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #ifndef _QEDE_H_
  33. #define _QEDE_H_
  34. #include <linux/compiler.h>
  35. #include <linux/version.h>
  36. #include <linux/workqueue.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/bitmap.h>
  40. #include <linux/kernel.h>
  41. #include <linux/mutex.h>
  42. #include <linux/bpf.h>
  43. #include <net/xdp.h>
  44. #include <linux/qed/qede_rdma.h>
  45. #include <linux/io.h>
  46. #ifdef CONFIG_RFS_ACCEL
  47. #include <linux/cpu_rmap.h>
  48. #endif
  49. #include <linux/qed/common_hsi.h>
  50. #include <linux/qed/eth_common.h>
  51. #include <linux/qed/qed_if.h>
  52. #include <linux/qed/qed_chain.h>
  53. #include <linux/qed/qed_eth_if.h>
  54. #include <net/pkt_cls.h>
  55. #include <net/tc_act/tc_gact.h>
  56. #define QEDE_MAJOR_VERSION 8
  57. #define QEDE_MINOR_VERSION 33
  58. #define QEDE_REVISION_VERSION 0
  59. #define QEDE_ENGINEERING_VERSION 20
  60. #define DRV_MODULE_VERSION __stringify(QEDE_MAJOR_VERSION) "." \
  61. __stringify(QEDE_MINOR_VERSION) "." \
  62. __stringify(QEDE_REVISION_VERSION) "." \
  63. __stringify(QEDE_ENGINEERING_VERSION)
  64. #define DRV_MODULE_SYM qede
  65. struct qede_stats_common {
  66. u64 no_buff_discards;
  67. u64 packet_too_big_discard;
  68. u64 ttl0_discard;
  69. u64 rx_ucast_bytes;
  70. u64 rx_mcast_bytes;
  71. u64 rx_bcast_bytes;
  72. u64 rx_ucast_pkts;
  73. u64 rx_mcast_pkts;
  74. u64 rx_bcast_pkts;
  75. u64 mftag_filter_discards;
  76. u64 mac_filter_discards;
  77. u64 gft_filter_drop;
  78. u64 tx_ucast_bytes;
  79. u64 tx_mcast_bytes;
  80. u64 tx_bcast_bytes;
  81. u64 tx_ucast_pkts;
  82. u64 tx_mcast_pkts;
  83. u64 tx_bcast_pkts;
  84. u64 tx_err_drop_pkts;
  85. u64 coalesced_pkts;
  86. u64 coalesced_events;
  87. u64 coalesced_aborts_num;
  88. u64 non_coalesced_pkts;
  89. u64 coalesced_bytes;
  90. u64 link_change_count;
  91. /* port */
  92. u64 rx_64_byte_packets;
  93. u64 rx_65_to_127_byte_packets;
  94. u64 rx_128_to_255_byte_packets;
  95. u64 rx_256_to_511_byte_packets;
  96. u64 rx_512_to_1023_byte_packets;
  97. u64 rx_1024_to_1518_byte_packets;
  98. u64 rx_crc_errors;
  99. u64 rx_mac_crtl_frames;
  100. u64 rx_pause_frames;
  101. u64 rx_pfc_frames;
  102. u64 rx_align_errors;
  103. u64 rx_carrier_errors;
  104. u64 rx_oversize_packets;
  105. u64 rx_jabbers;
  106. u64 rx_undersize_packets;
  107. u64 rx_fragments;
  108. u64 tx_64_byte_packets;
  109. u64 tx_65_to_127_byte_packets;
  110. u64 tx_128_to_255_byte_packets;
  111. u64 tx_256_to_511_byte_packets;
  112. u64 tx_512_to_1023_byte_packets;
  113. u64 tx_1024_to_1518_byte_packets;
  114. u64 tx_pause_frames;
  115. u64 tx_pfc_frames;
  116. u64 brb_truncates;
  117. u64 brb_discards;
  118. u64 tx_mac_ctrl_frames;
  119. };
  120. struct qede_stats_bb {
  121. u64 rx_1519_to_1522_byte_packets;
  122. u64 rx_1519_to_2047_byte_packets;
  123. u64 rx_2048_to_4095_byte_packets;
  124. u64 rx_4096_to_9216_byte_packets;
  125. u64 rx_9217_to_16383_byte_packets;
  126. u64 tx_1519_to_2047_byte_packets;
  127. u64 tx_2048_to_4095_byte_packets;
  128. u64 tx_4096_to_9216_byte_packets;
  129. u64 tx_9217_to_16383_byte_packets;
  130. u64 tx_lpi_entry_count;
  131. u64 tx_total_collisions;
  132. };
  133. struct qede_stats_ah {
  134. u64 rx_1519_to_max_byte_packets;
  135. u64 tx_1519_to_max_byte_packets;
  136. };
  137. struct qede_stats {
  138. struct qede_stats_common common;
  139. union {
  140. struct qede_stats_bb bb;
  141. struct qede_stats_ah ah;
  142. };
  143. };
  144. struct qede_vlan {
  145. struct list_head list;
  146. u16 vid;
  147. bool configured;
  148. };
  149. struct qede_rdma_dev {
  150. struct qedr_dev *qedr_dev;
  151. struct list_head entry;
  152. struct list_head rdma_event_list;
  153. struct workqueue_struct *rdma_wq;
  154. struct kref refcnt;
  155. struct completion event_comp;
  156. };
  157. struct qede_ptp;
  158. #define QEDE_RFS_MAX_FLTR 256
  159. struct qede_dev {
  160. struct qed_dev *cdev;
  161. struct net_device *ndev;
  162. struct pci_dev *pdev;
  163. u32 dp_module;
  164. u8 dp_level;
  165. unsigned long flags;
  166. #define QEDE_FLAG_IS_VF BIT(0)
  167. #define IS_VF(edev) (!!((edev)->flags & QEDE_FLAG_IS_VF))
  168. #define QEDE_TX_TIMESTAMPING_EN BIT(1)
  169. #define QEDE_FLAGS_PTP_TX_IN_PRORGESS BIT(2)
  170. const struct qed_eth_ops *ops;
  171. struct qede_ptp *ptp;
  172. struct qed_dev_eth_info dev_info;
  173. #define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues)
  174. #define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues)
  175. #define QEDE_IS_BB(edev) \
  176. ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB)
  177. #define QEDE_IS_AH(edev) \
  178. ((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH)
  179. struct qede_fastpath *fp_array;
  180. u8 req_num_tx;
  181. u8 fp_num_tx;
  182. u8 req_num_rx;
  183. u8 fp_num_rx;
  184. u16 req_queues;
  185. u16 num_queues;
  186. #define QEDE_QUEUE_CNT(edev) ((edev)->num_queues)
  187. #define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx)
  188. #define QEDE_RX_QUEUE_IDX(edev, i) (i)
  189. #define QEDE_TSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_rx)
  190. struct qed_int_info int_info;
  191. /* Smaller private varaiant of the RTNL lock */
  192. struct mutex qede_lock;
  193. u32 state; /* Protected by qede_lock */
  194. u16 rx_buf_size;
  195. u32 rx_copybreak;
  196. /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */
  197. #define ETH_OVERHEAD (ETH_HLEN + 8 + 8)
  198. /* Max supported alignment is 256 (8 shift)
  199. * minimal alignment shift 6 is optimal for 57xxx HW performance
  200. */
  201. #define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT))
  202. /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes
  203. * at the end of skb->data, to avoid wasting a full cache line.
  204. * This reduces memory use (skb->truesize).
  205. */
  206. #define QEDE_FW_RX_ALIGN_END \
  207. max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT, \
  208. SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
  209. struct qede_stats stats;
  210. #define QEDE_RSS_INDIR_INITED BIT(0)
  211. #define QEDE_RSS_KEY_INITED BIT(1)
  212. #define QEDE_RSS_CAPS_INITED BIT(2)
  213. u32 rss_params_inited; /* bit-field to track initialized rss params */
  214. u16 rss_ind_table[128];
  215. u32 rss_key[10];
  216. u8 rss_caps;
  217. u16 q_num_rx_buffers; /* Must be a power of two */
  218. u16 q_num_tx_buffers; /* Must be a power of two */
  219. bool gro_disable;
  220. struct list_head vlan_list;
  221. u16 configured_vlans;
  222. u16 non_configured_vlans;
  223. bool accept_any_vlan;
  224. struct delayed_work sp_task;
  225. unsigned long sp_flags;
  226. u16 vxlan_dst_port;
  227. u16 geneve_dst_port;
  228. struct qede_arfs *arfs;
  229. bool wol_enabled;
  230. struct qede_rdma_dev rdma_info;
  231. struct bpf_prog *xdp_prog;
  232. };
  233. enum QEDE_STATE {
  234. QEDE_STATE_CLOSED,
  235. QEDE_STATE_OPEN,
  236. };
  237. #define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo))
  238. #define MAX_NUM_TC 8
  239. #define MAX_NUM_PRI 8
  240. /* The driver supports the new build_skb() API:
  241. * RX ring buffer contains pointer to kmalloc() data only,
  242. * skb are built only after the frame was DMA-ed.
  243. */
  244. struct sw_rx_data {
  245. struct page *data;
  246. dma_addr_t mapping;
  247. unsigned int page_offset;
  248. };
  249. enum qede_agg_state {
  250. QEDE_AGG_STATE_NONE = 0,
  251. QEDE_AGG_STATE_START = 1,
  252. QEDE_AGG_STATE_ERROR = 2
  253. };
  254. struct qede_agg_info {
  255. /* rx_buf is a data buffer that can be placed / consumed from rx bd
  256. * chain. It has two purposes: We will preallocate the data buffer
  257. * for each aggregation when we open the interface and will place this
  258. * buffer on the rx-bd-ring when we receive TPA_START. We don't want
  259. * to be in a state where allocation fails, as we can't reuse the
  260. * consumer buffer in the rx-chain since FW may still be writing to it
  261. * (since header needs to be modified for TPA).
  262. * The second purpose is to keep a pointer to the bd buffer during
  263. * aggregation.
  264. */
  265. struct sw_rx_data buffer;
  266. struct sk_buff *skb;
  267. /* We need some structs from the start cookie until termination */
  268. u16 vlan_tag;
  269. bool tpa_start_fail;
  270. u8 state;
  271. u8 frag_id;
  272. u8 tunnel_type;
  273. };
  274. struct qede_rx_queue {
  275. __le16 *hw_cons_ptr;
  276. void __iomem *hw_rxq_prod_addr;
  277. /* Required for the allocation of replacement buffers */
  278. struct device *dev;
  279. struct bpf_prog *xdp_prog;
  280. u16 sw_rx_cons;
  281. u16 sw_rx_prod;
  282. u16 filled_buffers;
  283. u8 data_direction;
  284. u8 rxq_id;
  285. /* Used once per each NAPI run */
  286. u16 num_rx_buffers;
  287. u16 rx_headroom;
  288. u32 rx_buf_size;
  289. u32 rx_buf_seg_size;
  290. struct sw_rx_data *sw_rx_ring;
  291. struct qed_chain rx_bd_ring;
  292. struct qed_chain rx_comp_ring ____cacheline_aligned;
  293. /* GRO */
  294. struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM];
  295. /* Used once per each NAPI run */
  296. u64 rcv_pkts;
  297. u64 rx_hw_errors;
  298. u64 rx_alloc_errors;
  299. u64 rx_ip_frags;
  300. u64 xdp_no_pass;
  301. void *handle;
  302. struct xdp_rxq_info xdp_rxq;
  303. };
  304. union db_prod {
  305. struct eth_db_data data;
  306. u32 raw;
  307. };
  308. struct sw_tx_bd {
  309. struct sk_buff *skb;
  310. u8 flags;
  311. /* Set on the first BD descriptor when there is a split BD */
  312. #define QEDE_TSO_SPLIT_BD BIT(0)
  313. };
  314. struct sw_tx_xdp {
  315. struct page *page;
  316. dma_addr_t mapping;
  317. };
  318. struct qede_tx_queue {
  319. u8 is_xdp;
  320. bool is_legacy;
  321. u16 sw_tx_cons;
  322. u16 sw_tx_prod;
  323. u16 num_tx_buffers; /* Slowpath only */
  324. u64 xmit_pkts;
  325. u64 stopped_cnt;
  326. __le16 *hw_cons_ptr;
  327. /* Needed for the mapping of packets */
  328. struct device *dev;
  329. void __iomem *doorbell_addr;
  330. union db_prod tx_db;
  331. int index; /* Slowpath only */
  332. #define QEDE_TXQ_XDP_TO_IDX(edev, txq) ((txq)->index - \
  333. QEDE_MAX_TSS_CNT(edev))
  334. #define QEDE_TXQ_IDX_TO_XDP(edev, idx) ((idx) + QEDE_MAX_TSS_CNT(edev))
  335. #define QEDE_NDEV_TXQ_ID_TO_FP_ID(edev, idx) ((edev)->fp_num_rx + \
  336. ((idx) % QEDE_TSS_COUNT(edev)))
  337. #define QEDE_NDEV_TXQ_ID_TO_TXQ_COS(edev, idx) ((idx) / QEDE_TSS_COUNT(edev))
  338. #define QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq) ((QEDE_TSS_COUNT(edev) * \
  339. (txq)->cos) + (txq)->index)
  340. #define QEDE_NDEV_TXQ_ID_TO_TXQ(edev, idx) \
  341. (&((edev)->fp_array[QEDE_NDEV_TXQ_ID_TO_FP_ID(edev, idx)].txq \
  342. [QEDE_NDEV_TXQ_ID_TO_TXQ_COS(edev, idx)]))
  343. #define QEDE_FP_TC0_TXQ(fp) (&((fp)->txq[0]))
  344. /* Regular Tx requires skb + metadata for release purpose,
  345. * while XDP requires the pages and the mapped address.
  346. */
  347. union {
  348. struct sw_tx_bd *skbs;
  349. struct sw_tx_xdp *xdp;
  350. } sw_tx_ring;
  351. struct qed_chain tx_pbl;
  352. /* Slowpath; Should be kept in end [unless missing padding] */
  353. void *handle;
  354. u16 cos;
  355. u16 ndev_txq_id;
  356. };
  357. #define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \
  358. le32_to_cpu((bd)->addr.lo))
  359. #define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len) \
  360. do { \
  361. (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \
  362. (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \
  363. (bd)->nbytes = cpu_to_le16(len); \
  364. } while (0)
  365. #define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes))
  366. struct qede_fastpath {
  367. struct qede_dev *edev;
  368. #define QEDE_FASTPATH_TX BIT(0)
  369. #define QEDE_FASTPATH_RX BIT(1)
  370. #define QEDE_FASTPATH_XDP BIT(2)
  371. #define QEDE_FASTPATH_COMBINED (QEDE_FASTPATH_TX | QEDE_FASTPATH_RX)
  372. u8 type;
  373. u8 id;
  374. u8 xdp_xmit;
  375. struct napi_struct napi;
  376. struct qed_sb_info *sb_info;
  377. struct qede_rx_queue *rxq;
  378. struct qede_tx_queue *txq;
  379. struct qede_tx_queue *xdp_tx;
  380. #define VEC_NAME_SIZE (sizeof(((struct net_device *)0)->name) + 8)
  381. char name[VEC_NAME_SIZE];
  382. };
  383. /* Debug print definitions */
  384. #define DP_NAME(edev) ((edev)->ndev->name)
  385. #define XMIT_PLAIN 0
  386. #define XMIT_L4_CSUM BIT(0)
  387. #define XMIT_LSO BIT(1)
  388. #define XMIT_ENC BIT(2)
  389. #define XMIT_ENC_GSO_L4_CSUM BIT(3)
  390. #define QEDE_CSUM_ERROR BIT(0)
  391. #define QEDE_CSUM_UNNECESSARY BIT(1)
  392. #define QEDE_TUNN_CSUM_UNNECESSARY BIT(2)
  393. #define QEDE_SP_RX_MODE 1
  394. #ifdef CONFIG_RFS_ACCEL
  395. int qede_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
  396. u16 rxq_index, u32 flow_id);
  397. #define QEDE_SP_ARFS_CONFIG 4
  398. #define QEDE_SP_TASK_POLL_DELAY (5 * HZ)
  399. #endif
  400. void qede_process_arfs_filters(struct qede_dev *edev, bool free_fltr);
  401. void qede_poll_for_freeing_arfs_filters(struct qede_dev *edev);
  402. void qede_arfs_filter_op(void *dev, void *filter, u8 fw_rc);
  403. void qede_free_arfs(struct qede_dev *edev);
  404. int qede_alloc_arfs(struct qede_dev *edev);
  405. int qede_add_cls_rule(struct qede_dev *edev, struct ethtool_rxnfc *info);
  406. int qede_delete_flow_filter(struct qede_dev *edev, u64 cookie);
  407. int qede_get_cls_rule_entry(struct qede_dev *edev, struct ethtool_rxnfc *cmd);
  408. int qede_get_cls_rule_all(struct qede_dev *edev, struct ethtool_rxnfc *info,
  409. u32 *rule_locs);
  410. int qede_get_arfs_filter_count(struct qede_dev *edev);
  411. struct qede_reload_args {
  412. void (*func)(struct qede_dev *edev, struct qede_reload_args *args);
  413. union {
  414. netdev_features_t features;
  415. struct bpf_prog *new_prog;
  416. u16 mtu;
  417. } u;
  418. };
  419. /* Datapath functions definition */
  420. netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev);
  421. u16 qede_select_queue(struct net_device *dev, struct sk_buff *skb,
  422. struct net_device *sb_dev,
  423. select_queue_fallback_t fallback);
  424. netdev_features_t qede_features_check(struct sk_buff *skb,
  425. struct net_device *dev,
  426. netdev_features_t features);
  427. void qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp);
  428. int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy);
  429. int qede_free_tx_pkt(struct qede_dev *edev,
  430. struct qede_tx_queue *txq, int *len);
  431. int qede_poll(struct napi_struct *napi, int budget);
  432. irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie);
  433. /* Filtering function definitions */
  434. void qede_force_mac(void *dev, u8 *mac, bool forced);
  435. void qede_udp_ports_update(void *dev, u16 vxlan_port, u16 geneve_port);
  436. int qede_set_mac_addr(struct net_device *ndev, void *p);
  437. int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid);
  438. int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid);
  439. void qede_vlan_mark_nonconfigured(struct qede_dev *edev);
  440. int qede_configure_vlan_filters(struct qede_dev *edev);
  441. netdev_features_t qede_fix_features(struct net_device *dev,
  442. netdev_features_t features);
  443. int qede_set_features(struct net_device *dev, netdev_features_t features);
  444. void qede_set_rx_mode(struct net_device *ndev);
  445. void qede_config_rx_mode(struct net_device *ndev);
  446. void qede_fill_rss_params(struct qede_dev *edev,
  447. struct qed_update_vport_rss_params *rss, u8 *update);
  448. void qede_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti);
  449. void qede_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti);
  450. int qede_xdp(struct net_device *dev, struct netdev_bpf *xdp);
  451. #ifdef CONFIG_DCB
  452. void qede_set_dcbnl_ops(struct net_device *ndev);
  453. #endif
  454. void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level);
  455. void qede_set_ethtool_ops(struct net_device *netdev);
  456. void qede_reload(struct qede_dev *edev,
  457. struct qede_reload_args *args, bool is_locked);
  458. int qede_change_mtu(struct net_device *dev, int new_mtu);
  459. void qede_fill_by_demand_stats(struct qede_dev *edev);
  460. void __qede_lock(struct qede_dev *edev);
  461. void __qede_unlock(struct qede_dev *edev);
  462. bool qede_has_rx_work(struct qede_rx_queue *rxq);
  463. int qede_txq_has_work(struct qede_tx_queue *txq);
  464. void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count);
  465. void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq);
  466. int qede_add_tc_flower_fltr(struct qede_dev *edev, __be16 proto,
  467. struct tc_cls_flower_offload *f);
  468. #define RX_RING_SIZE_POW 13
  469. #define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE_POW))
  470. #define NUM_RX_BDS_MAX (RX_RING_SIZE - 1)
  471. #define NUM_RX_BDS_MIN 128
  472. #define NUM_RX_BDS_KDUMP_MIN 63
  473. #define NUM_RX_BDS_DEF ((u16)BIT(10) - 1)
  474. #define TX_RING_SIZE_POW 13
  475. #define TX_RING_SIZE ((u16)BIT(TX_RING_SIZE_POW))
  476. #define NUM_TX_BDS_MAX (TX_RING_SIZE - 1)
  477. #define NUM_TX_BDS_MIN 128
  478. #define NUM_TX_BDS_KDUMP_MIN 63
  479. #define NUM_TX_BDS_DEF NUM_TX_BDS_MAX
  480. #define QEDE_MIN_PKT_LEN 64
  481. #define QEDE_RX_HDR_SIZE 256
  482. #define QEDE_MAX_JUMBO_PACKET_SIZE 9600
  483. #define for_each_queue(i) for (i = 0; i < edev->num_queues; i++)
  484. #define for_each_cos_in_txq(edev, var) \
  485. for ((var) = 0; (var) < (edev)->dev_info.num_tc; (var)++)
  486. #endif /* _QEDE_H_ */