tx.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450
  1. /*
  2. * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "mt76.h"
  17. static struct mt76_txwi_cache *
  18. mt76_alloc_txwi(struct mt76_dev *dev)
  19. {
  20. struct mt76_txwi_cache *t;
  21. dma_addr_t addr;
  22. int size;
  23. size = (sizeof(*t) + L1_CACHE_BYTES - 1) & ~(L1_CACHE_BYTES - 1);
  24. t = devm_kzalloc(dev->dev, size, GFP_ATOMIC);
  25. if (!t)
  26. return NULL;
  27. addr = dma_map_single(dev->dev, &t->txwi, sizeof(t->txwi),
  28. DMA_TO_DEVICE);
  29. t->dma_addr = addr;
  30. return t;
  31. }
  32. static struct mt76_txwi_cache *
  33. __mt76_get_txwi(struct mt76_dev *dev)
  34. {
  35. struct mt76_txwi_cache *t = NULL;
  36. spin_lock_bh(&dev->lock);
  37. if (!list_empty(&dev->txwi_cache)) {
  38. t = list_first_entry(&dev->txwi_cache, struct mt76_txwi_cache,
  39. list);
  40. list_del(&t->list);
  41. }
  42. spin_unlock_bh(&dev->lock);
  43. return t;
  44. }
  45. struct mt76_txwi_cache *
  46. mt76_get_txwi(struct mt76_dev *dev)
  47. {
  48. struct mt76_txwi_cache *t = __mt76_get_txwi(dev);
  49. if (t)
  50. return t;
  51. return mt76_alloc_txwi(dev);
  52. }
  53. void
  54. mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t)
  55. {
  56. if (!t)
  57. return;
  58. spin_lock_bh(&dev->lock);
  59. list_add(&t->list, &dev->txwi_cache);
  60. spin_unlock_bh(&dev->lock);
  61. }
  62. void mt76_tx_free(struct mt76_dev *dev)
  63. {
  64. struct mt76_txwi_cache *t;
  65. while ((t = __mt76_get_txwi(dev)) != NULL)
  66. dma_unmap_single(dev->dev, t->dma_addr, sizeof(t->txwi),
  67. DMA_TO_DEVICE);
  68. }
  69. static int
  70. mt76_txq_get_qid(struct ieee80211_txq *txq)
  71. {
  72. if (!txq->sta)
  73. return MT_TXQ_BE;
  74. return txq->ac;
  75. }
  76. void
  77. mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta,
  78. struct mt76_wcid *wcid, struct sk_buff *skb)
  79. {
  80. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  81. struct mt76_queue *q;
  82. int qid = skb_get_queue_mapping(skb);
  83. if (WARN_ON(qid >= MT_TXQ_PSD)) {
  84. qid = MT_TXQ_BE;
  85. skb_set_queue_mapping(skb, qid);
  86. }
  87. if (!wcid->tx_rate_set)
  88. ieee80211_get_tx_rates(info->control.vif, sta, skb,
  89. info->control.rates, 1);
  90. q = &dev->q_tx[qid];
  91. spin_lock_bh(&q->lock);
  92. dev->queue_ops->tx_queue_skb(dev, q, skb, wcid, sta);
  93. dev->queue_ops->kick(dev, q);
  94. if (q->queued > q->ndesc - 8)
  95. ieee80211_stop_queue(dev->hw, skb_get_queue_mapping(skb));
  96. spin_unlock_bh(&q->lock);
  97. }
  98. EXPORT_SYMBOL_GPL(mt76_tx);
  99. static struct sk_buff *
  100. mt76_txq_dequeue(struct mt76_dev *dev, struct mt76_txq *mtxq, bool ps)
  101. {
  102. struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
  103. struct sk_buff *skb;
  104. skb = skb_dequeue(&mtxq->retry_q);
  105. if (skb) {
  106. u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
  107. if (ps && skb_queue_empty(&mtxq->retry_q))
  108. ieee80211_sta_set_buffered(txq->sta, tid, false);
  109. return skb;
  110. }
  111. skb = ieee80211_tx_dequeue(dev->hw, txq);
  112. if (!skb)
  113. return NULL;
  114. return skb;
  115. }
  116. static void
  117. mt76_check_agg_ssn(struct mt76_txq *mtxq, struct sk_buff *skb)
  118. {
  119. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  120. if (!ieee80211_is_data_qos(hdr->frame_control) ||
  121. !ieee80211_is_data_present(hdr->frame_control))
  122. return;
  123. mtxq->agg_ssn = le16_to_cpu(hdr->seq_ctrl) + 0x10;
  124. }
  125. static void
  126. mt76_queue_ps_skb(struct mt76_dev *dev, struct ieee80211_sta *sta,
  127. struct sk_buff *skb, bool last)
  128. {
  129. struct mt76_wcid *wcid = (struct mt76_wcid *) sta->drv_priv;
  130. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  131. struct mt76_queue *hwq = &dev->q_tx[MT_TXQ_PSD];
  132. info->control.flags |= IEEE80211_TX_CTRL_PS_RESPONSE;
  133. if (last)
  134. info->flags |= IEEE80211_TX_STATUS_EOSP;
  135. mt76_skb_set_moredata(skb, !last);
  136. dev->queue_ops->tx_queue_skb(dev, hwq, skb, wcid, sta);
  137. }
  138. void
  139. mt76_release_buffered_frames(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
  140. u16 tids, int nframes,
  141. enum ieee80211_frame_release_type reason,
  142. bool more_data)
  143. {
  144. struct mt76_dev *dev = hw->priv;
  145. struct sk_buff *last_skb = NULL;
  146. struct mt76_queue *hwq = &dev->q_tx[MT_TXQ_PSD];
  147. int i;
  148. spin_lock_bh(&hwq->lock);
  149. for (i = 0; tids && nframes; i++, tids >>= 1) {
  150. struct ieee80211_txq *txq = sta->txq[i];
  151. struct mt76_txq *mtxq = (struct mt76_txq *) txq->drv_priv;
  152. struct sk_buff *skb;
  153. if (!(tids & 1))
  154. continue;
  155. do {
  156. skb = mt76_txq_dequeue(dev, mtxq, true);
  157. if (!skb)
  158. break;
  159. if (mtxq->aggr)
  160. mt76_check_agg_ssn(mtxq, skb);
  161. nframes--;
  162. if (last_skb)
  163. mt76_queue_ps_skb(dev, sta, last_skb, false);
  164. last_skb = skb;
  165. } while (nframes);
  166. }
  167. if (last_skb) {
  168. mt76_queue_ps_skb(dev, sta, last_skb, true);
  169. dev->queue_ops->kick(dev, hwq);
  170. }
  171. spin_unlock_bh(&hwq->lock);
  172. }
  173. EXPORT_SYMBOL_GPL(mt76_release_buffered_frames);
  174. static int
  175. mt76_txq_send_burst(struct mt76_dev *dev, struct mt76_queue *hwq,
  176. struct mt76_txq *mtxq, bool *empty)
  177. {
  178. struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
  179. struct ieee80211_tx_info *info;
  180. struct mt76_wcid *wcid = mtxq->wcid;
  181. struct sk_buff *skb;
  182. int n_frames = 1, limit;
  183. struct ieee80211_tx_rate tx_rate;
  184. bool ampdu;
  185. bool probe;
  186. int idx;
  187. skb = mt76_txq_dequeue(dev, mtxq, false);
  188. if (!skb) {
  189. *empty = true;
  190. return 0;
  191. }
  192. info = IEEE80211_SKB_CB(skb);
  193. if (!wcid->tx_rate_set)
  194. ieee80211_get_tx_rates(txq->vif, txq->sta, skb,
  195. info->control.rates, 1);
  196. tx_rate = info->control.rates[0];
  197. probe = (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
  198. ampdu = IEEE80211_SKB_CB(skb)->flags & IEEE80211_TX_CTL_AMPDU;
  199. limit = ampdu ? 16 : 3;
  200. if (ampdu)
  201. mt76_check_agg_ssn(mtxq, skb);
  202. idx = dev->queue_ops->tx_queue_skb(dev, hwq, skb, wcid, txq->sta);
  203. if (idx < 0)
  204. return idx;
  205. do {
  206. bool cur_ampdu;
  207. if (probe)
  208. break;
  209. if (test_bit(MT76_OFFCHANNEL, &dev->state) ||
  210. test_bit(MT76_RESET, &dev->state))
  211. return -EBUSY;
  212. skb = mt76_txq_dequeue(dev, mtxq, false);
  213. if (!skb) {
  214. *empty = true;
  215. break;
  216. }
  217. info = IEEE80211_SKB_CB(skb);
  218. cur_ampdu = info->flags & IEEE80211_TX_CTL_AMPDU;
  219. if (ampdu != cur_ampdu ||
  220. (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
  221. skb_queue_tail(&mtxq->retry_q, skb);
  222. break;
  223. }
  224. info->control.rates[0] = tx_rate;
  225. if (cur_ampdu)
  226. mt76_check_agg_ssn(mtxq, skb);
  227. idx = dev->queue_ops->tx_queue_skb(dev, hwq, skb, wcid,
  228. txq->sta);
  229. if (idx < 0)
  230. return idx;
  231. n_frames++;
  232. } while (n_frames < limit);
  233. if (!probe) {
  234. hwq->swq_queued++;
  235. hwq->entry[idx].schedule = true;
  236. }
  237. dev->queue_ops->kick(dev, hwq);
  238. return n_frames;
  239. }
  240. static int
  241. mt76_txq_schedule_list(struct mt76_dev *dev, struct mt76_queue *hwq)
  242. {
  243. struct mt76_txq *mtxq, *mtxq_last;
  244. int len = 0;
  245. restart:
  246. mtxq_last = list_last_entry(&hwq->swq, struct mt76_txq, list);
  247. while (!list_empty(&hwq->swq)) {
  248. bool empty = false;
  249. int cur;
  250. if (test_bit(MT76_OFFCHANNEL, &dev->state) ||
  251. test_bit(MT76_RESET, &dev->state))
  252. return -EBUSY;
  253. mtxq = list_first_entry(&hwq->swq, struct mt76_txq, list);
  254. if (mtxq->send_bar && mtxq->aggr) {
  255. struct ieee80211_txq *txq = mtxq_to_txq(mtxq);
  256. struct ieee80211_sta *sta = txq->sta;
  257. struct ieee80211_vif *vif = txq->vif;
  258. u16 agg_ssn = mtxq->agg_ssn;
  259. u8 tid = txq->tid;
  260. mtxq->send_bar = false;
  261. spin_unlock_bh(&hwq->lock);
  262. ieee80211_send_bar(vif, sta->addr, tid, agg_ssn);
  263. spin_lock_bh(&hwq->lock);
  264. goto restart;
  265. }
  266. list_del_init(&mtxq->list);
  267. cur = mt76_txq_send_burst(dev, hwq, mtxq, &empty);
  268. if (!empty)
  269. list_add_tail(&mtxq->list, &hwq->swq);
  270. if (cur < 0)
  271. return cur;
  272. len += cur;
  273. if (mtxq == mtxq_last)
  274. break;
  275. }
  276. return len;
  277. }
  278. void mt76_txq_schedule(struct mt76_dev *dev, struct mt76_queue *hwq)
  279. {
  280. int len;
  281. rcu_read_lock();
  282. do {
  283. if (hwq->swq_queued >= 4 || list_empty(&hwq->swq))
  284. break;
  285. len = mt76_txq_schedule_list(dev, hwq);
  286. } while (len > 0);
  287. rcu_read_unlock();
  288. }
  289. EXPORT_SYMBOL_GPL(mt76_txq_schedule);
  290. void mt76_txq_schedule_all(struct mt76_dev *dev)
  291. {
  292. int i;
  293. for (i = 0; i <= MT_TXQ_BK; i++) {
  294. struct mt76_queue *q = &dev->q_tx[i];
  295. spin_lock_bh(&q->lock);
  296. mt76_txq_schedule(dev, q);
  297. spin_unlock_bh(&q->lock);
  298. }
  299. }
  300. EXPORT_SYMBOL_GPL(mt76_txq_schedule_all);
  301. void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta,
  302. bool send_bar)
  303. {
  304. int i;
  305. for (i = 0; i < ARRAY_SIZE(sta->txq); i++) {
  306. struct ieee80211_txq *txq = sta->txq[i];
  307. struct mt76_txq *mtxq;
  308. if (!txq)
  309. continue;
  310. mtxq = (struct mt76_txq *)txq->drv_priv;
  311. spin_lock_bh(&mtxq->hwq->lock);
  312. mtxq->send_bar = mtxq->aggr && send_bar;
  313. if (!list_empty(&mtxq->list))
  314. list_del_init(&mtxq->list);
  315. spin_unlock_bh(&mtxq->hwq->lock);
  316. }
  317. }
  318. EXPORT_SYMBOL_GPL(mt76_stop_tx_queues);
  319. void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq)
  320. {
  321. struct mt76_dev *dev = hw->priv;
  322. struct mt76_txq *mtxq = (struct mt76_txq *) txq->drv_priv;
  323. struct mt76_queue *hwq = mtxq->hwq;
  324. spin_lock_bh(&hwq->lock);
  325. if (list_empty(&mtxq->list))
  326. list_add_tail(&mtxq->list, &hwq->swq);
  327. mt76_txq_schedule(dev, hwq);
  328. spin_unlock_bh(&hwq->lock);
  329. }
  330. EXPORT_SYMBOL_GPL(mt76_wake_tx_queue);
  331. void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq)
  332. {
  333. struct mt76_txq *mtxq;
  334. struct mt76_queue *hwq;
  335. struct sk_buff *skb;
  336. if (!txq)
  337. return;
  338. mtxq = (struct mt76_txq *) txq->drv_priv;
  339. hwq = mtxq->hwq;
  340. spin_lock_bh(&hwq->lock);
  341. if (!list_empty(&mtxq->list))
  342. list_del(&mtxq->list);
  343. spin_unlock_bh(&hwq->lock);
  344. while ((skb = skb_dequeue(&mtxq->retry_q)) != NULL)
  345. ieee80211_free_txskb(dev->hw, skb);
  346. }
  347. EXPORT_SYMBOL_GPL(mt76_txq_remove);
  348. void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq)
  349. {
  350. struct mt76_txq *mtxq = (struct mt76_txq *) txq->drv_priv;
  351. INIT_LIST_HEAD(&mtxq->list);
  352. skb_queue_head_init(&mtxq->retry_q);
  353. mtxq->hwq = &dev->q_tx[mt76_txq_get_qid(txq)];
  354. }
  355. EXPORT_SYMBOL_GPL(mt76_txq_init);