i2c.c 2.4 KB

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  1. /*
  2. * Helper module for board specific I2C bus registration
  3. *
  4. * Copyright (C) 2009 Nokia Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include "soc.h"
  22. #include "omap_hwmod.h"
  23. #include "omap_device.h"
  24. #include "prm.h"
  25. #include "common.h"
  26. #include "i2c.h"
  27. /* In register I2C_CON, Bit 15 is the I2C enable bit */
  28. #define I2C_EN BIT(15)
  29. #define OMAP2_I2C_CON_OFFSET 0x24
  30. #define OMAP4_I2C_CON_OFFSET 0xA4
  31. #define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
  32. /**
  33. * omap_i2c_reset - reset the omap i2c module.
  34. * @oh: struct omap_hwmod *
  35. *
  36. * The i2c moudle in omap2, omap3 had a special sequence to reset. The
  37. * sequence is:
  38. * - Disable the I2C.
  39. * - Write to SOFTRESET bit.
  40. * - Enable the I2C.
  41. * - Poll on the RESETDONE bit.
  42. * The sequence is implemented in below function. This is called for 2420,
  43. * 2430 and omap3.
  44. */
  45. int omap_i2c_reset(struct omap_hwmod *oh)
  46. {
  47. u32 v;
  48. u16 i2c_con;
  49. int c = 0;
  50. if (oh->class->rev == OMAP_I2C_IP_VERSION_2) {
  51. i2c_con = OMAP4_I2C_CON_OFFSET;
  52. } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) {
  53. i2c_con = OMAP2_I2C_CON_OFFSET;
  54. } else {
  55. WARN(1, "Cannot reset I2C block %s: unsupported revision\n",
  56. oh->name);
  57. return -EINVAL;
  58. }
  59. /* Disable I2C */
  60. v = omap_hwmod_read(oh, i2c_con);
  61. v &= ~I2C_EN;
  62. omap_hwmod_write(v, oh, i2c_con);
  63. /* Write to the SOFTRESET bit */
  64. omap_hwmod_softreset(oh);
  65. /* Enable I2C */
  66. v = omap_hwmod_read(oh, i2c_con);
  67. v |= I2C_EN;
  68. omap_hwmod_write(v, oh, i2c_con);
  69. /* Poll on RESETDONE bit */
  70. omap_test_timeout((omap_hwmod_read(oh,
  71. oh->class->sysc->syss_offs)
  72. & SYSS_RESETDONE_MASK),
  73. MAX_MODULE_SOFTRESET_WAIT, c);
  74. if (c == MAX_MODULE_SOFTRESET_WAIT)
  75. pr_warn("%s: %s: softreset failed (waited %d usec)\n",
  76. __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
  77. else
  78. pr_debug("%s: %s: softreset in %d usec\n", __func__,
  79. oh->name, c);
  80. return 0;
  81. }