ls1046a_serdes.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2016 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <asm/arch/fsl_serdes.h>
  7. #include <asm/arch/immap_lsch2.h>
  8. struct serdes_config {
  9. u32 protocol;
  10. u8 lanes[SRDS_MAX_LANES];
  11. };
  12. static struct serdes_config serdes1_cfg_tbl[] = {
  13. /* SerDes 1 */
  14. {0x3333, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
  15. SGMII_FM1_DTSEC6} },
  16. {0x1133, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC5,
  17. SGMII_FM1_DTSEC6} },
  18. {0x1333, {XFI_FM1_MAC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
  19. SGMII_FM1_DTSEC6} },
  20. {0x2333, {SGMII_2500_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
  21. SGMII_FM1_DTSEC6} },
  22. {0x2233, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
  23. SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
  24. {0x1040, {XFI_FM1_MAC9, NONE, QSGMII_FM1_A, NONE} },
  25. {0x2040, {SGMII_2500_FM1_DTSEC9, NONE, QSGMII_FM1_A, NONE} },
  26. {0x1163, {XFI_FM1_MAC9, XFI_FM1_MAC10, PCIE1, SGMII_FM1_DTSEC6} },
  27. {0x2263, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, PCIE1,
  28. SGMII_FM1_DTSEC6} },
  29. {0x3363, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6, PCIE1,
  30. SGMII_FM1_DTSEC6} },
  31. {0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
  32. SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
  33. {}
  34. };
  35. static struct serdes_config serdes2_cfg_tbl[] = {
  36. /* SerDes 2 */
  37. {0x8888, {PCIE1, PCIE1, PCIE1, PCIE1} },
  38. {0x5559, {PCIE1, PCIE2, PCIE3, SATA1} },
  39. {0x5577, {PCIE1, PCIE2, PCIE3, PCIE3} },
  40. {0x5506, {PCIE1, PCIE2, NONE, PCIE3} },
  41. {0x0506, {NONE, PCIE2, NONE, PCIE3} },
  42. {0x0559, {NONE, PCIE2, PCIE3, SATA1} },
  43. {0x5A59, {PCIE1, SGMII_FM1_DTSEC2, PCIE3, SATA1} },
  44. {0x5A06, {PCIE1, SGMII_FM1_DTSEC2, NONE, PCIE3} },
  45. {}
  46. };
  47. static struct serdes_config *serdes_cfg_tbl[] = {
  48. serdes1_cfg_tbl,
  49. serdes2_cfg_tbl,
  50. };
  51. enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
  52. {
  53. struct serdes_config *ptr;
  54. if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
  55. return 0;
  56. ptr = serdes_cfg_tbl[serdes];
  57. while (ptr->protocol) {
  58. if (ptr->protocol == cfg)
  59. return ptr->lanes[lane];
  60. ptr++;
  61. }
  62. return 0;
  63. }
  64. int is_serdes_prtcl_valid(int serdes, u32 prtcl)
  65. {
  66. int i;
  67. struct serdes_config *ptr;
  68. if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
  69. return 0;
  70. ptr = serdes_cfg_tbl[serdes];
  71. while (ptr->protocol) {
  72. if (ptr->protocol == prtcl)
  73. break;
  74. ptr++;
  75. }
  76. if (!ptr->protocol)
  77. return 0;
  78. for (i = 0; i < SRDS_MAX_LANES; i++) {
  79. if (ptr->lanes[i] != NONE)
  80. return 1;
  81. }
  82. return 0;
  83. }