config.h 2.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Common definitions for LPC32XX board configurations
  4. *
  5. * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
  6. */
  7. #ifndef _LPC32XX_CONFIG_H
  8. #define _LPC32XX_CONFIG_H
  9. /* Basic CPU architecture */
  10. #define CONFIG_ARCH_CPU_INIT
  11. #define CONFIG_NR_DRAM_BANKS_MAX 2
  12. /* UART configuration */
  13. #if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
  14. (CONFIG_SYS_LPC32XX_UART == 7)
  15. #if !defined(CONFIG_LPC32XX_HSUART)
  16. #define CONFIG_LPC32XX_HSUART
  17. #endif
  18. #endif
  19. #if !defined(CONFIG_SYS_NS16550_CLK)
  20. #define CONFIG_SYS_NS16550_CLK 13000000
  21. #endif
  22. #define CONFIG_SYS_BAUDRATE_TABLE \
  23. { 9600, 19200, 38400, 57600, 115200, 230400, 460800 }
  24. /* Ethernet */
  25. #define LPC32XX_ETH_BASE ETHERNET_BASE
  26. /* NAND */
  27. #if defined(CONFIG_NAND_LPC32XX_SLC)
  28. #define NAND_LARGE_BLOCK_PAGE_SIZE 0x800
  29. #define NAND_SMALL_BLOCK_PAGE_SIZE 0x200
  30. #if !defined(CONFIG_SYS_NAND_PAGE_SIZE)
  31. #define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
  32. #endif
  33. #if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE)
  34. #define CONFIG_SYS_NAND_OOBSIZE 64
  35. #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
  36. 48, 49, 50, 51, 52, 53, 54, 55, \
  37. 56, 57, 58, 59, 60, 61, 62, 63, }
  38. #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
  39. #elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE)
  40. #define CONFIG_SYS_NAND_OOBSIZE 16
  41. #define CONFIG_SYS_NAND_ECCPOS { 10, 11, 12, 13, 14, 15, }
  42. #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
  43. #else
  44. #error "CONFIG_SYS_NAND_PAGE_SIZE set to an invalid value"
  45. #endif
  46. #define CONFIG_SYS_NAND_ECCSIZE 0x100
  47. #define CONFIG_SYS_NAND_ECCBYTES 3
  48. #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
  49. CONFIG_SYS_NAND_PAGE_SIZE)
  50. #endif /* CONFIG_NAND_LPC32XX_SLC */
  51. /* NOR Flash */
  52. #if defined(CONFIG_SYS_FLASH_CFI)
  53. #define CONFIG_FLASH_CFI_DRIVER
  54. #define CONFIG_SYS_FLASH_PROTECTION
  55. #endif
  56. /* USB OHCI */
  57. #if defined(CONFIG_USB_OHCI_LPC32XX)
  58. #define CONFIG_USB_OHCI_NEW
  59. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  60. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
  61. #define CONFIG_SYS_USB_OHCI_REGS_BASE USB_BASE
  62. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "lpc32xx-ohci"
  63. #endif
  64. #endif /* _LPC32XX_CONFIG_H */