clock.h 587 B

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2010-2015
  4. * NVIDIA Corporation <www.nvidia.com>
  5. */
  6. /* Tegra210 clock control definitions */
  7. #ifndef _TEGRA210_CLOCK_H_
  8. #define _TEGRA210_CLOCK_H_
  9. #include <asm/arch-tegra/clock.h>
  10. /* CLK_RST_CONTROLLER_OSC_CTRL_0 */
  11. #define OSC_FREQ_SHIFT 28
  12. #define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT)
  13. /* PLL bits that differ from generic clk_rst.h */
  14. #define PLLC_RESET 30
  15. #define PLLC_IDDQ 27
  16. #define PLLD_ENABLE_CLK 21
  17. #define PLLD_EN_LCKDET 28
  18. int tegra_plle_enable(void);
  19. #endif /* _TEGRA210_CLOCK_H_ */