keystone_serdes.h 1.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Texas Instruments Keystone SerDes driver
  4. *
  5. * (C) Copyright 2014
  6. * Texas Instruments Incorporated, <www.ti.com>
  7. */
  8. #ifndef __TI_KEYSTONE_SERDES_H__
  9. #define __TI_KEYSTONE_SERDES_H__
  10. /* SERDES Reference clock */
  11. enum ks2_serdes_clock {
  12. SERDES_CLOCK_100M, /* 100 MHz */
  13. SERDES_CLOCK_122P88M, /* 122.88 MHz */
  14. SERDES_CLOCK_125M, /* 125 MHz */
  15. SERDES_CLOCK_156P25M, /* 156.25 MHz */
  16. SERDES_CLOCK_312P5M, /* 312.5 MHz */
  17. };
  18. /* SERDES Lane Baud Rate */
  19. enum ks2_serdes_rate {
  20. SERDES_RATE_4P9152G, /* 4.9152 GBaud */
  21. SERDES_RATE_5G, /* 5 GBaud */
  22. SERDES_RATE_6P144G, /* 6.144 GBaud */
  23. SERDES_RATE_6P25G, /* 6.25 GBaud */
  24. SERDES_RATE_10p3125g, /* 10.3215 GBaud */
  25. SERDES_RATE_12p5g, /* 12.5 GBaud */
  26. };
  27. /* SERDES Lane Rate Mode */
  28. enum ks2_serdes_rate_mode {
  29. SERDES_FULL_RATE,
  30. SERDES_HALF_RATE,
  31. SERDES_QUARTER_RATE,
  32. };
  33. /* SERDES PHY TYPE */
  34. enum ks2_serdes_interface {
  35. SERDES_PHY_SGMII,
  36. SERDES_PHY_PCSR, /* XGE SERDES */
  37. };
  38. struct ks2_serdes {
  39. enum ks2_serdes_clock clk;
  40. enum ks2_serdes_rate rate;
  41. enum ks2_serdes_rate_mode rate_mode;
  42. enum ks2_serdes_interface intf;
  43. u32 loopback;
  44. };
  45. int ks2_serdes_init(u32 base, struct ks2_serdes *serdes, u32 num_lanes);
  46. #endif /* __TI_KEYSTONE_SERDES_H__ */