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linux-arkmicro
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u-boot
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arch
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arm
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mach-kirkwood
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include
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mach
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soc.h

soc.h 2.5 KB
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  1. /* SPDX-License-Identifier: GPL-2.0+ */
    2. 

  2. /*
    3. 

  3.  * (C) Copyright 2009
    4. 

  4.  * Marvell Semiconductor <www.marvell.com>
    5. 

  5.  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
    6. 

  6.  *
    7. 

  7.  * Header file for the Marvell's Feroceon CPU core.
    8. 

  8.  */
    9. 

  9. 

  10. #ifndef _ASM_ARCH_KIRKWOOD_H
    11. 

  11. #define _ASM_ARCH_KIRKWOOD_H
    12. 

  12. 

  13. #if defined (CONFIG_FEROCEON_88FR131) || defined (CONFIG_SHEEVA_88SV131)
    14. 

  14. 

  15. /* SOC specific definations */
    16. 

  16. #define INTREG_BASE			0xd0000000
    17. 

  17. #define KW_REGISTER(x)			(KW_REGS_PHY_BASE + x)
    18. 

  18. #define KW_OFFSET_REG			(INTREG_BASE + 0x20080)
    19. 

  19. 

  20. /* undocumented registers */
    21. 

  21. #define KW_REG_UNDOC_0x1470		(KW_REGISTER(0x1470))
    22. 

  22. #define KW_REG_UNDOC_0x1478		(KW_REGISTER(0x1478))
    23. 

  23. 

  24. #define MVEBU_SDRAM_BASE		(KW_REGISTER(0x1500))
    25. 

  25. #define KW_TWSI_BASE			(KW_REGISTER(0x11000))
    26. 

  26. #define KW_UART0_BASE			(KW_REGISTER(0x12000))
    27. 

  27. #define KW_UART1_BASE			(KW_REGISTER(0x12100))
    28. 

  28. #define KW_MPP_BASE			(KW_REGISTER(0x10000))
    29. 

  29. #define MVEBU_GPIO0_BASE			(KW_REGISTER(0x10100))
    30. 

  30. #define MVEBU_GPIO1_BASE			(KW_REGISTER(0x10140))
    31. 

  31. #define KW_RTC_BASE			(KW_REGISTER(0x10300))
    32. 

  32. #define KW_NANDF_BASE			(KW_REGISTER(0x10418))
    33. 

  33. #define MVEBU_SPI_BASE			(KW_REGISTER(0x10600))
    34. 

  34. #define KW_CPU_WIN_BASE			(KW_REGISTER(0x20000))
    35. 

  35. #define KW_CPU_REG_BASE			(KW_REGISTER(0x20100))
    36. 

  36. #define MVEBU_TIMER_BASE			(KW_REGISTER(0x20300))
    37. 

  37. #define KW_REG_PCIE_BASE		(KW_REGISTER(0x40000))
    38. 

  38. #define KW_USB20_BASE			(KW_REGISTER(0x50000))
    39. 

  39. #define KW_EGIGA0_BASE			(KW_REGISTER(0x72000))
    40. 

  40. #define KW_EGIGA1_BASE			(KW_REGISTER(0x76000))
    41. 

  41. #define KW_SATA_BASE			(KW_REGISTER(0x80000))
    42. 

  42. #define KW_SDIO_BASE			(KW_REGISTER(0x90000))
    43. 

  43. 

  44. /* Kirkwood Sata controller has two ports */
    45. 

  45. #define KW_SATA_PORT0_OFFSET		0x2000
    46. 

  46. #define KW_SATA_PORT1_OFFSET		0x4000
    47. 

  47. 

  48. /* Kirkwood GbE controller has two ports */
    49. 

  49. #define MAX_MVGBE_DEVS	2
    50. 

  50. #define MVGBE0_BASE	KW_EGIGA0_BASE
    51. 

  51. #define MVGBE1_BASE	KW_EGIGA1_BASE
    52. 

  52. 

  53. /* Kirkwood USB Host controller */
    54. 

  54. #define MVUSB0_BASE			KW_USB20_BASE
    55. 

  55. #define MVUSB0_CPU_ATTR_DRAM_CS0	KWCPU_ATTR_DRAM_CS0
    56. 

  56. #define MVUSB0_CPU_ATTR_DRAM_CS1	KWCPU_ATTR_DRAM_CS1
    57. 

  57. #define MVUSB0_CPU_ATTR_DRAM_CS2	KWCPU_ATTR_DRAM_CS2
    58. 

  58. #define MVUSB0_CPU_ATTR_DRAM_CS3	KWCPU_ATTR_DRAM_CS3
    59. 

  59. 

  60. /* Kirkwood CPU memory windows */
    61. 

  61. #define MVCPU_WIN_CTRL_DATA	KWCPU_WIN_CTRL_DATA
    62. 

  62. #define MVCPU_WIN_ENABLE	KWCPU_WIN_ENABLE
    63. 

  63. #define MVCPU_WIN_DISABLE	KWCPU_WIN_DISABLE
    64. 

  64. 

  65. #if defined (CONFIG_KW88F6281)
    66. 

  66. #include <asm/arch/kw88f6281.h>
    67. 

  67. #elif defined (CONFIG_KW88F6192)
    68. 

  68. #include <asm/arch/kw88f6192.h>
    69. 

  69. #else
    70. 

  70. #error "SOC Name not defined"
    71. 

  71. #endif /* CONFIG_KW88F6281 */
    72. 

  72. #endif /* CONFIG_FEROCEON_88FR131 */
    73. 

  73. #endif /* _ASM_ARCH_KIRKWOOD_H */
    74.