mach-rx3715.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (c) 2003-2004 Simtec Electronics
  4. // Ben Dooks <ben@simtec.co.uk>
  5. //
  6. // http://www.handhelds.org/projects/rx3715.html
  7. #include <linux/kernel.h>
  8. #include <linux/types.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/list.h>
  11. #include <linux/memblock.h>
  12. #include <linux/timer.h>
  13. #include <linux/init.h>
  14. #include <linux/tty.h>
  15. #include <linux/console.h>
  16. #include <linux/device.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/serial_s3c.h>
  20. #include <linux/serial.h>
  21. #include <linux/io.h>
  22. #include <linux/mtd/mtd.h>
  23. #include <linux/mtd/rawnand.h>
  24. #include <linux/mtd/nand_ecc.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/mach/irq.h>
  28. #include <asm/mach/map.h>
  29. #include <linux/platform_data/mtd-nand-s3c2410.h>
  30. #include <asm/irq.h>
  31. #include <asm/mach-types.h>
  32. #include <mach/fb.h>
  33. #include <mach/hardware.h>
  34. #include <mach/regs-gpio.h>
  35. #include <mach/regs-lcd.h>
  36. #include <mach/gpio-samsung.h>
  37. #include <plat/cpu.h>
  38. #include <plat/devs.h>
  39. #include <plat/pm.h>
  40. #include <plat/samsung-time.h>
  41. #include "common.h"
  42. #include "h1940.h"
  43. static struct map_desc rx3715_iodesc[] __initdata = {
  44. /* dump ISA space somewhere unused */
  45. {
  46. .virtual = (u32)S3C24XX_VA_ISA_WORD,
  47. .pfn = __phys_to_pfn(S3C2410_CS3),
  48. .length = SZ_1M,
  49. .type = MT_DEVICE,
  50. }, {
  51. .virtual = (u32)S3C24XX_VA_ISA_BYTE,
  52. .pfn = __phys_to_pfn(S3C2410_CS3),
  53. .length = SZ_1M,
  54. .type = MT_DEVICE,
  55. },
  56. };
  57. static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
  58. [0] = {
  59. .hwport = 0,
  60. .flags = 0,
  61. .ucon = 0x3c5,
  62. .ulcon = 0x03,
  63. .ufcon = 0x51,
  64. .clk_sel = S3C2410_UCON_CLKSEL3,
  65. },
  66. [1] = {
  67. .hwport = 1,
  68. .flags = 0,
  69. .ucon = 0x3c5,
  70. .ulcon = 0x03,
  71. .ufcon = 0x00,
  72. .clk_sel = S3C2410_UCON_CLKSEL3,
  73. },
  74. /* IR port */
  75. [2] = {
  76. .hwport = 2,
  77. .uart_flags = UPF_CONS_FLOW,
  78. .ucon = 0x3c5,
  79. .ulcon = 0x43,
  80. .ufcon = 0x51,
  81. .clk_sel = S3C2410_UCON_CLKSEL3,
  82. }
  83. };
  84. /* framebuffer lcd controller information */
  85. static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
  86. .lcdcon5 = S3C2410_LCDCON5_INVVLINE |
  87. S3C2410_LCDCON5_FRM565 |
  88. S3C2410_LCDCON5_HWSWP,
  89. .type = S3C2410_LCDCON1_TFT,
  90. .width = 240,
  91. .height = 320,
  92. .pixclock = 260000,
  93. .xres = 240,
  94. .yres = 320,
  95. .bpp = 16,
  96. .left_margin = 36,
  97. .right_margin = 36,
  98. .hsync_len = 8,
  99. .upper_margin = 6,
  100. .lower_margin = 7,
  101. .vsync_len = 3,
  102. };
  103. static struct s3c2410fb_mach_info rx3715_fb_info __initdata = {
  104. .displays = &rx3715_lcdcfg,
  105. .num_displays = 1,
  106. .default_display = 0,
  107. .lpcsel = 0xf82,
  108. .gpccon = 0xaa955699,
  109. .gpccon_mask = 0xffc003cc,
  110. .gpcup = 0x0000ffff,
  111. .gpcup_mask = 0xffffffff,
  112. .gpdcon = 0xaa95aaa1,
  113. .gpdcon_mask = 0xffc0fff0,
  114. .gpdup = 0x0000faff,
  115. .gpdup_mask = 0xffffffff,
  116. };
  117. static struct mtd_partition __initdata rx3715_nand_part[] = {
  118. [0] = {
  119. .name = "Whole Flash",
  120. .offset = 0,
  121. .size = MTDPART_SIZ_FULL,
  122. .mask_flags = MTD_WRITEABLE,
  123. }
  124. };
  125. static struct s3c2410_nand_set __initdata rx3715_nand_sets[] = {
  126. [0] = {
  127. .name = "Internal",
  128. .nr_chips = 1,
  129. .nr_partitions = ARRAY_SIZE(rx3715_nand_part),
  130. .partitions = rx3715_nand_part,
  131. },
  132. };
  133. static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
  134. .tacls = 25,
  135. .twrph0 = 50,
  136. .twrph1 = 15,
  137. .nr_sets = ARRAY_SIZE(rx3715_nand_sets),
  138. .sets = rx3715_nand_sets,
  139. .ecc_mode = NAND_ECC_SOFT,
  140. };
  141. static struct platform_device *rx3715_devices[] __initdata = {
  142. &s3c_device_ohci,
  143. &s3c_device_lcd,
  144. &s3c_device_wdt,
  145. &s3c_device_i2c0,
  146. &s3c_device_iis,
  147. &s3c_device_nand,
  148. };
  149. static void __init rx3715_map_io(void)
  150. {
  151. s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
  152. s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
  153. samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
  154. }
  155. static void __init rx3715_init_time(void)
  156. {
  157. s3c2440_init_clocks(16934000);
  158. samsung_timer_init();
  159. }
  160. /* H1940 and RX3715 need to reserve this for suspend */
  161. static void __init rx3715_reserve(void)
  162. {
  163. memblock_reserve(0x30003000, 0x1000);
  164. memblock_reserve(0x30081000, 0x1000);
  165. }
  166. static void __init rx3715_init_machine(void)
  167. {
  168. #ifdef CONFIG_PM_H1940
  169. memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
  170. #endif
  171. s3c_pm_init();
  172. s3c_nand_set_platdata(&rx3715_nand_info);
  173. s3c24xx_fb_set_platdata(&rx3715_fb_info);
  174. platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices));
  175. }
  176. MACHINE_START(RX3715, "IPAQ-RX3715")
  177. /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
  178. .atag_offset = 0x100,
  179. .map_io = rx3715_map_io,
  180. .reserve = rx3715_reserve,
  181. .init_irq = s3c2440_init_irq,
  182. .init_machine = rx3715_init_machine,
  183. .init_time = rx3715_init_time,
  184. MACHINE_END