time.c 8.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Support for periodic interrupts (100 per second) and for getting
  4. * the current time from the RTC on Power Macintoshes.
  5. *
  6. * We use the decrementer register for our periodic interrupts.
  7. *
  8. * Paul Mackerras August 1996.
  9. * Copyright (C) 1996 Paul Mackerras.
  10. * Copyright (C) 2003-2005 Benjamin Herrenschmidt.
  11. *
  12. */
  13. #include <linux/errno.h>
  14. #include <linux/sched.h>
  15. #include <linux/kernel.h>
  16. #include <linux/param.h>
  17. #include <linux/string.h>
  18. #include <linux/mm.h>
  19. #include <linux/init.h>
  20. #include <linux/time.h>
  21. #include <linux/adb.h>
  22. #include <linux/cuda.h>
  23. #include <linux/pmu.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/hardirq.h>
  26. #include <linux/rtc.h>
  27. #include <asm/sections.h>
  28. #include <asm/prom.h>
  29. #include <asm/io.h>
  30. #include <asm/pgtable.h>
  31. #include <asm/machdep.h>
  32. #include <asm/time.h>
  33. #include <asm/nvram.h>
  34. #include <asm/smu.h>
  35. #include "pmac.h"
  36. #undef DEBUG
  37. #ifdef DEBUG
  38. #define DBG(x...) printk(x)
  39. #else
  40. #define DBG(x...)
  41. #endif
  42. /*
  43. * Offset between Unix time (1970-based) and Mac time (1904-based). Cuda and PMU
  44. * times wrap in 2040. If we need to handle later times, the read_time functions
  45. * need to be changed to interpret wrapped times as post-2040.
  46. */
  47. #define RTC_OFFSET 2082844800
  48. /*
  49. * Calibrate the decrementer frequency with the VIA timer 1.
  50. */
  51. #define VIA_TIMER_FREQ_6 4700000 /* time 1 frequency * 6 */
  52. /* VIA registers */
  53. #define RS 0x200 /* skip between registers */
  54. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  55. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  56. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  57. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  58. #define ACR (11*RS) /* Auxiliary control register */
  59. #define IFR (13*RS) /* Interrupt flag register */
  60. /* Bits in ACR */
  61. #define T1MODE 0xc0 /* Timer 1 mode */
  62. #define T1MODE_CONT 0x40 /* continuous interrupts */
  63. /* Bits in IFR and IER */
  64. #define T1_INT 0x40 /* Timer 1 interrupt */
  65. long __init pmac_time_init(void)
  66. {
  67. s32 delta = 0;
  68. #ifdef CONFIG_NVRAM
  69. int dst;
  70. delta = ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x9)) << 16;
  71. delta |= ((s32)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xa)) << 8;
  72. delta |= pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0xb);
  73. if (delta & 0x00800000UL)
  74. delta |= 0xFF000000UL;
  75. dst = ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC + 0x8) & 0x80) != 0);
  76. printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta/60,
  77. dst ? "on" : "off");
  78. #endif
  79. return delta;
  80. }
  81. #ifdef CONFIG_ADB_CUDA
  82. static time64_t cuda_get_time(void)
  83. {
  84. struct adb_request req;
  85. time64_t now;
  86. if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_GET_TIME) < 0)
  87. return 0;
  88. while (!req.complete)
  89. cuda_poll();
  90. if (req.reply_len != 7)
  91. printk(KERN_ERR "cuda_get_time: got %d byte reply\n",
  92. req.reply_len);
  93. now = (u32)((req.reply[3] << 24) + (req.reply[4] << 16) +
  94. (req.reply[5] << 8) + req.reply[6]);
  95. /* it's either after year 2040, or the RTC has gone backwards */
  96. WARN_ON(now < RTC_OFFSET);
  97. return now - RTC_OFFSET;
  98. }
  99. #define cuda_get_rtc_time(tm) rtc_time64_to_tm(cuda_get_time(), (tm))
  100. static int cuda_set_rtc_time(struct rtc_time *tm)
  101. {
  102. u32 nowtime;
  103. struct adb_request req;
  104. nowtime = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
  105. if (cuda_request(&req, NULL, 6, CUDA_PACKET, CUDA_SET_TIME,
  106. nowtime >> 24, nowtime >> 16, nowtime >> 8,
  107. nowtime) < 0)
  108. return -ENXIO;
  109. while (!req.complete)
  110. cuda_poll();
  111. if ((req.reply_len != 3) && (req.reply_len != 7))
  112. printk(KERN_ERR "cuda_set_rtc_time: got %d byte reply\n",
  113. req.reply_len);
  114. return 0;
  115. }
  116. #else
  117. #define cuda_get_time() 0
  118. #define cuda_get_rtc_time(tm)
  119. #define cuda_set_rtc_time(tm) 0
  120. #endif
  121. #ifdef CONFIG_ADB_PMU
  122. static time64_t pmu_get_time(void)
  123. {
  124. struct adb_request req;
  125. time64_t now;
  126. if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
  127. return 0;
  128. pmu_wait_complete(&req);
  129. if (req.reply_len != 4)
  130. printk(KERN_ERR "pmu_get_time: got %d byte reply from PMU\n",
  131. req.reply_len);
  132. now = (u32)((req.reply[0] << 24) + (req.reply[1] << 16) +
  133. (req.reply[2] << 8) + req.reply[3]);
  134. /* it's either after year 2040, or the RTC has gone backwards */
  135. WARN_ON(now < RTC_OFFSET);
  136. return now - RTC_OFFSET;
  137. }
  138. #define pmu_get_rtc_time(tm) rtc_time64_to_tm(pmu_get_time(), (tm))
  139. static int pmu_set_rtc_time(struct rtc_time *tm)
  140. {
  141. u32 nowtime;
  142. struct adb_request req;
  143. nowtime = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
  144. if (pmu_request(&req, NULL, 5, PMU_SET_RTC, nowtime >> 24,
  145. nowtime >> 16, nowtime >> 8, nowtime) < 0)
  146. return -ENXIO;
  147. pmu_wait_complete(&req);
  148. if (req.reply_len != 0)
  149. printk(KERN_ERR "pmu_set_rtc_time: %d byte reply from PMU\n",
  150. req.reply_len);
  151. return 0;
  152. }
  153. #else
  154. #define pmu_get_time() 0
  155. #define pmu_get_rtc_time(tm)
  156. #define pmu_set_rtc_time(tm) 0
  157. #endif
  158. #ifdef CONFIG_PMAC_SMU
  159. static time64_t smu_get_time(void)
  160. {
  161. struct rtc_time tm;
  162. if (smu_get_rtc_time(&tm, 1))
  163. return 0;
  164. return rtc_tm_to_time64(&tm);
  165. }
  166. #else
  167. #define smu_get_time() 0
  168. #define smu_get_rtc_time(tm, spin)
  169. #define smu_set_rtc_time(tm, spin) 0
  170. #endif
  171. /* Can't be __init, it's called when suspending and resuming */
  172. time64_t pmac_get_boot_time(void)
  173. {
  174. /* Get the time from the RTC, used only at boot time */
  175. switch (sys_ctrler) {
  176. case SYS_CTRLER_CUDA:
  177. return cuda_get_time();
  178. case SYS_CTRLER_PMU:
  179. return pmu_get_time();
  180. case SYS_CTRLER_SMU:
  181. return smu_get_time();
  182. default:
  183. return 0;
  184. }
  185. }
  186. void pmac_get_rtc_time(struct rtc_time *tm)
  187. {
  188. /* Get the time from the RTC, used only at boot time */
  189. switch (sys_ctrler) {
  190. case SYS_CTRLER_CUDA:
  191. cuda_get_rtc_time(tm);
  192. break;
  193. case SYS_CTRLER_PMU:
  194. pmu_get_rtc_time(tm);
  195. break;
  196. case SYS_CTRLER_SMU:
  197. smu_get_rtc_time(tm, 1);
  198. break;
  199. default:
  200. ;
  201. }
  202. }
  203. int pmac_set_rtc_time(struct rtc_time *tm)
  204. {
  205. switch (sys_ctrler) {
  206. case SYS_CTRLER_CUDA:
  207. return cuda_set_rtc_time(tm);
  208. case SYS_CTRLER_PMU:
  209. return pmu_set_rtc_time(tm);
  210. case SYS_CTRLER_SMU:
  211. return smu_set_rtc_time(tm, 1);
  212. default:
  213. return -ENODEV;
  214. }
  215. }
  216. #ifdef CONFIG_PPC32
  217. /*
  218. * Calibrate the decrementer register using VIA timer 1.
  219. * This is used both on powermacs and CHRP machines.
  220. */
  221. static int __init via_calibrate_decr(void)
  222. {
  223. struct device_node *vias;
  224. volatile unsigned char __iomem *via;
  225. int count = VIA_TIMER_FREQ_6 / 100;
  226. unsigned int dstart, dend;
  227. struct resource rsrc;
  228. vias = of_find_node_by_name(NULL, "via-cuda");
  229. if (vias == NULL)
  230. vias = of_find_node_by_name(NULL, "via-pmu");
  231. if (vias == NULL)
  232. vias = of_find_node_by_name(NULL, "via");
  233. if (vias == NULL || of_address_to_resource(vias, 0, &rsrc)) {
  234. of_node_put(vias);
  235. return 0;
  236. }
  237. of_node_put(vias);
  238. via = ioremap(rsrc.start, resource_size(&rsrc));
  239. if (via == NULL) {
  240. printk(KERN_ERR "Failed to map VIA for timer calibration !\n");
  241. return 0;
  242. }
  243. /* set timer 1 for continuous interrupts */
  244. out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT);
  245. /* set the counter to a small value */
  246. out_8(&via[T1CH], 2);
  247. /* set the latch to `count' */
  248. out_8(&via[T1LL], count);
  249. out_8(&via[T1LH], count >> 8);
  250. /* wait until it hits 0 */
  251. while ((in_8(&via[IFR]) & T1_INT) == 0)
  252. ;
  253. dstart = get_dec();
  254. /* clear the interrupt & wait until it hits 0 again */
  255. in_8(&via[T1CL]);
  256. while ((in_8(&via[IFR]) & T1_INT) == 0)
  257. ;
  258. dend = get_dec();
  259. ppc_tb_freq = (dstart - dend) * 100 / 6;
  260. iounmap(via);
  261. return 1;
  262. }
  263. #endif
  264. /*
  265. * Query the OF and get the decr frequency.
  266. */
  267. void __init pmac_calibrate_decr(void)
  268. {
  269. generic_calibrate_decr();
  270. #ifdef CONFIG_PPC32
  271. /* We assume MacRISC2 machines have correct device-tree
  272. * calibration. That's better since the VIA itself seems
  273. * to be slightly off. --BenH
  274. */
  275. if (!of_machine_is_compatible("MacRISC2") &&
  276. !of_machine_is_compatible("MacRISC3") &&
  277. !of_machine_is_compatible("MacRISC4"))
  278. if (via_calibrate_decr())
  279. return;
  280. /* Special case: QuickSilver G4s seem to have a badly calibrated
  281. * timebase-frequency in OF, VIA is much better on these. We should
  282. * probably implement calibration based on the KL timer on these
  283. * machines anyway... -BenH
  284. */
  285. if (of_machine_is_compatible("PowerMac3,5"))
  286. if (via_calibrate_decr())
  287. return;
  288. #endif
  289. }