amdtopology.c 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * AMD NUMA support.
  4. * Discover the memory map and associated nodes.
  5. *
  6. * This version reads it directly from the AMD northbridge.
  7. *
  8. * Copyright 2002,2003 Andi Kleen, SuSE Labs.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/string.h>
  13. #include <linux/nodemask.h>
  14. #include <linux/memblock.h>
  15. #include <linux/bootmem.h>
  16. #include <asm/io.h>
  17. #include <linux/pci_ids.h>
  18. #include <linux/acpi.h>
  19. #include <asm/types.h>
  20. #include <asm/mmzone.h>
  21. #include <asm/proto.h>
  22. #include <asm/e820/api.h>
  23. #include <asm/pci-direct.h>
  24. #include <asm/numa.h>
  25. #include <asm/mpspec.h>
  26. #include <asm/apic.h>
  27. #include <asm/amd_nb.h>
  28. static unsigned char __initdata nodeids[8];
  29. static __init int find_northbridge(void)
  30. {
  31. int num;
  32. for (num = 0; num < 32; num++) {
  33. u32 header;
  34. header = read_pci_config(0, num, 0, 0x00);
  35. if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
  36. header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
  37. header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
  38. continue;
  39. header = read_pci_config(0, num, 1, 0x00);
  40. if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
  41. header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
  42. header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
  43. continue;
  44. return num;
  45. }
  46. return -ENOENT;
  47. }
  48. int __init amd_numa_init(void)
  49. {
  50. u64 start = PFN_PHYS(0);
  51. u64 end = PFN_PHYS(max_pfn);
  52. unsigned numnodes;
  53. u64 prevbase;
  54. int i, j, nb;
  55. u32 nodeid, reg;
  56. unsigned int bits, cores, apicid_base;
  57. if (!early_pci_allowed())
  58. return -EINVAL;
  59. nb = find_northbridge();
  60. if (nb < 0)
  61. return nb;
  62. pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
  63. reg = read_pci_config(0, nb, 0, 0x60);
  64. numnodes = ((reg >> 4) & 0xF) + 1;
  65. if (numnodes <= 1)
  66. return -ENOENT;
  67. pr_info("Number of physical nodes %d\n", numnodes);
  68. prevbase = 0;
  69. for (i = 0; i < 8; i++) {
  70. u64 base, limit;
  71. base = read_pci_config(0, nb, 1, 0x40 + i*8);
  72. limit = read_pci_config(0, nb, 1, 0x44 + i*8);
  73. nodeids[i] = nodeid = limit & 7;
  74. if ((base & 3) == 0) {
  75. if (i < numnodes)
  76. pr_info("Skipping disabled node %d\n", i);
  77. continue;
  78. }
  79. if (nodeid >= numnodes) {
  80. pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid,
  81. base, limit);
  82. continue;
  83. }
  84. if (!limit) {
  85. pr_info("Skipping node entry %d (base %Lx)\n",
  86. i, base);
  87. continue;
  88. }
  89. if ((base >> 8) & 3 || (limit >> 8) & 3) {
  90. pr_err("Node %d using interleaving mode %Lx/%Lx\n",
  91. nodeid, (base >> 8) & 3, (limit >> 8) & 3);
  92. return -EINVAL;
  93. }
  94. if (node_isset(nodeid, numa_nodes_parsed)) {
  95. pr_info("Node %d already present, skipping\n",
  96. nodeid);
  97. continue;
  98. }
  99. limit >>= 16;
  100. limit++;
  101. limit <<= 24;
  102. if (limit > end)
  103. limit = end;
  104. if (limit <= base)
  105. continue;
  106. base >>= 16;
  107. base <<= 24;
  108. if (base < start)
  109. base = start;
  110. if (limit > end)
  111. limit = end;
  112. if (limit == base) {
  113. pr_err("Empty node %d\n", nodeid);
  114. continue;
  115. }
  116. if (limit < base) {
  117. pr_err("Node %d bogus settings %Lx-%Lx.\n",
  118. nodeid, base, limit);
  119. continue;
  120. }
  121. /* Could sort here, but pun for now. Should not happen anyroads. */
  122. if (prevbase > base) {
  123. pr_err("Node map not sorted %Lx,%Lx\n",
  124. prevbase, base);
  125. return -EINVAL;
  126. }
  127. pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
  128. nodeid, base, limit);
  129. prevbase = base;
  130. numa_add_memblk(nodeid, base, limit);
  131. node_set(nodeid, numa_nodes_parsed);
  132. }
  133. if (!nodes_weight(numa_nodes_parsed))
  134. return -ENOENT;
  135. /*
  136. * We seem to have valid NUMA configuration. Map apicids to nodes
  137. * using the coreid bits from early_identify_cpu.
  138. */
  139. bits = boot_cpu_data.x86_coreid_bits;
  140. cores = 1 << bits;
  141. apicid_base = 0;
  142. /*
  143. * get boot-time SMP configuration:
  144. */
  145. early_get_smp_config();
  146. if (boot_cpu_physical_apicid > 0) {
  147. pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
  148. apicid_base = boot_cpu_physical_apicid;
  149. }
  150. for_each_node_mask(i, numa_nodes_parsed)
  151. for (j = apicid_base; j < cores + apicid_base; j++)
  152. set_apicid_to_node((i << bits) + j, i);
  153. return 0;
  154. }