ark1668e_fpga.c 7.9 KB

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  1. #include <common.h>
  2. #include <dwmmc.h>
  3. #include <malloc.h>
  4. #include <debug_uart.h>
  5. #include <asm-generic/gpio.h>
  6. #include <asm/arch/ark-common.h>
  7. DECLARE_GLOBAL_DATA_PTR;
  8. #define ARK1668_UPDATE_MAGIC "ada7f0c6-7c86-11e9-8f9e-2a86e4085a59"
  9. #define rSYS_SD_CLK_CFG *((volatile unsigned int *)(0xe4900058))
  10. #define rSYS_SD1_CLK_CFG *((volatile unsigned int *)(0xe490005c))
  11. #define rSYS_SOFT_RSTNA *((volatile unsigned int *)(0xe4900074))
  12. #define rSYS_SOFT_RSTNB *((volatile unsigned int *)(0xe4900078))
  13. #define rSYS_DDR_STATUS *((volatile unsigned int *)(0xe4900180))
  14. #define rSYS_DDR_IO_CFG *((volatile unsigned int *)(0xe490019C))
  15. #define rSYS_PAD_CTRL00 *((volatile unsigned int *)(0xe49001c0))
  16. #define rSYS_PAD_CTRL01 *((volatile unsigned int *)(0xe49001c4))
  17. #define rSYS_PAD_CTRL05 *((volatile unsigned int *)(0xe49001d4))
  18. #define rSYS_PAD_CTRL06 *((volatile unsigned int *)(0xe49001d8))
  19. #define rSYS_PAD_CTRL07 *((volatile unsigned int *)(0xe49001dc))
  20. #define rSYS_PAD_CTRL08 *((volatile unsigned int *)(0xe49001e0))
  21. #define rSYS_PAD_CTRL09 *((volatile unsigned int *)(0xe49001e4))
  22. #define rSYS_PAD_CTRL0A *((volatile unsigned int *)(0xe49001e8))
  23. #define rSYS_PAD_CTRL0B *((volatile unsigned int *)(0xe49001ec))
  24. #define rSYS_PAD_CTRL0C *((volatile unsigned int *)(0xe49001f0))
  25. #define rSYS_PAD_CTRL0D *((volatile unsigned int *)(0xe49001f4))
  26. #define rSYS_PAD_CTRL0E *((volatile unsigned int *)(0xe49001f8))
  27. #define rSYS_PAD_CTRL38 *((volatile unsigned int *)(0xe49001fc))
  28. #define rSYS_PAD_CTRL3E *((volatile unsigned int *)(0xe4900200))
  29. #define rSYS_PAD_CTRL0F *((volatile unsigned int *)(0xe4900204))
  30. #define rSYS_CPU_CTL *((volatile unsigned int *)(0xe4900208))
  31. #define rSYS_MFC_GMAC_CTL *((volatile unsigned int *)(0xe490020c))
  32. #define rSYS_DEVICE_CLK_CFG7 *((volatile unsigned int *)(0xe4900230))
  33. static void dwmci_select_pad(void)
  34. {
  35. unsigned int val;
  36. /* use sd/mmc 0 */
  37. val = rSYS_PAD_CTRL00;
  38. val &= ~((0x7<<18)|(0x7<<15)|(0x7<<12)|(0x7<<9)|(0x7<<6)|(0x7<<3)|(0x7<<0));
  39. val |= ((0x1<<18)|(0x1<<15)|(0x1<<12)|(0x1<<9)|(0x1<<6)|(0x1<<3)|(0x1<<0));
  40. rSYS_PAD_CTRL00 = val;
  41. val = rSYS_PAD_CTRL0E;
  42. val &= ~((0x7<<27)|(0x7<<24));
  43. val |= ((0x1<<27)|(0x1<<24));
  44. rSYS_PAD_CTRL0E = val;
  45. val = rSYS_PAD_CTRL38;
  46. val &= ~((0x7<<9)|(0x7<<6)|(0x7<<3)|(0x7<<0));
  47. val |= ((0x1<<9)|(0x1<<6)|(0x1<<3)|(0x1<<0));
  48. rSYS_PAD_CTRL38 = val;
  49. /* use sd/mmc 1 */
  50. val = rSYS_PAD_CTRL00;
  51. val &= ~((0x7<<27)|(0x7<<24)|(0x7<<21));
  52. val |= ((0x1<<27)|(0x1<<24)|(0x1<<21));
  53. rSYS_PAD_CTRL00 = val;
  54. val = rSYS_PAD_CTRL01;
  55. val &= ~((0x7<<9)|(0x7<<6)|(0x7<<3)|(0x7<<0));
  56. val |= ((0x1<<9)|(0x1<<6)|(0x1<<3)|(0x1<<0));
  57. rSYS_PAD_CTRL01 = val;
  58. }
  59. /* static void dwmci_reset(void)
  60. {
  61. rSYS_SOFT_RSTNA &= ~((1<<29)|(1<<16));
  62. rSYS_SOFT_RSTNB &= ~(1<<3);
  63. udelay(100);
  64. rSYS_SOFT_RSTNA |= ((1<<29)|(1<<16));
  65. rSYS_SOFT_RSTNB |= (1<<3);
  66. } */
  67. #define ARK_MMC_CLK 12000000
  68. static int ark_dwmci_init(char *name,u32 regbase, int bus_width, int index)
  69. {
  70. struct dwmci_host *host = NULL;
  71. host = malloc(sizeof(struct dwmci_host));
  72. if (!host) {
  73. printf("dwmci_host malloc fail!\n");
  74. return 1;
  75. }
  76. memset(host, 0, sizeof(struct dwmci_host));
  77. dwmci_select_pad();
  78. //dwmci_reset();
  79. host->name = name;
  80. host->ioaddr = (void *)regbase;
  81. host->buswidth = bus_width;
  82. host->dev_index = index;
  83. host->bus_hz = ARK_MMC_CLK;
  84. host->fifoth_val = 64;
  85. host->fifo_mode = 1;
  86. add_dwmci(host, host->bus_hz, 400000);
  87. return 0;
  88. }
  89. int board_mmc_init(bd_t *bis)
  90. {
  91. ark_dwmci_init("ARK_MMC0", 0xec400000, 4, 0);
  92. ark_dwmci_init("ARK_MMC1", 0xec800000, 4, 0);
  93. //ark_dwmci_init("ARK_MMC2",SDHC2_BASE, 4, 2);
  94. return 0;
  95. }
  96. int dram_init(void)
  97. {
  98. gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
  99. CONFIG_SYS_SDRAM_SIZE);
  100. return 0;
  101. }
  102. int board_init(void)
  103. {
  104. unsigned int val;
  105. /* cpu1 disable */
  106. rSYS_CPU_CTL &= ~(1 << 7);
  107. /* nand pad enable */
  108. val = rSYS_PAD_CTRL08;
  109. val &= ~((0x7<<27) | (0x7<<24) | (0x7<<21) | (0x7<<18) | (0x7<<15) | (0x7<<12) | (0x7<<9) | (0x7<<6));
  110. val |= (0x1<<27) | (0x1<<24) | (0x1<<21) | (0x1<<18) | (0x1<<15) | (0x1<<12) | (0x1<<9) | (0x1<<6);
  111. rSYS_PAD_CTRL08 = val;
  112. val = rSYS_PAD_CTRL09;
  113. val &= ~((0x7<<15) | (0x7<<12) | (0x7<<9) | (0x7<<6) | (0x7<<3) | (0x7<<0));
  114. val |= (1<<15) | (1<<12) | (1<<9) | (1<<6) | (1<<3) | (1<<0);//enable nand cle, ale,ren,wen
  115. rSYS_PAD_CTRL09 = val;
  116. /* spi pad enable */
  117. val = rSYS_PAD_CTRL09;
  118. val &= ~((0x7<<27) | (0x7<<24));
  119. val |= (0x2<<27) | (0x2<<24);
  120. rSYS_PAD_CTRL09 = val;
  121. val = rSYS_PAD_CTRL0A;
  122. val &= ~((0x7<<3) | (0x7<<0));
  123. val |= (0x2<<0);
  124. rSYS_PAD_CTRL0A = val;
  125. /* gmac pad enable */
  126. rSYS_PAD_CTRL0C = (1 << 27) | (1 << 24) | (1 << 21) | (1 << 18) | (1 << 15) | (1 << 12) | (1 << 9) |
  127. (1 << 6) | (1 << 3) | (1 << 0);
  128. rSYS_PAD_CTRL0D = (1 << 24) | (1 << 21) | (1 << 18) | (1 << 15) | (1 << 12) | (1 << 9) |
  129. (1 << 6) | (1 << 3) | (1 << 0);
  130. rSYS_PAD_CTRL0F |= (1 << 31);
  131. /* select rgmii interface */
  132. rSYS_MFC_GMAC_CTL &= ~(7 << 1);
  133. rSYS_MFC_GMAC_CTL |= (1 << 1);
  134. /* mac tx clk inv */
  135. rSYS_DEVICE_CLK_CFG7 |= 1;
  136. /* i2s0 sadata in */
  137. rSYS_PAD_CTRL0F &= ~(1 << 28);
  138. /* i2s1 sadata out */
  139. rSYS_PAD_CTRL0F |= (1 << 29);
  140. return 0;
  141. }
  142. #ifdef CONFIG_BOARD_EARLY_INIT_F
  143. int board_early_init_f(void)
  144. {
  145. #ifdef CONFIG_DEBUG_UART
  146. debug_uart_init();
  147. #endif
  148. return 0;
  149. }
  150. #endif
  151. int board_late_init(void)
  152. {
  153. char cmd[128];
  154. char *need_update,*update_flash;
  155. unsigned int loadaddr;
  156. int do_update = 0, update_from_mmc = 1;
  157. run_command("sf probe", 0);
  158. update_flash = env_get("update_from_flash");
  159. printf("++++++++++%s+++++++\n",update_flash);
  160. need_update = env_get("need_update");
  161. if (!strcmp(need_update, "yes")) {
  162. loadaddr = env_get_hex("loadaddr", 0);
  163. sprintf(cmd, "fatload %s %s %s update-magic", "mmc", env_get("sd_dev_part"), env_get("loadaddr"));
  164. run_command(cmd, 0);
  165. if (loadaddr && !memcmp((void *)loadaddr, ARK1668_UPDATE_MAGIC, strlen(ARK1668_UPDATE_MAGIC))) {
  166. do_update = 1;
  167. goto update_done;
  168. } else {
  169. printf("Wrong update magic, do not update from mmc.\n");
  170. }
  171. #ifdef CONFIG_USB_MUSB_HCD
  172. //use old musb driver
  173. run_command("usb start", 0);
  174. #endif
  175. sprintf(cmd, "fatload %s %s %s update-magic", "usb", "0", env_get("loadaddr"));
  176. run_command(cmd, 0);
  177. if (loadaddr && !memcmp((void *)loadaddr, ARK1668_UPDATE_MAGIC, strlen(ARK1668_UPDATE_MAGIC))) {
  178. do_update = 1;
  179. update_from_mmc = 0;
  180. } else {
  181. printf("Wrong update magic, do not update from usb.\n");
  182. }
  183. }
  184. else if (!strcmp(update_flash, "yes")){
  185. sprintf(cmd, "run updatefromflash");
  186. printf("cmd=%s\n", cmd);
  187. run_command(cmd, 0);
  188. }
  189. update_done:
  190. if (do_update) {
  191. run_command("nand erase.part userdata", 0);
  192. env_set("need_update", "no");
  193. env_set("do_update", "yes");
  194. if (update_from_mmc) {
  195. printf("update form mmc...\n");
  196. env_set("update_dev_type", "mmc");
  197. env_set("update_dev_part", env_get("sd_dev_part"));
  198. } else {
  199. printf("update form usb...\n");
  200. env_set("update_dev_type", "usb");
  201. env_set("update_dev_part", "0");
  202. }
  203. } else {
  204. env_set("do_update", "no");
  205. }
  206. return 0;
  207. }
  208. #ifdef CONFIG_SPL_BUILD
  209. static inline void ApbWriteFun(unsigned int addr, unsigned int data)
  210. {
  211. * (volatile unsigned int *) addr = data;
  212. }
  213. void mem_init(void)
  214. {
  215. ApbWriteFun(0xE490006c, 0x80000); //device_cfg for ddr2_ref_clk
  216. udelay(20);
  217. ApbWriteFun(0xE4900214, 0x0);
  218. //softa
  219. ApbWriteFun(0xE4900078, 0xfffffffd);
  220. udelay(2);
  221. ApbWriteFun(0xE4900214, 0xFFF0BFFF);//PLL_PDN=[13]=1
  222. udelay(20); // > 50us
  223. ApbWriteFun(0xE4900214, 0xFFF8BFFF);//PLL_RSTN=[19]=1
  224. udelay(10);
  225. ApbWriteFun(0xE4900214, 0xFFF8FFFF);//DLL_PDN=[14]=1
  226. udelay(50);//> 100us
  227. ApbWriteFun(0xE4900214, 0xFFFBFFFF);//DDR_PHY_RSTN=[16]=[17]=1
  228. udelay(10);
  229. ApbWriteFun(0xE4900214, 0xFFFFFFFF);//DDR_DPHY_RSTN=[18]=1
  230. udelay(10);
  231. ApbWriteFun(0xE4900214, 0xFFFFEFFF);//=[12]=ddr_srf_req=0;
  232. udelay(10);
  233. ApbWriteFun(0xE4900210, 0x70000800);
  234. ApbWriteFun(0xE4900214, 0xFFEFE074);
  235. udelay(10);
  236. ApbWriteFun(0xE4900078, 0xffffffff);
  237. ddr3_sdramc_init();
  238. }
  239. #endif