ark_wdt.c 8.6 KB

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  1. /*
  2. * Arkmicro watchdog driver
  3. *
  4. * Licensed under GPLv2 or later.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/interrupt.h>
  8. #include <linux/clk.h>
  9. #include <linux/io.h>
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/of.h>
  13. #include <linux/of_irq.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/reboot.h>
  16. #include <linux/watchdog.h>
  17. #include <linux/gpio/consumer.h>
  18. #define ARK_WTCON 0x00
  19. #define ARK_WTPSR 0x04
  20. #define ARK_WTCNT 0x08
  21. #define ARK_WTCLRINT 0x10
  22. #define ARK_WTRCR 0x14
  23. #define ARK_WTCNT_MAXCNT 0xffff
  24. #define ARK_WTCON_MAXDIV 0x80
  25. #define ARK_WTCON_ENABLE (1 << 0)
  26. #define ARK_WTCON_RSTEN (1 << 1)
  27. #define ARK_WTCON_INTEN (1 << 2)
  28. #define ARK_WTCON_DIV16 (0 << 4)
  29. #define ARK_WTCON_DIV32 (1 << 4)
  30. #define ARK_WTCON_DIV64 (2 << 4)
  31. #define ARK_WTCON_DIV128 (3 << 4)
  32. #define ARK_WTCON_DIVMASK (0x3 << 4)
  33. #define ARK_WTCON_PRESCALE_MAX 0xffff
  34. #define ARK_WATCHDOG_DEFAULT_TIME (15)
  35. struct ark_wdt {
  36. struct device *dev;
  37. void __iomem *reg_base;
  38. struct gpio_desc *reset_gpio;
  39. struct clk *clock;
  40. struct watchdog_device wdd;
  41. unsigned int count;
  42. spinlock_t lock;
  43. };
  44. static int wdt_timeout = ARK_WATCHDOG_DEFAULT_TIME;
  45. static bool nowayout = WATCHDOG_NOWAYOUT;
  46. static int soft_noboot = 1;
  47. module_param(wdt_timeout, int, 0);
  48. MODULE_PARM_DESC(wdt_timeout,
  49. "Watchdog timeout in seconds. (default = "
  50. __MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
  51. module_param(nowayout, bool, 0);
  52. MODULE_PARM_DESC(nowayout,
  53. "Watchdog cannot be stopped once started (default="
  54. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  55. module_param(soft_noboot, int, 0);
  56. MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, 0 to reboot (default 0)");
  57. static int ark_wdt_keepalive(struct watchdog_device *wdd)
  58. {
  59. struct ark_wdt *wdt = watchdog_get_drvdata(wdd);
  60. writel(wdt->count, wdt->reg_base + ARK_WTCNT);
  61. return 0;
  62. }
  63. static void __ark_wdt_stop(struct ark_wdt *wdt)
  64. {
  65. unsigned long wtcon;
  66. wtcon = readl(wdt->reg_base + ARK_WTCON);
  67. wtcon &= ~(ARK_WTCON_ENABLE | ARK_WTCON_RSTEN);
  68. writel(wtcon, wdt->reg_base + ARK_WTCON);
  69. }
  70. static int ark_wdt_stop(struct watchdog_device *wdd)
  71. {
  72. struct ark_wdt *wdt = watchdog_get_drvdata(wdd);
  73. spin_lock(&wdt->lock);
  74. __ark_wdt_stop(wdt);
  75. spin_unlock(&wdt->lock);
  76. return 0;
  77. }
  78. static int ark_wdt_start(struct watchdog_device *wdd)
  79. {
  80. unsigned long wtcon;
  81. struct ark_wdt *wdt = watchdog_get_drvdata(wdd);
  82. spin_lock(&wdt->lock);
  83. __ark_wdt_stop(wdt);
  84. wtcon = readl(wdt->reg_base + ARK_WTCON);
  85. wtcon &= ~ARK_WTCON_DIVMASK;
  86. wtcon |= ARK_WTCON_ENABLE | ARK_WTCON_DIV128;
  87. if (soft_noboot) {
  88. wtcon |= ARK_WTCON_INTEN;
  89. wtcon &= ~ARK_WTCON_RSTEN;
  90. } else {
  91. wtcon &= ~ARK_WTCON_INTEN;
  92. wtcon |= ARK_WTCON_RSTEN;
  93. }
  94. dev_dbg(wdt->dev, "Starting watchdog: count=0x%08x, wtcon=%08lx\n",
  95. wdt->count, wtcon);
  96. writel(wdt->count, wdt->reg_base + ARK_WTCNT);
  97. writel(wtcon, wdt->reg_base + ARK_WTCON);
  98. spin_unlock(&wdt->lock);
  99. return 0;
  100. }
  101. static unsigned int ark_wdt_set_timeout(struct watchdog_device *wdd, unsigned int timeout_ms)
  102. {
  103. struct ark_wdt *wdt = watchdog_get_drvdata(wdd);
  104. unsigned long freq = clk_get_rate(wdt->clock);
  105. unsigned int count;
  106. unsigned int divisor = 1;
  107. freq = DIV_ROUND_UP(freq, 128);
  108. count = timeout_ms * DIV_ROUND_UP(freq, 1000);
  109. dev_dbg(wdt->dev, "Heartbeat: count=%d, timeout=%d(ms), freq=%lu\n",
  110. count, timeout_ms, freq);
  111. /* if the count is bigger than the watchdog register,
  112. then work out what we need to do (and if) we can
  113. actually make this value
  114. */
  115. if (count > ARK_WTCNT_MAXCNT) {
  116. divisor = DIV_ROUND_UP(count, ARK_WTCNT_MAXCNT);
  117. if (divisor > ARK_WTCON_PRESCALE_MAX) {
  118. dev_err(wdt->dev, "timeout %d(ms) too big\n", timeout_ms);
  119. return -EINVAL;
  120. }
  121. }
  122. dev_dbg(wdt->dev, "Heartbeat: timeout=%d(ms), divisor=%d, count=%d (%08x)\n",
  123. timeout_ms, divisor, count, DIV_ROUND_UP(count, divisor));
  124. count = DIV_ROUND_UP(count, divisor);
  125. wdt->count = count;
  126. /* update the pre-scaler */
  127. writel(divisor, wdt->reg_base + ARK_WTPSR);
  128. writel(count, wdt->reg_base + ARK_WTCNT);
  129. return (count * divisor) / freq;
  130. }
  131. static int ark_wdt_set_heartbeat(struct watchdog_device *wdd,
  132. unsigned int timeout)
  133. {
  134. if (timeout < 1)
  135. return -EINVAL;
  136. wdd->timeout = ark_wdt_set_timeout(wdd, timeout * 1000);
  137. return 0;
  138. }
  139. static int ark_wdt_restart(struct watchdog_device *wdd, unsigned long action,
  140. void *data)
  141. {
  142. struct ark_wdt *wdt = watchdog_get_drvdata(wdd);
  143. void __iomem *wdt_base = wdt->reg_base;
  144. #ifdef CONFIG_SOC_ARK1668E
  145. void __iomem *sys_base;
  146. #endif
  147. /* disable watchdog, to be safe */
  148. writel(0, wdt_base + ARK_WTCON);
  149. #ifdef CONFIG_SOC_ARK1668E
  150. if (wdt->reset_gpio)
  151. gpiod_direction_output(wdt->reset_gpio, 1);
  152. else
  153. ark_wdt_set_timeout(wdd, 2000);
  154. #else
  155. ark_wdt_set_timeout(wdd, 100);
  156. #endif
  157. /* set the watchdog to go and reset... */
  158. writel(ARK_WTCON_ENABLE | ARK_WTCON_DIV128 |
  159. ARK_WTCON_RSTEN, wdt_base + ARK_WTCON);
  160. #ifdef CONFIG_SOC_ARK1668E
  161. #define ARK1668E_SYSREG_BASE 0xe4900000
  162. #define ARK1668E_SOFT_RSTA 0x74
  163. #define ARK1668E_SOFT_RSTB 0x78
  164. sys_base = ioremap(ARK1668E_SYSREG_BASE, 0x1000);
  165. if (sys_base) {
  166. writel(0, sys_base + ARK1668E_SOFT_RSTA);
  167. writel(0, sys_base + ARK1668E_SOFT_RSTB);
  168. }
  169. #endif
  170. /* wait for reset to assert... */
  171. mdelay(3000);
  172. return 0;
  173. }
  174. static const struct watchdog_info ark_wdt_info = {
  175. .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
  176. .identity = "ark Watchdog",
  177. };
  178. static const struct watchdog_ops ark_wdt_ops = {
  179. .owner = THIS_MODULE,
  180. .start = ark_wdt_start,
  181. .stop = ark_wdt_stop,
  182. .ping = ark_wdt_keepalive,
  183. .restart = ark_wdt_restart,
  184. .set_timeout = ark_wdt_set_heartbeat,
  185. };
  186. /* interrupt handler code */
  187. static irqreturn_t ark_wdt_irq(int irqno, void *param)
  188. {
  189. struct ark_wdt *wdt = platform_get_drvdata(param);
  190. //dev_info(wdt->dev, "watchdog timer expired (irq)\n");
  191. ark_wdt_keepalive(&wdt->wdd);
  192. writel(0x1, wdt->reg_base + ARK_WTCLRINT);
  193. return IRQ_HANDLED;
  194. }
  195. static inline unsigned int ark_wdt_max_timeout(struct clk *clock)
  196. {
  197. unsigned long freq = clk_get_rate(clock);
  198. return ARK_WTCNT_MAXCNT / (freq / ARK_WTCON_PRESCALE_MAX
  199. / ARK_WTCON_MAXDIV);
  200. }
  201. static int ark_wdt_probe(struct platform_device *pdev)
  202. {
  203. struct device *dev = &pdev->dev;
  204. struct watchdog_device *wdd;
  205. struct ark_wdt *wdt;
  206. struct resource *res;
  207. void __iomem *regs;
  208. int ret;
  209. int irq;
  210. wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
  211. if (!wdt)
  212. return -ENOMEM;
  213. wdt->dev = dev;
  214. spin_lock_init(&wdt->lock);
  215. wdd = &wdt->wdd;
  216. wdd->timeout = wdt_timeout;
  217. wdd->info = &ark_wdt_info;
  218. wdd->ops = &ark_wdt_ops;
  219. watchdog_set_drvdata(wdd, wdt);
  220. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  221. regs = devm_ioremap_resource(&pdev->dev, res);
  222. if (IS_ERR(regs))
  223. return PTR_ERR(regs);
  224. wdt->reg_base = regs;
  225. wdt->clock = devm_clk_get(dev, NULL);
  226. if (IS_ERR(wdt->clock)) {
  227. dev_err(dev, "failed to find watchdog clock source\n");
  228. return PTR_ERR(wdt->clock);
  229. }
  230. wdt->reset_gpio = devm_gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW);
  231. if (IS_ERR(wdt->reset_gpio))
  232. wdt->reset_gpio = NULL;
  233. wdt->wdd.min_timeout = 1;
  234. wdt->wdd.max_timeout = ark_wdt_max_timeout(wdt->clock);
  235. ret = watchdog_init_timeout(wdd, wdt_timeout, &pdev->dev);
  236. if (ret) {
  237. dev_err(&pdev->dev, "unable to set timeout value\n");
  238. return ret;
  239. }
  240. ret = ark_wdt_set_heartbeat(&wdt->wdd, wdt_timeout);
  241. if (ret) {
  242. dev_err(&pdev->dev, "failed to set timeout value\n");
  243. }
  244. irq = platform_get_irq(pdev, 0);
  245. if (irq < 0) {
  246. dev_err(&pdev->dev, "unable to get irq\n");
  247. return irq;
  248. }
  249. ret = devm_request_irq(dev, irq, ark_wdt_irq, 0, pdev->name, pdev);
  250. if (ret != 0) {
  251. dev_err(dev, "failed to install irq (%d)\n", ret);
  252. return ret;
  253. }
  254. watchdog_set_nowayout(wdd, nowayout);
  255. watchdog_set_restart_priority(&wdt->wdd, 128);
  256. ret = watchdog_register_device(wdd);
  257. if (ret) {
  258. dev_err(&pdev->dev, "failed to register watchdog device\n");
  259. return ret;
  260. }
  261. platform_set_drvdata(pdev, wdt);
  262. ark_wdt_start(&wdt->wdd);
  263. dev_info(&pdev->dev, "initialized (timeout = %d sec, nowayout = %d)\n",
  264. wdt_timeout, nowayout);
  265. return 0;
  266. }
  267. static int ark_wdt_remove(struct platform_device *pdev)
  268. {
  269. struct ark_wdt *wdt = platform_get_drvdata(pdev);
  270. ark_wdt_stop(&wdt->wdd);
  271. watchdog_unregister_device(&wdt->wdd);
  272. return 0;
  273. }
  274. static const struct of_device_id ark_wdt_of_match[] = {
  275. { .compatible = "arkmicro,ark-wdt", },
  276. { }
  277. };
  278. MODULE_DEVICE_TABLE(of, ark_wdt_of_match);
  279. static struct platform_driver ark_wdt_driver = {
  280. .probe = ark_wdt_probe,
  281. .remove = ark_wdt_remove,
  282. .driver = {
  283. .name = "ark_wdt",
  284. .of_match_table = ark_wdt_of_match,
  285. }
  286. };
  287. module_platform_driver(ark_wdt_driver);
  288. MODULE_AUTHOR("Sim");
  289. MODULE_DESCRIPTION("Arkmicro Watchdog Timer driver");
  290. MODULE_LICENSE("GPL v2");